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i965/blorp: Explain why Z24 can't use a sensible format.

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We could conceivably use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS for
Z24 source images, allowing conversions from Z24 to either Z16 or Z32F.

Unfortunately, we can't use it for destination images since it isn't
supported as a render target.

Using different formats for sources or destinations would be painful,
so for now, punt.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Kenneth Graunke 2013-10-07 11:27:22 -07:00
parent 590d71791a
commit 0589eaecde
1 changed files with 5 additions and 1 deletions
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6
src/mesa/drivers/dri/i965/brw_blorp.cpp
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@ -86,7 +86,11 @@ brw_blorp_surface_info::set(struct brw_context *brw,
this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM;
break;
case MESA_FORMAT_X8_Z24:
/* The miptree consists of 32 bits per pixel, arranged as 24-bit depth
/* It would make sense to use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS
* here, but unfortunately it isn't supported as a render target, which
* would prevent us from blitting to 24-bit depth.
*
* The miptree consists of 32 bits per pixel, arranged as 24-bit depth
* values interleaved with 8 "don't care" bits. Since depth values don't
* require any blending, it doesn't matter how we interpret the bit
* pattern as long as we copy the right amount of data, so just map it