diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index a463e5cc18a..5e98bd2bc36 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -461,15 +461,6 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
    return cmd_buffer->record_result;
 }
 
-enum radeon_bo_domain
-radv_cmdbuffer_domain(const struct radeon_info *info, uint32_t perftest)
-{
-   bool use_sam =
-      (info->all_vram_visible && info->has_dedicated_vram && !(perftest & RADV_PERFTEST_NO_SAM)) ||
-      (perftest & RADV_PERFTEST_SAM);
-   return use_sam ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT;
-}
-
 static bool
 radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, uint64_t min_needed)
 {
@@ -481,12 +472,10 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, uint64_t m
    new_size = MAX2(min_needed, 16 * 1024);
    new_size = MAX2(new_size, 2 * cmd_buffer->upload.size);
 
-   bo = device->ws->buffer_create(
-      device->ws, new_size, 4096,
-      radv_cmdbuffer_domain(&device->physical_device->rad_info, device->instance->perftest_flags),
-      RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_32BIT |
-         RADEON_FLAG_GTT_WC,
-      RADV_BO_PRIORITY_UPLOAD_BUFFER);
+   bo = device->ws->buffer_create(device->ws, new_size, 4096, device->ws->cs_domain(device->ws),
+                                  RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING |
+                                     RADEON_FLAG_32BIT | RADEON_FLAG_GTT_WC,
+                                  RADV_BO_PRIORITY_UPLOAD_BUFFER);
 
    if (!bo) {
       cmd_buffer->record_result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 5a05c3ee440..54b736cf9b0 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -260,6 +260,8 @@ struct radeon_winsys {
 
    bool (*ctx_wait_idle)(struct radeon_winsys_ctx *ctx, enum ring_type ring_type, int ring_index);
 
+   enum radeon_bo_domain (*cs_domain)(const struct radeon_winsys *ws);
+
    struct radeon_cmdbuf *(*cs_create)(struct radeon_winsys *ws, enum ring_type ring_type);
 
    void (*cs_destroy)(struct radeon_cmdbuf *cs);
@@ -338,6 +340,4 @@ radv_cs_add_buffer(struct radeon_winsys *ws, struct radeon_cmdbuf *cs, struct ra
    ws->cs_add_buffer(cs, bo);
 }
 
-enum radeon_bo_domain radv_cmdbuffer_domain(const struct radeon_info *info, uint32_t perftest);
-
 #endif /* RADV_RADEON_WINSYS_H */
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index eeccc33b790..19dbc313adc 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -620,12 +620,11 @@ cik_create_gfx_config(struct radv_device *device)
          radeon_emit(cs, PKT3_NOP_PAD);
    }
 
-   device->gfx_init = device->ws->buffer_create(
-      device->ws, cs->cdw * 4, 4096,
-      radv_cmdbuffer_domain(&device->physical_device->rad_info, device->instance->perftest_flags),
-      RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_READ_ONLY |
-         RADEON_FLAG_GTT_WC,
-      RADV_BO_PRIORITY_CS);
+   device->gfx_init =
+      device->ws->buffer_create(device->ws, cs->cdw * 4, 4096, device->ws->cs_domain(device->ws),
+                                RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING |
+                                   RADEON_FLAG_READ_ONLY | RADEON_FLAG_GTT_WC,
+                                RADV_BO_PRIORITY_CS);
    if (!device->gfx_init)
       goto fail;
 
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index 7347f04c8b2..2ce4fd4f8ea 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -33,6 +33,8 @@
 #include "ac_debug.h"
 #include "radv_amdgpu_bo.h"
 #include "radv_amdgpu_cs.h"
+#include "radv_amdgpu_winsys.h"
+#include "radv_debug.h"
 #include "radv_radeon_winsys.h"
 #include "sid.h"
 
@@ -175,6 +177,17 @@ radv_amdgpu_init_cs(struct radv_amdgpu_cs *cs, enum ring_type ring_type)
    cs->hw_ip = ring_to_hw_ip(ring_type);
 }
 
+static enum radeon_bo_domain
+radv_amdgpu_cs_domain(const struct radeon_winsys *_ws)
+{
+   const struct radv_amdgpu_winsys *ws = (const struct radv_amdgpu_winsys *)_ws;
+
+   bool use_sam = (ws->info.all_vram_visible && ws->info.has_dedicated_vram &&
+                   !(ws->perftest & RADV_PERFTEST_NO_SAM)) ||
+                  (ws->perftest & RADV_PERFTEST_SAM);
+   return use_sam ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT;
+}
+
 static struct radeon_cmdbuf *
 radv_amdgpu_cs_create(struct radeon_winsys *ws, enum ring_type ring_type)
 {
@@ -189,7 +202,7 @@ radv_amdgpu_cs_create(struct radeon_winsys *ws, enum ring_type ring_type)
 
    if (cs->ws->use_ib_bos) {
       cs->ib_buffer =
-         ws->buffer_create(ws, ib_size, 0, cs->ws->cs_bo_domain,
+         ws->buffer_create(ws, ib_size, 0, radv_amdgpu_cs_domain(ws),
                            RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING |
                               RADEON_FLAG_READ_ONLY | RADEON_FLAG_GTT_WC,
                            RADV_BO_PRIORITY_CS);
@@ -309,7 +322,7 @@ radv_amdgpu_cs_grow(struct radeon_cmdbuf *_cs, size_t min_size)
    cs->old_ib_buffers[cs->num_old_ib_buffers++] = cs->ib_buffer;
 
    cs->ib_buffer =
-      cs->ws->base.buffer_create(&cs->ws->base, ib_size, 0, cs->ws->cs_bo_domain,
+      cs->ws->base.buffer_create(&cs->ws->base, ib_size, 0, radv_amdgpu_cs_domain(&cs->ws->base),
                                  RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING |
                                     RADEON_FLAG_READ_ONLY | RADEON_FLAG_GTT_WC,
                                  RADV_BO_PRIORITY_CS);
@@ -934,7 +947,7 @@ radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx, int queue_id
             }
 
             bos[j] = ws->buffer_create(
-               ws, 4 * size, 4096, aws->cs_bo_domain,
+               ws, 4 * size, 4096, radv_amdgpu_cs_domain(ws),
                RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_READ_ONLY,
                RADV_BO_PRIORITY_CS);
             ptr = ws->buffer_map(bos[j]);
@@ -976,7 +989,7 @@ radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx, int queue_id
          assert(cnt);
 
          bos[0] = ws->buffer_create(
-            ws, 4 * size, 4096, aws->cs_bo_domain,
+            ws, 4 * size, 4096, radv_amdgpu_cs_domain(ws),
             RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_READ_ONLY,
             RADV_BO_PRIORITY_CS);
          ptr = ws->buffer_map(bos[0]);
@@ -1650,6 +1663,7 @@ radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
    ws->base.ctx_create = radv_amdgpu_ctx_create;
    ws->base.ctx_destroy = radv_amdgpu_ctx_destroy;
    ws->base.ctx_wait_idle = radv_amdgpu_ctx_wait_idle;
+   ws->base.cs_domain = radv_amdgpu_cs_domain;
    ws->base.cs_create = radv_amdgpu_cs_create;
    ws->base.cs_destroy = radv_amdgpu_cs_destroy;
    ws->base.cs_grow = radv_amdgpu_cs_grow;
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
index ad5953aeb11..422b5d05dc4 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
@@ -235,10 +235,10 @@ radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags)
    if (debug_flags & RADV_DEBUG_NO_IBS)
       ws->use_ib_bos = false;
 
+   ws->perftest = perftest_flags;
    ws->use_local_bos = perftest_flags & RADV_PERFTEST_LOCAL_BOS;
    ws->zero_all_vram_allocs = debug_flags & RADV_DEBUG_ZERO_VRAM;
    ws->use_llvm = debug_flags & RADV_DEBUG_LLVM;
-   ws->cs_bo_domain = radv_cmdbuffer_domain(&ws->info, perftest_flags);
    u_rwlock_init(&ws->global_bo_list.lock);
    list_inithead(&ws->log_bo_list);
    u_rwlock_init(&ws->log_bo_list_lock);
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
index ba9cf500cd5..d124e04a0f6 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
@@ -46,10 +46,10 @@ struct radv_amdgpu_winsys {
    bool debug_all_bos;
    bool debug_log_bos;
    bool use_ib_bos;
-   enum radeon_bo_domain cs_bo_domain;
    bool zero_all_vram_allocs;
    bool use_local_bos;
    bool use_llvm;
+   uint64_t perftest;
 
    uint64_t allocated_vram;
    uint64_t allocated_vram_vis;
diff --git a/src/amd/vulkan/winsys/null/radv_null_cs.c b/src/amd/vulkan/winsys/null/radv_null_cs.c
index f5a186fe04a..4f66a980faf 100644
--- a/src/amd/vulkan/winsys/null/radv_null_cs.c
+++ b/src/amd/vulkan/winsys/null/radv_null_cs.c
@@ -59,6 +59,12 @@ radv_null_ctx_destroy(struct radeon_winsys_ctx *rwctx)
    FREE(ctx);
 }
 
+static enum radeon_bo_domain
+radv_null_cs_domain(const struct radeon_winsys *_ws)
+{
+   return RADEON_DOMAIN_GTT;
+}
+
 static struct radeon_cmdbuf *
 radv_null_cs_create(struct radeon_winsys *ws, enum ring_type ring_type)
 {
@@ -97,6 +103,7 @@ radv_null_cs_init_functions(struct radv_null_winsys *ws)
 {
    ws->base.ctx_create = radv_null_ctx_create;
    ws->base.ctx_destroy = radv_null_ctx_destroy;
+   ws->base.cs_domain = radv_null_cs_domain;
    ws->base.cs_create = radv_null_cs_create;
    ws->base.cs_finalize = radv_null_cs_finalize;
    ws->base.cs_destroy = radv_null_cs_destroy;