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radv: do not initialize HiZ on transfer queue on RDNA4

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Emitting compute dispatches on SDMA would just hang.

This fixes pending depth/stencil copy tests on transfer queue with
RADV_PERFTEST=transfer_queue.

Fixes: e6c485afb0 ("radv: initialize HiZ metadata during image layout transitions")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37795>
This commit is contained in:
Samuel Pitoiset 2025-10-09 18:54:29 +02:00 • committed by Marge Bot
parent 0fbd9e3894
commit 055b10a75c
1 changed files with 3 additions and 0 deletions
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3
src/amd/vulkan/radv_cmd_buffer.c
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@ -13869,6 +13869,9 @@ radv_initialize_hiz(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image
struct radv_cmd_state *state = &cmd_buffer->state;
struct radv_barrier_data barrier = {0};
if (cmd_buffer->qf == RADV_QUEUE_TRANSFER)
return;
barrier.layout_transitions.init_mask_ram = 1;
radv_describe_layout_transition(cmd_buffer, &barrier);