From 04bd00775714520bb2929b0a89efe00a34ed9b31 Mon Sep 17 00:00:00 2001
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Tue, 29 Mar 2022 11:47:23 +0300
Subject: [PATCH] intel/fs: require memory fence commit bit on Gfx9

Fixes a hang on Gfx9 GT1 : dEQP-VK.compute.zero_initialize_workgroup_memory.max_workgroup_memory.128

Tested-by: Mark Janes <markjanes@swizzler.org>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
---
 src/intel/compiler/brw_fs_nir.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 81fb50624a3..f2fa11858e2 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4563,8 +4563,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
           */
          const bool render_fence = tgm_fence && devinfo->verx10 == 70;
 
+         /* Simulation also complains on Gfx9 if we do not enable commit.
+          */
          const bool commit_enable = render_fence ||
-            instr->intrinsic == nir_intrinsic_end_invocation_interlock;
+            instr->intrinsic == nir_intrinsic_end_invocation_interlock ||
+            devinfo->ver == 9;
 
          if (tgm_fence || ugm_fence || slm_fence || urb_fence) {
             fence_regs[fence_regs_count++] =