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intel: Fix Y tiling support for glCopyTexSubImage's alpha override.

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Apparently we don't have any piglit tests for this, because it would have
assertion failed in a debug build, or just rendered wrong in a non-debug
build if the destination wasn't covering whole tiles.

v2: Use the new macros.

Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
This commit is contained in:
Eric Anholt 2013-06-03 22:40:26 -07:00
parent 78c2fc5925
commit 04a5e940c9
1 changed files with 4 additions and 4 deletions
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8
src/mesa/drivers/dri/intel/intel_blit.c
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@ -724,8 +724,6 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
CMD = XY_COLOR_BLT_CMD;
CMD |= XY_BLT_WRITE_ALPHA;
assert(region->tiling != I915_TILING_Y);
#ifndef I915
if (region->tiling != I915_TILING_NONE) {
CMD |= XY_DST_TILED;
@ -743,7 +741,9 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
intel_batchbuffer_flush(intel);
}
BEGIN_BATCH_BLT(6);
bool dst_y_tiled = region->tiling == I915_TILING_Y;
BEGIN_BATCH_BLT_TILED(6, dst_y_tiled, false);
OUT_BATCH(CMD | (6 - 2));
OUT_BATCH(BR13);
OUT_BATCH((y1 << 16) | x1);
@ -752,7 +752,7 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
ADVANCE_BATCH();
ADVANCE_BATCH_TILED(dst_y_tiled, false);
intel_batchbuffer_emit_mi_flush(intel);
}