fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-22 13:30:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

i965/vec4: Allow reswizzling writemasks when swizzle is single-valued.

Browse source 
total instructions in shared programs: 4288033 -> 4266151 (-0.51%)
instructions in affected programs:     930915 -> 909033 (-2.35%)
This commit is contained in:
Matt Turner 2014-08-15 12:32:23 -07:00
parent bde2a62af7
commit 04895f5c60
1 changed files with 33 additions and 27 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

38
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -944,11 +944,8 @@ vec4_instruction::can_reswizzle_dst(int dst_writemask,
return false; return false;
switch (opcode) { switch (opcode) {
case BRW_OPCODE_DP4:
case BRW_OPCODE_DP3:
case BRW_OPCODE_DP2:
return true;
default: default:
if (!brw_is_single_value_swizzle(swizzle)) {
/* Check if there happens to be no reswizzling required. */ /* Check if there happens to be no reswizzling required. */
for (int c = 0; c < 4; c++) { for (int c = 0; c < 4; c++) {
int bit = 1 << BRW_GET_SWZ(swizzle, c); int bit = 1 << BRW_GET_SWZ(swizzle, c);
@ -964,6 +961,12 @@ vec4_instruction::can_reswizzle_dst(int dst_writemask,
} }
return true; return true;
} }
/* fallthrough */
case BRW_OPCODE_DP4:
case BRW_OPCODE_DP3:
case BRW_OPCODE_DP2:
return true;
}
} }
/** /**
@ -979,6 +982,21 @@ vec4_instruction::reswizzle_dst(int dst_writemask, int swizzle)
int new_writemask = 0; int new_writemask = 0;
switch (opcode) { switch (opcode) {
default:
if (!brw_is_single_value_swizzle(swizzle)) {
for (int c = 0; c < 4; c++) {
/* Skip components of the swizzle not used by the dst. */
if (!(dst_writemask & (1 << c)))
continue;
/* We don't do the reswizzling yet, so just sanity check that we
* don't have to.
*/
assert((1 << BRW_GET_SWZ(swizzle, c)) == (1 << c));
}
break;
}
/* fallthrough */
case BRW_OPCODE_DP4: case BRW_OPCODE_DP4:
case BRW_OPCODE_DP3: case BRW_OPCODE_DP3:
case BRW_OPCODE_DP2: case BRW_OPCODE_DP2:
@ -995,18 +1013,6 @@ vec4_instruction::reswizzle_dst(int dst_writemask, int swizzle)
} }
dst.writemask = new_writemask; dst.writemask = new_writemask;
break; break;
default:
for (int c = 0; c < 4; c++) {
/* Skip components of the swizzle not used by the dst. */
if (!(dst_writemask & (1 << c)))
continue;
/* We don't do the reswizzling yet, so just sanity check that we
* don't have to.
*/
assert((1 << BRW_GET_SWZ(swizzle, c)) == (1 << c));
}
break;
} }
} }