From 03f762f90c54c09e58cc736e0ac7c684ac367a45 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Tue, 1 Oct 2024 14:04:52 +0300 Subject: [PATCH] intel/ds: add L3 fabric flush support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Nanley Chery Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/ds/intel_driver_ds.cc | 3 ++- src/intel/ds/intel_driver_ds.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/intel/ds/intel_driver_ds.cc b/src/intel/ds/intel_driver_ds.cc index 618cd2fa90a..cb4ff78afba 100644 --- a/src/intel/ds/intel_driver_ds.cc +++ b/src/intel/ds/intel_driver_ds.cc @@ -332,12 +332,13 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage auto data = event->add_extra_data(); data->set_name("stall_reason"); - snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s%s%s%s%s%s%s", + snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s%s%s%s%s%s%s", (payload->flags & INTEL_DS_DEPTH_CACHE_FLUSH_BIT) ? "+depth_flush" : "", (payload->flags & INTEL_DS_DATA_CACHE_FLUSH_BIT) ? "+dc_flush" : "", (payload->flags & INTEL_DS_HDC_PIPELINE_FLUSH_BIT) ? "+hdc_flush" : "", (payload->flags & INTEL_DS_RENDER_TARGET_CACHE_FLUSH_BIT) ? "+rt_flush" : "", (payload->flags & INTEL_DS_TILE_CACHE_FLUSH_BIT) ? "+tile_flush" : "", + (payload->flags & INTEL_DS_L3_FABRIC_FLUSH_BIT) ? "+l3_fabric_flush" : "", (payload->flags & INTEL_DS_STATE_CACHE_INVALIDATE_BIT) ? "+state_inv" : "", (payload->flags & INTEL_DS_CONST_CACHE_INVALIDATE_BIT) ? "+const_inv" : "", (payload->flags & INTEL_DS_VF_CACHE_INVALIDATE_BIT) ? "+vf_inv" : "", diff --git a/src/intel/ds/intel_driver_ds.h b/src/intel/ds/intel_driver_ds.h index 505abb8eb53..c0d82230803 100644 --- a/src/intel/ds/intel_driver_ds.h +++ b/src/intel/ds/intel_driver_ds.h @@ -59,6 +59,7 @@ enum intel_ds_stall_flag { INTEL_DS_PSS_STALL_SYNC_BIT = BITFIELD_BIT(14), INTEL_DS_END_OF_PIPE_BIT = BITFIELD_BIT(15), INTEL_DS_CCS_CACHE_FLUSH_BIT = BITFIELD_BIT(16), + INTEL_DS_L3_FABRIC_FLUSH_BIT = BITFIELD_BIT(17), }; enum intel_ds_tracepoint_flags {