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brw: Add and use more brw_validate.cpp macros
Add and use more comparison variants (which provide more detailed print out of the values), remove old references to "fsv" and "scalar", use assertion names more similar to GoogleTest that we already use elsewhere. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37267>
This commit is contained in:
parent
a9ea4630d4
commit
03e9c01f0c
1 changed files with 141 additions and 145 deletions
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@ -31,63 +31,59 @@
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#include "brw_cfg.h"
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#include "brw_eu.h"
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#define fsv_assert(assertion) \
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{ \
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if (!(assertion)) { \
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fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", \
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_mesa_shader_stage_to_abbrev(s.stage)); \
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brw_print_instruction(s, inst, stderr); \
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fprintf(stderr, "%s:%d: '%s' failed\n", __FILE__, __LINE__, #assertion); \
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abort(); \
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} \
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}
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#define fsv_assert_eq(A, B) \
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{ \
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uintptr_t a = uintptr_t(A); \
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uintptr_t b = uintptr_t(B); \
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if (a != b) { \
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fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", \
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_mesa_shader_stage_to_abbrev(s.stage)); \
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brw_print_instruction(s, inst, stderr); \
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fprintf(stderr, "%s:%d: A == B failed\n", __FILE__, __LINE__); \
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fprintf(stderr, " A = %s = %" PRIuPTR "\n", #A, a); \
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fprintf(stderr, " B = %s = %" PRIuPTR "\n", #B, b); \
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abort(); \
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} \
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}
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#define fsv_assert_ne(A, B) \
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{ \
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unsigned a = (A); \
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unsigned b = (B); \
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if (a == b) { \
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fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", \
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_mesa_shader_stage_to_abbrev(s.stage)); \
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brw_print_instruction(s, inst, stderr); \
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fprintf(stderr, "%s:%d: A != B failed\n", __FILE__, __LINE__); \
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fprintf(stderr, " A = %s = %u\n", #A, a); \
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fprintf(stderr, " B = %s = %u\n", #B, b); \
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abort(); \
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} \
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}
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#define fsv_assert_lte(A, B) \
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{ \
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unsigned a = (A); \
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unsigned b = (B); \
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if (a > b) { \
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fprintf(stderr, "ASSERT: Scalar %s validation failed!\n", \
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_mesa_shader_stage_to_abbrev(s.stage)); \
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brw_print_instruction(s, inst, stderr); \
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fprintf(stderr, "%s:%d: A <= B failed\n", __FILE__, __LINE__); \
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fprintf(stderr, " A = %s = %u\n", #A, a); \
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fprintf(stderr, " B = %s = %u\n", #B, b); \
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abort(); \
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} \
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}
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#ifndef NDEBUG
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static void
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brw_validate_abort_with_message_fmt(const brw_shader &s,
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const brw_inst *inst,
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const char *filename,
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unsigned line,
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const char *fmt, ...)
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{
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fprintf(stderr,
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"ASSERT: BRW %s validation failed!\n",
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_mesa_shader_stage_to_abbrev(s.stage));
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brw_print_instruction(s, inst, stderr);
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fprintf(stderr, "%s:%d: ", filename, line);
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va_list args;
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va_start(args, fmt);
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vfprintf(stderr, fmt, args);
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va_end(args);
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fputc('\n', stderr);
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abort();
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}
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#define VAL_ASSERT(assertion) \
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if (!(assertion)) { \
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brw_validate_abort_with_message_fmt( \
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s, inst, __FILE__, __LINE__, \
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"'%s' failed\n", #assertion); \
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}
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#define VAL_ASSERT_CMP(A, COMPARATOR, B) \
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{ \
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const uintptr_t a = uintptr_t(A); \
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const uintptr_t b = uintptr_t(B); \
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if (!(a COMPARATOR b)) { \
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brw_validate_abort_with_message_fmt( \
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s, inst, __FILE__, __LINE__, \
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"A %s B failed\n" \
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" A = %s = %" PRIuPTR "\n" \
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" B = %s = %" PRIuPTR "\n", \
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#COMPARATOR, #A, a, #B, b); \
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} \
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}
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#define VAL_ASSERT_EQ(A, B) VAL_ASSERT_CMP(A, ==, B)
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#define VAL_ASSERT_NE(A, B) VAL_ASSERT_CMP(A, !=, B)
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#define VAL_ASSERT_LT(A, B) VAL_ASSERT_CMP(A, <, B)
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#define VAL_ASSERT_LE(A, B) VAL_ASSERT_CMP(A, <=, B)
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#define VAL_ASSERT_GT(A, B) VAL_ASSERT_CMP(A, >, B)
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#define VAL_ASSERT_GE(A, B) VAL_ASSERT_CMP(A, >=, B)
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static inline bool
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is_ud_imm(const brw_reg ®)
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{
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@ -105,15 +101,15 @@ validate_memory_logical(const brw_shader &s, const brw_inst *inst)
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{
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const intel_device_info *devinfo = s.devinfo;
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_OPCODE]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_MODE]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_BINDING_TYPE]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_COORD_COMPONENTS]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_ALIGNMENT]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_DATA_SIZE]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_COMPONENTS]));
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fsv_assert(is_ud_imm(inst->src[MEMORY_LOGICAL_FLAGS]));
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fsv_assert(is_d_imm(inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_OPCODE]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_MODE]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_BINDING_TYPE]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_COORD_COMPONENTS]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_ALIGNMENT]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_DATA_SIZE]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_COMPONENTS]));
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VAL_ASSERT(is_ud_imm(inst->src[MEMORY_LOGICAL_FLAGS]));
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VAL_ASSERT(is_d_imm(inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET]));
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enum lsc_opcode op = (enum lsc_opcode) inst->src[MEMORY_LOGICAL_OPCODE].ud;
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enum memory_flags flags = (memory_flags)inst->src[MEMORY_LOGICAL_FLAGS].ud;
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@ -127,7 +123,7 @@ validate_memory_logical(const brw_shader &s, const brw_inst *inst)
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unsigned data_size_B = lsc_data_size_bytes(data_size);
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if (!devinfo->has_lsc) {
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fsv_assert(data_size == LSC_DATA_SIZE_D8U32 ||
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VAL_ASSERT(data_size == LSC_DATA_SIZE_D8U32 ||
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data_size == LSC_DATA_SIZE_D16U32 ||
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data_size == LSC_DATA_SIZE_D32 ||
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data_size == LSC_DATA_SIZE_D64);
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@ -135,62 +131,62 @@ validate_memory_logical(const brw_shader &s, const brw_inst *inst)
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if (transpose) {
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const unsigned min_alignment =
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mode == MEMORY_MODE_SHARED_LOCAL ? 16 : 4;
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fsv_assert(inst->src[MEMORY_LOGICAL_ALIGNMENT].ud >= min_alignment);
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VAL_ASSERT_GE(inst->src[MEMORY_LOGICAL_ALIGNMENT].ud, min_alignment);
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}
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}
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fsv_assert(!transpose || !include_helpers);
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fsv_assert(!transpose || lsc_opcode_has_transpose(op));
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VAL_ASSERT(!transpose || !include_helpers);
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VAL_ASSERT(!transpose || lsc_opcode_has_transpose(op));
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if (inst->src[MEMORY_LOGICAL_BINDING_TYPE].ud == LSC_ADDR_SURFTYPE_FLAT)
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fsv_assert(inst->src[MEMORY_LOGICAL_BINDING].file == BAD_FILE);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_BINDING].file, BAD_FILE);
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if (inst->src[MEMORY_LOGICAL_DATA1].file != BAD_FILE) {
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fsv_assert(inst->src[MEMORY_LOGICAL_COMPONENTS].ud ==
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inst->components_read(MEMORY_LOGICAL_DATA1));
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_COMPONENTS].ud,
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inst->components_read(MEMORY_LOGICAL_DATA1));
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fsv_assert(inst->src[MEMORY_LOGICAL_DATA0].type ==
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inst->src[MEMORY_LOGICAL_DATA1].type);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_DATA0].type,
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inst->src[MEMORY_LOGICAL_DATA1].type);
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}
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if (inst->src[MEMORY_LOGICAL_DATA0].file != BAD_FILE) {
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fsv_assert(inst->src[MEMORY_LOGICAL_COMPONENTS].ud ==
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inst->components_read(MEMORY_LOGICAL_DATA0));
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_COMPONENTS].ud,
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inst->components_read(MEMORY_LOGICAL_DATA0));
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fsv_assert(brw_type_size_bytes(inst->src[MEMORY_LOGICAL_DATA0].type) ==
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data_size_B);
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VAL_ASSERT_EQ(brw_type_size_bytes(inst->src[MEMORY_LOGICAL_DATA0].type),
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data_size_B);
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}
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if (inst->dst.file != BAD_FILE)
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fsv_assert(brw_type_size_bytes(inst->dst.type) == data_size_B);
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VAL_ASSERT_EQ(brw_type_size_bytes(inst->dst.type), data_size_B);
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/** TGM messages cannot have a base offset */
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if (mode == MEMORY_MODE_TYPED)
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fsv_assert(inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET].d == 0);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET].d, 0);
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/* Offset must be DWord aligned */
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fsv_assert((inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET].d % 4) == 0);
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VAL_ASSERT_EQ((inst->src[MEMORY_LOGICAL_ADDRESS_OFFSET].d % 4), 0);
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switch (inst->opcode) {
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case SHADER_OPCODE_MEMORY_LOAD_LOGICAL:
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fsv_assert(op == LSC_OP_LOAD || op == LSC_OP_LOAD_CMASK ||
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VAL_ASSERT(op == LSC_OP_LOAD || op == LSC_OP_LOAD_CMASK ||
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op == LSC_OP_LOAD_CMASK_MSRT);
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fsv_assert(inst->src[MEMORY_LOGICAL_DATA0].file == BAD_FILE);
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fsv_assert(inst->src[MEMORY_LOGICAL_DATA1].file == BAD_FILE);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_DATA0].file, BAD_FILE);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_DATA1].file, BAD_FILE);
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break;
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case SHADER_OPCODE_MEMORY_STORE_LOGICAL:
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fsv_assert(lsc_opcode_is_store(op));
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fsv_assert(inst->src[MEMORY_LOGICAL_DATA0].file != BAD_FILE);
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fsv_assert(inst->src[MEMORY_LOGICAL_DATA1].file == BAD_FILE);
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VAL_ASSERT(lsc_opcode_is_store(op));
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VAL_ASSERT_NE(inst->src[MEMORY_LOGICAL_DATA0].file, BAD_FILE);
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_DATA1].file, BAD_FILE);
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break;
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case SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL:
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fsv_assert(lsc_opcode_is_atomic(op));
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fsv_assert((inst->src[MEMORY_LOGICAL_DATA0].file == BAD_FILE)
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== (lsc_op_num_data_values(op) < 1));
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fsv_assert((inst->src[MEMORY_LOGICAL_DATA1].file == BAD_FILE)
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== (lsc_op_num_data_values(op) < 2));
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fsv_assert(inst->src[MEMORY_LOGICAL_COMPONENTS].ud == 1);
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fsv_assert(!include_helpers);
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VAL_ASSERT(lsc_opcode_is_atomic(op));
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VAL_ASSERT_EQ((inst->src[MEMORY_LOGICAL_DATA0].file == BAD_FILE),
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(lsc_op_num_data_values(op) < 1));
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VAL_ASSERT_EQ((inst->src[MEMORY_LOGICAL_DATA1].file == BAD_FILE),
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(lsc_op_num_data_values(op) < 2));
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VAL_ASSERT_EQ(inst->src[MEMORY_LOGICAL_COMPONENTS].ud, 1);
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VAL_ASSERT(!include_helpers);
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break;
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default:
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UNREACHABLE("invalid opcode");
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@ -312,27 +308,27 @@ brw_validate(const brw_shader &s)
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switch (inst->opcode) {
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case SHADER_OPCODE_SEND:
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fsv_assert(inst->sources == SEND_NUM_SRCS);
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fsv_assert(is_uniform(inst->src[SEND_SRC_DESC]));
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fsv_assert(is_uniform(inst->src[SEND_SRC_EX_DESC]));
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fsv_assert(inst->src[SEND_SRC_PAYLOAD1].file != BAD_FILE);
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fsv_assert(inst->ex_mlen > 0 ||
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VAL_ASSERT_EQ(inst->sources, SEND_NUM_SRCS);
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VAL_ASSERT(is_uniform(inst->src[SEND_SRC_DESC]));
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VAL_ASSERT(is_uniform(inst->src[SEND_SRC_EX_DESC]));
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VAL_ASSERT_NE(inst->src[SEND_SRC_PAYLOAD1].file, BAD_FILE);
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VAL_ASSERT(inst->ex_mlen > 0 ||
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inst->src[SEND_SRC_PAYLOAD2].file == BAD_FILE);
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/* Send payloads cannot be immediates nor have source modifiers */
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for (unsigned i = 0; i < 2; i++) {
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fsv_assert(inst->src[SEND_SRC_PAYLOAD1 + i].file != IMM);
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fsv_assert(!inst->src[SEND_SRC_PAYLOAD1 + i].abs);
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fsv_assert(!inst->src[SEND_SRC_PAYLOAD1 + i].negate);
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VAL_ASSERT_NE(inst->src[SEND_SRC_PAYLOAD1 + i].file, IMM);
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VAL_ASSERT(!inst->src[SEND_SRC_PAYLOAD1 + i].abs);
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VAL_ASSERT(!inst->src[SEND_SRC_PAYLOAD1 + i].negate);
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}
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break;
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case SHADER_OPCODE_SEND_GATHER:
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fsv_assert(is_uniform(inst->src[0]) && is_uniform(inst->src[1]));
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fsv_assert(devinfo->ver >= 30);
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VAL_ASSERT(is_uniform(inst->src[0]) && is_uniform(inst->src[1]));
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VAL_ASSERT_GE(devinfo->ver, 30);
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break;
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case BRW_OPCODE_MOV:
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fsv_assert(inst->sources == 1);
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VAL_ASSERT_EQ(inst->sources, 1);
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break;
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case SHADER_OPCODE_MEMORY_LOAD_LOGICAL:
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@ -343,26 +339,26 @@ brw_validate(const brw_shader &s)
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case SHADER_OPCODE_MEMORY_FENCE:
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case SHADER_OPCODE_INTERLOCK:
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fsv_assert(inst->exec_size == 1);
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fsv_assert(inst->force_writemask_all);
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fsv_assert(inst->sources == 2);
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fsv_assert(is_ud_imm(inst->src[1])); /* commit enable */
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VAL_ASSERT_EQ(inst->exec_size, 1);
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VAL_ASSERT(inst->force_writemask_all);
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VAL_ASSERT_EQ(inst->sources, 2);
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VAL_ASSERT(is_ud_imm(inst->src[1])); /* commit enable */
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break;
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case SHADER_OPCODE_LOAD_REG: {
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fsv_assert_eq(inst->sources, 1);
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fsv_assert_eq(s.alloc.sizes[inst->dst.nr] * REG_SIZE, inst->size_written);
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fsv_assert(!inst->is_partial_write());
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fsv_assert_lte(inst->src[0].stride, 1);
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VAL_ASSERT_EQ(inst->sources, 1);
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VAL_ASSERT_EQ(s.alloc.sizes[inst->dst.nr] * REG_SIZE, inst->size_written);
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VAL_ASSERT(!inst->is_partial_write());
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VAL_ASSERT_LE(inst->src[0].stride, 1);
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/* For example, if file == UNIFORM, stride will be zero and offset
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* may be non-zero.
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*/
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if (inst->src[0].stride != 0)
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fsv_assert_eq(inst->src[0].offset, 0);
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VAL_ASSERT_EQ(inst->src[0].offset, 0);
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const brw_def_analysis &defs = s.def_analysis.require();
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fsv_assert_eq(inst, defs.get(inst->dst));
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VAL_ASSERT_EQ(inst, defs.get(inst->dst));
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break;
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}
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@ -376,7 +372,7 @@ brw_validate(const brw_shader &s)
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* feature earlier in the process.
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*/
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if (devinfo->ver >= 20 && inst->writes_accumulator) {
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fsv_assert(inst->dst.is_accumulator() ||
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VAL_ASSERT(inst->dst.is_accumulator() ||
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inst->opcode == BRW_OPCODE_ADDC ||
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inst->opcode == BRW_OPCODE_MACH ||
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inst->opcode == BRW_OPCODE_SUBB);
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@ -392,7 +388,7 @@ brw_validate(const brw_shader &s)
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brw_type_is_float_or_bfloat(inst->src[1].type) +
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brw_type_is_float_or_bfloat(inst->src[2].type);
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fsv_assert((integer_sources == 3 && float_sources == 0) ||
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VAL_ASSERT((integer_sources == 3 && float_sources == 0) ||
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(integer_sources == 0 && float_sources == 3));
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if (devinfo->ver >= 10) {
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@ -408,15 +404,15 @@ brw_validate(const brw_shader &s)
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break;
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case BRW_VERTICAL_STRIDE_1:
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fsv_assert_lte(12, devinfo->ver);
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VAL_ASSERT_GE(devinfo->ver, 12);
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break;
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case BRW_VERTICAL_STRIDE_2:
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fsv_assert_lte(devinfo->ver, 11);
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break;
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case BRW_VERTICAL_STRIDE_2:
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VAL_ASSERT_LE(devinfo->ver, 11);
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break;
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default:
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fsv_assert(!"invalid vstride");
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VAL_ASSERT(!"invalid vstride");
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break;
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}
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}
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@ -430,7 +426,7 @@ brw_validate(const brw_shader &s)
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|||
* fix them.
|
||||
*/
|
||||
for (unsigned i = 0; i < 3; i++) {
|
||||
fsv_assert_ne(inst->src[i].file, IMM);
|
||||
VAL_ASSERT_NE(inst->src[i].file, IMM);
|
||||
|
||||
/* A stride of 1 (the usual case) or 0, with a special
|
||||
* "repctrl" bit, is allowed. The repctrl bit doesn't work
|
||||
|
|
@ -449,32 +445,32 @@ brw_validate(const brw_shader &s)
|
|||
* after SIMD splitting.
|
||||
*/
|
||||
if (!inst->src[i].is_scalar)
|
||||
fsv_assert_lte(size_in_bytes, 4);
|
||||
VAL_ASSERT_LE(size_in_bytes, 4);
|
||||
} else {
|
||||
fsv_assert_eq(stride_in_bytes, size_in_bytes);
|
||||
VAL_ASSERT_EQ(stride_in_bytes, size_in_bytes);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (inst->dst.file == VGRF) {
|
||||
fsv_assert_lte(inst->dst.offset / REG_SIZE + regs_written(inst),
|
||||
s.alloc.sizes[inst->dst.nr]);
|
||||
VAL_ASSERT_LE(inst->dst.offset / REG_SIZE + regs_written(inst),
|
||||
s.alloc.sizes[inst->dst.nr]);
|
||||
if (inst->exec_size > 1)
|
||||
fsv_assert_ne(inst->dst.stride, 0);
|
||||
VAL_ASSERT_NE(inst->dst.stride, 0);
|
||||
} else if (inst->dst.is_address()) {
|
||||
fsv_assert(inst->dst.nr != 0);
|
||||
VAL_ASSERT_NE(inst->dst.nr, 0);
|
||||
}
|
||||
|
||||
bool read_address_reg = false;
|
||||
for (unsigned i = 0; i < inst->sources; i++) {
|
||||
if (inst->src[i].file == VGRF) {
|
||||
fsv_assert_lte(inst->src[i].offset / REG_SIZE + regs_read(devinfo, inst, i),
|
||||
s.alloc.sizes[inst->src[i].nr]);
|
||||
VAL_ASSERT_LE(inst->src[i].offset / REG_SIZE + regs_read(devinfo, inst, i),
|
||||
s.alloc.sizes[inst->src[i].nr]);
|
||||
} else if (inst->src[i].is_address()) {
|
||||
fsv_assert(inst->src[i].nr != 0);
|
||||
VAL_ASSERT_NE(inst->src[i].nr, 0);
|
||||
for (unsigned hw = 0; hw < inst->size_read(devinfo, i); hw += 2) {
|
||||
fsv_assert_eq(inst->src[i].nr,
|
||||
VAL_ASSERT_EQ(inst->src[i].nr,
|
||||
last_used_address_register[inst->src[i].address_slot(hw)]);
|
||||
}
|
||||
read_address_reg = true;
|
||||
|
|
@ -489,7 +485,7 @@ brw_validate(const brw_shader &s)
|
|||
if (intel_needs_workaround(devinfo, 14014617373) &&
|
||||
inst->dst.is_accumulator() &&
|
||||
phys_subnr(devinfo, inst->dst) == 0) {
|
||||
fsv_assert_eq(inst->dst.hstride, 1);
|
||||
VAL_ASSERT_EQ(inst->dst.hstride, 1);
|
||||
}
|
||||
|
||||
if (inst->is_math() && intel_needs_workaround(devinfo, 22016140776)) {
|
||||
|
|
@ -505,7 +501,7 @@ brw_validate(const brw_shader &s)
|
|||
* potential problems sooner rather than later.
|
||||
*/
|
||||
if (devinfo->ver >= 20 && inst->writes_accumulator) {
|
||||
fsv_assert(inst->dst.is_accumulator() ||
|
||||
VAL_ASSERT(inst->dst.is_accumulator() ||
|
||||
inst->opcode == BRW_OPCODE_ADDC ||
|
||||
inst->opcode == BRW_OPCODE_MACH ||
|
||||
inst->opcode == BRW_OPCODE_SUBB);
|
||||
|
|
@ -521,7 +517,7 @@ brw_validate(const brw_shader &s)
|
|||
brw_type_is_float(inst->src[1].type) +
|
||||
brw_type_is_float(inst->src[2].type);
|
||||
|
||||
fsv_assert((integer_sources == 3 && float_sources == 0) ||
|
||||
VAL_ASSERT((integer_sources == 3 && float_sources == 0) ||
|
||||
(integer_sources == 0 && float_sources == 3));
|
||||
|
||||
if (devinfo->ver >= 10) {
|
||||
|
|
@ -537,15 +533,15 @@ brw_validate(const brw_shader &s)
|
|||
break;
|
||||
|
||||
case BRW_VERTICAL_STRIDE_1:
|
||||
fsv_assert_lte(12, devinfo->ver);
|
||||
VAL_ASSERT_GE(devinfo->ver, 12);
|
||||
break;
|
||||
|
||||
case BRW_VERTICAL_STRIDE_2:
|
||||
fsv_assert_lte(devinfo->ver, 11);
|
||||
VAL_ASSERT_LE(devinfo->ver, 11);
|
||||
break;
|
||||
|
||||
default:
|
||||
fsv_assert(!"invalid vstride");
|
||||
VAL_ASSERT(!"invalid vstride");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -559,7 +555,7 @@ brw_validate(const brw_shader &s)
|
|||
* will fix them.
|
||||
*/
|
||||
for (unsigned i = 0; i < 3; i++) {
|
||||
fsv_assert_ne(inst->src[i].file, IMM);
|
||||
VAL_ASSERT_NE(inst->src[i].file, IMM);
|
||||
|
||||
/* A stride of 1 (the usual case) or 0, with a special
|
||||
* "repctrl" bit, is allowed. The repctrl bit doesn't
|
||||
|
|
@ -574,21 +570,21 @@ brw_validate(const brw_shader &s)
|
|||
const unsigned stride_in_bytes = byte_stride(inst->src[i]);
|
||||
const unsigned size_in_bytes = brw_type_size_bytes(inst->src[i].type);
|
||||
if (stride_in_bytes == 0) {
|
||||
fsv_assert_lte(size_in_bytes, 4);
|
||||
VAL_ASSERT_LE(size_in_bytes, 4);
|
||||
} else {
|
||||
fsv_assert_eq(stride_in_bytes, size_in_bytes);
|
||||
VAL_ASSERT_EQ(stride_in_bytes, size_in_bytes);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (inst->dst.file == VGRF) {
|
||||
fsv_assert_lte(inst->dst.offset / REG_SIZE + regs_written(inst),
|
||||
s.alloc.sizes[inst->dst.nr]);
|
||||
VAL_ASSERT_LE(inst->dst.offset / REG_SIZE + regs_written(inst),
|
||||
s.alloc.sizes[inst->dst.nr]);
|
||||
}
|
||||
|
||||
for (unsigned i = 0; i < inst->sources; i++) {
|
||||
fsv_assert(inst->src[i].is_scalar ||
|
||||
VAL_ASSERT(inst->src[i].is_scalar ||
|
||||
!is_uniform(inst->src[i]) ||
|
||||
inst->src[i].type != BRW_TYPE_HF);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue