From 03a32b3fe231ca4261a3dfe4fb1eac56e28ece5e Mon Sep 17 00:00:00 2001 From: Yonggang Luo Date: Tue, 11 Nov 2025 14:58:31 +0800 Subject: [PATCH] radeon/drm: Replace all usage of ALIGN to align and remove ALIGN macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As now all ALIGN usage is on 32bit integer Signed-off-by: Yonggang Luo Reviewed-by: Timur Kristóf Acked-by: Alyssa Rosenzweig Part-of: --- .../winsys/radeon/drm/radeon_surface.c | 25 +++++++++---------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/src/gallium/winsys/radeon/drm/radeon_surface.c b/src/gallium/winsys/radeon/drm/radeon_surface.c index 1c235b0423b..50742f6f22a 100644 --- a/src/gallium/winsys/radeon/drm/radeon_surface.c +++ b/src/gallium/winsys/radeon/drm/radeon_surface.c @@ -42,7 +42,6 @@ #define CIK_TILE_MODE_DEPTH_STENCIL_2D_TILESPLIT_512 3 #define CIK_TILE_MODE_DEPTH_STENCIL_2D_TILESPLIT_ROW_SIZE 4 -#define ALIGN(value, alignment) (((value) + alignment - 1) & ~(alignment - 1)) /* keep this private */ enum radeon_family { @@ -179,9 +178,9 @@ static void surf_minify(struct radeon_surface *surf, return; } } - surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); - surflevel->nblk_y = ALIGN(surflevel->nblk_y, yalign); - surflevel->nblk_z = ALIGN(surflevel->nblk_z, zalign); + surflevel->nblk_x = align(surflevel->nblk_x, xalign); + surflevel->nblk_y = align(surflevel->nblk_y, yalign); + surflevel->nblk_z = align(surflevel->nblk_z, zalign); surflevel->offset = offset; surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; @@ -588,9 +587,9 @@ static void eg_surf_minify(struct radeon_surface *surf, return; } } - surflevel->nblk_x = ALIGN(surflevel->nblk_x, mtilew); - surflevel->nblk_y = ALIGN(surflevel->nblk_y, mtileh); - surflevel->nblk_z = ALIGN(surflevel->nblk_z, 1); + surflevel->nblk_x = align(surflevel->nblk_x, mtilew); + surflevel->nblk_y = align(surflevel->nblk_y, mtileh); + surflevel->nblk_z = align(surflevel->nblk_z, 1); /* macro tile per row */ mtile_pr = surflevel->nblk_x / mtilew; @@ -1470,7 +1469,7 @@ static void si_surf_minify(struct radeon_surface *surf, surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; } - surflevel->nblk_y = ALIGN(surflevel->nblk_y, yalign); + surflevel->nblk_y = align(surflevel->nblk_y, yalign); /* XXX: Texture sampling uses unexpectedly large pitches in some cases, * these are just guesses for the rules behind those @@ -1483,8 +1482,8 @@ static void si_surf_minify(struct radeon_surface *surf, /* Small rows evenly distributed across slice */ xalign = MAX2(xalign, slice_align / bpe / surflevel->nblk_y); - surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); - surflevel->nblk_z = ALIGN(surflevel->nblk_z, zalign); + surflevel->nblk_x = align(surflevel->nblk_x, xalign); + surflevel->nblk_z = align(surflevel->nblk_z, zalign); surflevel->offset = offset; surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; @@ -1527,9 +1526,9 @@ static void si_surf_minify_2d(struct radeon_surface *surf, return; } } - surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); - surflevel->nblk_y = ALIGN(surflevel->nblk_y, yalign); - surflevel->nblk_z = ALIGN(surflevel->nblk_z, zalign); + surflevel->nblk_x = align(surflevel->nblk_x, xalign); + surflevel->nblk_y = align(surflevel->nblk_y, yalign); + surflevel->nblk_z = align(surflevel->nblk_z, zalign); /* macro tile per row */ mtile_pr = surflevel->nblk_x / xalign;