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i965/gen6 depth surface: calculate minimum array element being rendered

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(a23cfb8 for gen6)

In layered rendering this will be 0. Otherwise it will be the
selected slice.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jordan Justen 2013-07-09 15:24:56 -07:00
parent cfa19af966
commit 039eb81abf
2 changed files with 4 additions and 0 deletions
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2
src/mesa/drivers/dri/i965/gen6_blorp.cpp
View file

@ -807,6 +807,8 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
NULL,
&tile_mask_x, &tile_mask_y);
const unsigned min_array_element = params->depth.layer;
lod = params->depth.level - params->depth.mt->first_level;
/* 3DSTATE_DEPTH_BUFFER */

2
src/mesa/drivers/dri/i965/gen6_depth_state.c
View file

@ -98,6 +98,8 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
break;
}
const unsigned min_array_element = irb ? irb->mt_layer : 0;
lod = irb ? irb->mt_level - irb->mt->first_level : 0;
BEGIN_BATCH(7);