From 0397d8aac7e6a709b9681fe4d05cd1d9bb2f87e0 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Mon, 17 Jun 2024 23:27:48 -0700 Subject: [PATCH] intel/brw: Fix typo in DPAS emission code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The enums were mixed up. Code was working because they were being used only for their numerical values. Fixes: e666872c751 ("intel/compiler: Initial bits for DPAS instruction") Acked-by: Iván Briano Reviewed-by: Ian Romanick Part-of: (cherry picked from commit f982d2bb7976d3c581c5d42133695147c6c0ec10) --- .pick_status.json | 2 +- src/intel/compiler/brw_eu_emit.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 8feeef4204a..1c5e1aee880 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -484,7 +484,7 @@ "description": "intel/brw: Fix typo in DPAS emission code", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e666872c751bedd1e4c2e1231644c14ed18639e7", "notes": null diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 64834362a88..91f4bbdd36e 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -748,8 +748,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, } static brw_inst * -brw_dpas_three_src(struct brw_codegen *p, enum gfx12_systolic_depth opcode, - unsigned sdepth, unsigned rcount, struct brw_reg dest, +brw_dpas_three_src(struct brw_codegen *p, enum opcode opcode, + enum gfx12_systolic_depth sdepth, unsigned rcount, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) { const struct intel_device_info *devinfo = p->devinfo;