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r600: Replace TGSI I/O semantics with shader_enums

Browse source 
Removes the link-time dependency on tgsi_get_gl_varying_semantic from
Gallium auxiliary.

ps_prim_id_input linkage removed due to redundancy - the SPI SID is
calculated for VARYING_SLOT_PRIMITIVE_ID on both sides.

Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25695>
This commit is contained in:
Vitaliy Triang3l Kuzmin 2023-10-07 21:23:21 +03:00 • committed by Marge Bot
parent 29c544abc0
commit 03705f37bf
19 changed files with 528 additions and 559 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

73
src/gallium/drivers/r600/evergreen_state.c
View file

@ -35,6 +35,8 @@
#include "evergreen_compute.h"
#include "util/u_math.h"
#include <assert.h>
static inline unsigned evergreen_array_mode(unsigned mode)
{
switch (mode) {
@ -3435,19 +3437,21 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
}
for (i = 0; i < rshader->ninput; i++) {
const gl_varying_slot varying_slot = rshader->input[i].varying_slot;
/* evergreen NUM_INTERP only contains values interpolated into the LDS,
POSITION goes via GPRs from the SC so isn't counted */
if (rshader->input[i].name == TGSI_SEMANTIC_POSITION)
if (varying_slot == VARYING_SLOT_POS)
pos_index = i;
else if (rshader->input[i].name == TGSI_SEMANTIC_FACE) {
else if (varying_slot == VARYING_SLOT_FACE) {
if (face_index == -1)
face_index = i;
}
else if (rshader->input[i].name == TGSI_SEMANTIC_SAMPLEMASK) {
else if (rshader->input[i].system_value == SYSTEM_VALUE_SAMPLE_MASK_IN) {
if (face_index == -1)
face_index = i; /* lives in same register, same enable bit */
}
else if (rshader->input[i].name == TGSI_SEMANTIC_SAMPLEID) {
else if (rshader->input[i].system_value == SYSTEM_VALUE_SAMPLE_ID) {
fixed_pt_position_index = i;
}
else {
@ -3474,18 +3478,18 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
tmp = S_028644_SEMANTIC(sid);
/* D3D 9 behaviour. GL is undefined */
if (rshader->input[i].name == TGSI_SEMANTIC_COLOR && rshader->input[i].sid == 0)
if (varying_slot == VARYING_SLOT_COL0)
tmp |= S_028644_DEFAULT_VAL(3);
if (rshader->input[i].name == TGSI_SEMANTIC_POSITION ||
if (varying_slot == VARYING_SLOT_POS ||
rshader->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
(rshader->input[i].interpolate == TGSI_INTERPOLATE_COLOR && flatshade)) {
tmp |= S_028644_FLAT_SHADE(1);
}
if (rshader->input[i].name == TGSI_SEMANTIC_PCOORD ||
(rshader->input[i].name == TGSI_SEMANTIC_TEXCOORD &&
(sprite_coord_enable & (1 << rshader->input[i].sid)))) {
if (varying_slot == VARYING_SLOT_PNTC ||
(varying_slot >= VARYING_SLOT_TEX0 && varying_slot <= VARYING_SLOT_TEX7 &&
(sprite_coord_enable & (1 << ((int)varying_slot - (int)VARYING_SLOT_TEX0))))) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}
@ -3496,13 +3500,25 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
r600_store_context_reg_seq(cb, R_028644_SPI_PS_INPUT_CNTL_0, num);
r600_store_array(cb, num, spi_ps_input_cntl);
exports_ps = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
switch (rshader->output[i].frag_result) {
case FRAG_RESULT_DEPTH:
z_export = 1;
if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
exports_ps |= 1;
break;
case FRAG_RESULT_STENCIL:
stencil_export = 1;
if (rshader->output[i].name == TGSI_SEMANTIC_SAMPLEMASK && msaa)
mask_export = 1;
exports_ps |= 1;
break;
case FRAG_RESULT_SAMPLE_MASK:
if (msaa)
mask_export = 1;
exports_ps |= 1;
break;
default:
break;
}
}
if (rshader->uses_kill)
db_shader_control |= S_02880C_KILL_ENABLE(1);
@ -3531,14 +3547,6 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
break;
}
exports_ps = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
rshader->output[i].name == TGSI_SEMANTIC_STENCIL ||
rshader->output[i].name == TGSI_SEMANTIC_SAMPLEMASK)
exports_ps |= 1;
}
num_cout = rshader->ps_export_highest + 1;
exports_ps |= S_02884C_EXPORT_COLORS(num_cout);
@ -3686,14 +3694,16 @@ void evergreen_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader
struct r600_command_buffer *cb = &shader->command_buffer;
struct r600_shader *rshader = &shader->shader;
unsigned spi_vs_out_id[10] = {};
unsigned i, tmp, nparams = 0;
unsigned i;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].spi_sid) {
tmp = rshader->output[i].spi_sid << ((nparams & 3) * 8);
spi_vs_out_id[nparams / 4] |= tmp;
nparams++;
}
const int param = rshader->output[i].export_param;
if (param < 0)
continue;
unsigned *const param_spi_vs_out_id = &spi_vs_out_id[param / 4];
const unsigned param_shift = (param & 3) * 8;
assert(!(*param_spi_vs_out_id & (0xFFu << param_shift)));
*param_spi_vs_out_id |= (unsigned)rshader->output[i].spi_sid << param_shift;
}
r600_init_command_buffer(cb, 32);
@ -3703,15 +3713,8 @@ void evergreen_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader
r600_store_value(cb, spi_vs_out_id[i]);
}
/* Certain attributes (position, psize, etc.) don't count as params.
* VS is required to export at least one param and r600_shader_from_tgsi()
* takes care of adding a dummy export.
*/
if (nparams < 1)
nparams = 1;
r600_store_context_reg(cb, R_0286C4_SPI_VS_OUT_CONFIG,
S_0286C4_VS_EXPORT_COUNT(nparams - 1));
S_0286C4_VS_EXPORT_COUNT(rshader->highest_export_param));
r600_store_context_reg(cb, R_028860_SQ_PGM_RESOURCES_VS,
S_028860_NUM_GPRS(rshader->bc.ngpr) |
S_028860_DX10_CLAMP(1) |

23
src/gallium/drivers/r600/r600_dump.c
View file

@ -40,6 +40,8 @@ void print_shader_info(FILE *f , int id, struct r600_shader *shader)
if (shader->NAME[i].ELM) fprintf(f, " shader->" #NAME "[%d]." #ELM "=%d;\n", i, (int)shader->NAME[i].ELM)
#define PRINT_UINT_ARRAY_ELM(NAME, ELM) \
if (shader->NAME[i].ELM) fprintf(f, " shader->" #NAME "[%d]." #ELM" =%u;\n", i, (unsigned)shader->NAME[i].ELM)
#define PRINT_BOOL_ARRAY_ELM(NAME, ELM) \
if (shader->NAME[i].ELM) fprintf(f, " shader->" #NAME "[%d]." #ELM "=%s;\n", i, shader->NAME[i].ELM ? "true" : "false")
fprintf(f, "#include \"gallium/drivers/r600/r600_shader.h\"\n");
fprintf(f, "void shader_%d_fill_data(struct r600_shader *shader)\n{\n", id);
@ -51,34 +53,28 @@ void print_shader_info(FILE *f , int id, struct r600_shader *shader)
PRINT_UINT_MEMBER(nhwatomic);
PRINT_UINT_MEMBER(nlds);
PRINT_UINT_MEMBER(nsys_inputs);
PRINT_UINT_MEMBER(highest_export_param);
for (unsigned i = 0; i < shader->ninput; ++i) {
PRINT_UINT_ARRAY_ELM(input, name);
PRINT_INT_ARRAY_ELM(input, varying_slot);
PRINT_INT_ARRAY_ELM(input, system_value);
PRINT_UINT_ARRAY_ELM(input, gpr);
PRINT_UINT_ARRAY_ELM(input, done);
PRINT_INT_ARRAY_ELM(input, sid);
PRINT_INT_ARRAY_ELM(input, spi_sid);
PRINT_UINT_ARRAY_ELM(input, interpolate);
PRINT_UINT_ARRAY_ELM(input, ij_index);
PRINT_UINT_ARRAY_ELM(input, interpolate_location); // TGSI_INTERPOLATE_LOC_CENTER, CENTROID, SAMPLE
PRINT_UINT_ARRAY_ELM(input, lds_pos); /* for evergreen */
PRINT_UINT_ARRAY_ELM(input, back_color_input);
PRINT_UINT_ARRAY_ELM(input, write_mask);
PRINT_INT_ARRAY_ELM(input, ring_offset);
PRINT_BOOL_ARRAY_ELM(input, uses_interpolate_at_centroid);
}
for (unsigned i = 0; i < shader->noutput; ++i) {
PRINT_UINT_ARRAY_ELM(output, name);
PRINT_INT_ARRAY_ELM(output, varying_slot);
PRINT_INT_ARRAY_ELM(output, frag_result);
PRINT_UINT_ARRAY_ELM(output, gpr);
PRINT_UINT_ARRAY_ELM(output, done);
PRINT_INT_ARRAY_ELM(output, sid);
PRINT_INT_ARRAY_ELM(output, spi_sid);
PRINT_UINT_ARRAY_ELM(output, interpolate);
PRINT_UINT_ARRAY_ELM(output, ij_index);
PRINT_UINT_ARRAY_ELM(output, interpolate_location); // TGSI_INTERPOLATE_LOC_CENTER, CENTROID, SAMPLE
PRINT_UINT_ARRAY_ELM(output, lds_pos); /* for evergreen */
PRINT_UINT_ARRAY_ELM(output, back_color_input);
PRINT_UINT_ARRAY_ELM(output, write_mask);
PRINT_INT_ARRAY_ELM(output, export_param);
PRINT_INT_ARRAY_ELM(output, ring_offset);
}
@ -131,7 +127,6 @@ void print_shader_info(FILE *f , int id, struct r600_shader *shader)
PRINT_UINT_MEMBER(vs_as_gs_a);
PRINT_UINT_MEMBER(tes_as_es);
PRINT_UINT_MEMBER(tcs_prim_mode);
PRINT_UINT_MEMBER(ps_prim_id_input);
if (shader->num_arrays > 0) {
fprintf(stderr, " shader->arrays = new r600_shader_array[%d];\n", shader->num_arrays);

31
src/gallium/drivers/r600/r600_shader.c
View file

@ -47,6 +47,7 @@
#include "util/u_endian.h"
#include "util/u_memory.h"
#include "util/u_math.h"
#include <assert.h>
#include <stdio.h>
#include <errno.h>
@ -872,8 +873,10 @@ int generate_gs_copy_shader(struct r600_context *rctx,
/* XXX factor out common code with r600_shader_from_tgsi ? */
for (i = 0; i < ocnt; ++i) {
struct r600_shader_io *out = &ctx.shader->output[i];
/* The actual parameter export indices will be calculated here, ignore the copied ones. */
out->export_param = -1;
bool instream0 = true;
if (out->name == TGSI_SEMANTIC_CLIPVERTEX)
if (out->varying_slot == VARYING_SLOT_CLIP_VERTEX)
continue;
for (j = 0; j < so->num_outputs; j++) {
@ -896,13 +899,13 @@ int generate_gs_copy_shader(struct r600_context *rctx,
output.burst_count = 1;
output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
output.op = CF_OP_EXPORT;
switch (out->name) {
case TGSI_SEMANTIC_POSITION:
switch (out->varying_slot) {
case VARYING_SLOT_POS:
output.array_base = 60;
output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
break;
case TGSI_SEMANTIC_PSIZE:
case VARYING_SLOT_PSIZ:
output.array_base = 61;
if (next_clip_pos == 61)
next_clip_pos = 62;
@ -913,10 +916,11 @@ int generate_gs_copy_shader(struct r600_context *rctx,
ctx.shader->vs_out_misc_write = 1;
ctx.shader->vs_out_point_size = 1;
break;
case TGSI_SEMANTIC_LAYER:
case VARYING_SLOT_LAYER:
if (out->spi_sid) {
/* duplicate it as PARAM to pass to the pixel shader */
output.array_base = next_param++;
out->export_param = output.array_base;
r600_bytecode_add_output(ctx.bc, &output);
last_exp_param = ctx.bc->cf_last;
}
@ -931,10 +935,11 @@ int generate_gs_copy_shader(struct r600_context *rctx,
ctx.shader->vs_out_misc_write = 1;
ctx.shader->vs_out_layer = 1;
break;
case TGSI_SEMANTIC_VIEWPORT_INDEX:
case VARYING_SLOT_VIEWPORT:
if (out->spi_sid) {
/* duplicate it as PARAM to pass to the pixel shader */
output.array_base = next_param++;
out->export_param = output.array_base;
r600_bytecode_add_output(ctx.bc, &output);
last_exp_param = ctx.bc->cf_last;
}
@ -949,7 +954,8 @@ int generate_gs_copy_shader(struct r600_context *rctx,
output.swizzle_z = 7;
output.swizzle_w = 0;
break;
case TGSI_SEMANTIC_CLIPDIST:
case VARYING_SLOT_CLIP_DIST0:
case VARYING_SLOT_CLIP_DIST1:
/* spi_sid is 0 for clipdistance outputs that were generated
* for clipvertex - we don't need to pass them to PS */
ctx.shader->clip_dist_write = gs->shader.clip_dist_write;
@ -958,21 +964,25 @@ int generate_gs_copy_shader(struct r600_context *rctx,
if (out->spi_sid) {
/* duplicate it as PARAM to pass to the pixel shader */
output.array_base = next_param++;
out->export_param = output.array_base;
r600_bytecode_add_output(ctx.bc, &output);
last_exp_param = ctx.bc->cf_last;
}
output.array_base = next_clip_pos++;
output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
break;
case TGSI_SEMANTIC_FOG:
case VARYING_SLOT_FOGC:
output.swizzle_y = 4; /* 0 */
output.swizzle_z = 4; /* 0 */
output.swizzle_w = 5; /* 1 */
break;
default:
output.array_base = next_param++;
break;
}
if (output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM) {
output.array_base = next_param++;
out->export_param = output.array_base;
}
r600_bytecode_add_output(ctx.bc, &output);
if (output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM)
last_exp_param = ctx.bc->cf_last;
@ -1017,6 +1027,9 @@ int generate_gs_copy_shader(struct r600_context *rctx,
last_exp_pos->op = CF_OP_EXPORT_DONE;
last_exp_param->op = CF_OP_EXPORT_DONE;
assert(next_param > 0);
cshader->shader.highest_export_param = next_param - 1;
r600_bytecode_add_cfinst(ctx.bc, CF_OP_POP);
cf_pop = ctx.bc->cf_last;

11
src/gallium/drivers/r600/r600_shader_common.h
View file

@ -45,17 +45,17 @@ extern "C" {
*/
struct r600_shader_io {
unsigned name;
gl_varying_slot varying_slot;
gl_system_value system_value; /* Input only */
gl_frag_result frag_result;
unsigned gpr;
unsigned done;
unsigned sid;
int spi_sid;
unsigned interpolate;
unsigned ij_index;
unsigned interpolate_location; // TGSI_INTERPOLATE_LOC_CENTER, CENTROID, SAMPLE
unsigned lds_pos; /* for evergreen */
unsigned back_color_input;
unsigned write_mask;
int export_param; /* Output only */
int ring_offset;
unsigned uses_interpolate_at_centroid;
};
@ -77,6 +77,7 @@ struct r600_shader {
unsigned nhwatomic;
unsigned nlds;
unsigned nsys_inputs;
unsigned highest_export_param;
struct r600_shader_io input[R600_SHADER_MAX_INPUTS];
struct r600_shader_io output[R600_SHADER_MAX_OUTPUTS];
struct r600_shader_atomic atomics[8];
@ -118,7 +119,6 @@ struct r600_shader {
unsigned vs_as_gs_a;
unsigned tes_as_es;
unsigned tcs_prim_mode;
unsigned ps_prim_id_input;
unsigned num_loops;
struct r600_shader_array * arrays;
@ -145,7 +145,6 @@ union r600_shader_key {
unsigned dual_source_blend:1;
} ps;
struct {
unsigned prim_id_out:8;
unsigned first_atomic_counter:4;
unsigned as_es:1; /* export shader */
unsigned as_ls:1; /* local shader */

75
src/gallium/drivers/r600/r600_state.c
View file

@ -32,6 +32,8 @@
#include "util/u_framebuffer.h"
#include "util/u_dual_blend.h"
#include <assert.h>
static uint32_t r600_translate_blend_function(int blend_func)
{
switch (blend_func) {
@ -2478,11 +2480,15 @@ void r600_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
r600_store_context_reg_seq(cb, R_028644_SPI_PS_INPUT_CNTL_0, rshader->ninput);
for (i = 0; i < rshader->ninput; i++) {
if (rshader->input[i].name == TGSI_SEMANTIC_POSITION)
const gl_varying_slot varying_slot = rshader->input[i].varying_slot;
if (varying_slot == VARYING_SLOT_POS)
pos_index = i;
if (rshader->input[i].name == TGSI_SEMANTIC_FACE && face_index == -1)
face_index = i;
if (rshader->input[i].name == TGSI_SEMANTIC_SAMPLEID)
else if (varying_slot == VARYING_SLOT_FACE) {
if (face_index == -1)
face_index = i;
}
else if (rshader->input[i].system_value == SYSTEM_VALUE_SAMPLE_ID)
fixed_pt_position_index = i;
sid = rshader->input[i].spi_sid;
@ -2490,17 +2496,17 @@ void r600_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
tmp = S_028644_SEMANTIC(sid);
/* D3D 9 behaviour. GL is undefined */
if (rshader->input[i].name == TGSI_SEMANTIC_COLOR && rshader->input[i].sid == 0)
if (varying_slot == VARYING_SLOT_COL0)
tmp |= S_028644_DEFAULT_VAL(3);
if (rshader->input[i].name == TGSI_SEMANTIC_POSITION ||
if (varying_slot == VARYING_SLOT_POS ||
rshader->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
(rshader->input[i].interpolate == TGSI_INTERPOLATE_COLOR && flatshade))
tmp |= S_028644_FLAT_SHADE(1);
if (rshader->input[i].name == TGSI_SEMANTIC_PCOORD ||
(rshader->input[i].name == TGSI_SEMANTIC_TEXCOORD &&
sprite_coord_enable & (1 << rshader->input[i].sid))) {
if (varying_slot == VARYING_SLOT_PNTC ||
(varying_slot >= VARYING_SLOT_TEX0 && varying_slot <= VARYING_SLOT_TEX7 &&
(sprite_coord_enable & (1 << ((int)varying_slot - (int)VARYING_SLOT_TEX0))))) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}
@ -2519,13 +2525,25 @@ void r600_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
}
db_shader_control = 0;
exports_ps = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
switch (rshader->output[i].frag_result) {
case FRAG_RESULT_DEPTH:
z_export = 1;
if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
exports_ps |= 1;
break;
case FRAG_RESULT_STENCIL:
stencil_export = 1;
if (rshader->output[i].name == TGSI_SEMANTIC_SAMPLEMASK && msaa)
mask_export = 1;
exports_ps |= 1;
break;
case FRAG_RESULT_SAMPLE_MASK:
if (msaa)
mask_export = 1;
exports_ps |= 1;
break;
default:
break;
}
}
db_shader_control |= S_02880C_Z_EXPORT_ENABLE(z_export);
db_shader_control |= S_02880C_STENCIL_REF_EXPORT_ENABLE(stencil_export);
@ -2533,14 +2551,6 @@ void r600_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
if (rshader->uses_kill)
db_shader_control |= S_02880C_KILL_ENABLE(1);
exports_ps = 0;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
rshader->output[i].name == TGSI_SEMANTIC_STENCIL ||
rshader->output[i].name == TGSI_SEMANTIC_SAMPLEMASK) {
exports_ps |= 1;
}
}
num_cout = rshader->nr_ps_color_exports;
exports_ps |= S_028854_EXPORT_COLORS(num_cout);
if (!exports_ps) {
@ -2614,14 +2624,16 @@ void r600_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
struct r600_command_buffer *cb = &shader->command_buffer;
struct r600_shader *rshader = &shader->shader;
unsigned spi_vs_out_id[10] = {};
unsigned i, tmp, nparams = 0;
unsigned i;
for (i = 0; i < rshader->noutput; i++) {
if (rshader->output[i].spi_sid) {
tmp = rshader->output[i].spi_sid << ((nparams & 3) * 8);
spi_vs_out_id[nparams / 4] |= tmp;
nparams++;
}
const int param = rshader->output[i].export_param;
if (param < 0)
continue;
unsigned *const param_spi_vs_out_id = &spi_vs_out_id[param / 4];
const unsigned param_shift = (param & 3) * 8;
assert(!(*param_spi_vs_out_id & (0xFFu << param_shift)));
*param_spi_vs_out_id |= (unsigned)rshader->output[i].spi_sid << param_shift;
}
r600_init_command_buffer(cb, 32);
@ -2631,15 +2643,8 @@ void r600_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader *sha
r600_store_value(cb, spi_vs_out_id[i]);
}
/* Certain attributes (position, psize, etc.) don't count as params.
* VS is required to export at least one param and r600_shader_from_tgsi()
* takes care of adding a dummy export.
*/
if (nparams < 1)
nparams = 1;
r600_store_context_reg(cb, R_0286C4_SPI_VS_OUT_CONFIG,
S_0286C4_VS_EXPORT_COUNT(nparams - 1));
S_0286C4_VS_EXPORT_COUNT(rshader->highest_export_param));
r600_store_context_reg(cb, R_028868_SQ_PGM_RESOURCES_VS,
S_028868_NUM_GPRS(rshader->bc.ngpr) |
S_028868_DX10_CLAMP(1) |

1
src/gallium/drivers/r600/r600_state_common.c
View file

@ -840,7 +840,6 @@ static inline void r600_shader_selector_key(const struct pipe_context *ctx,
if (rctx->ps_shader->current->shader.gs_prim_id_input && !rctx->gs_shader) {
key->vs.as_gs_a = true;
key->vs.prim_id_out = rctx->ps_shader->current->shader.input[rctx->ps_shader->current->shader.ps_prim_id_input].spi_sid;
}
key->vs.first_atomic_counter = r600_get_hw_atomic_count(ctx, PIPE_SHADER_VERTEX);
break;

23
src/gallium/drivers/r600/sfn/sfn_instr.cpp
View file

@ -68,17 +68,28 @@ Instr::ready() const
return do_ready();
}
int
int_from_string_with_prefix(const std::string& str, const std::string& prefix)
bool
int_from_string_with_prefix_optional(const std::string& str,
const std::string& prefix,
int& value)
{
if (str.substr(0, prefix.length()) != prefix) {
std::cerr << "Expect '" << prefix << "' as start of '" << str << "'\n";
assert(0);
return false;
}
std::stringstream help(str.substr(prefix.length()));
int retval;
help >> retval;
help >> value;
return true;
}
int
int_from_string_with_prefix(const std::string& str, const std::string& prefix)
{
int retval = 0;
if (!int_from_string_with_prefix_optional(str, prefix, retval)) {
std::cerr << "Expect '" << prefix << "' as start of '" << str << "'\n";
assert(0);
}
return retval;
}

4
src/gallium/drivers/r600/sfn/sfn_instr.h
View file

@ -56,6 +56,10 @@ class LDSAtomicInstr;
class LDSReadInstr;
class RatInstr;
bool
int_from_string_with_prefix_optional(const std::string& str,
const std::string& prefix,
int& value);
int
int_from_string_with_prefix(const std::string& str, const std::string& prefix);
int

232
src/gallium/drivers/r600/sfn/sfn_shader.cpp
View file

@ -45,7 +45,7 @@
#include "sfn_shader_gs.h"
#include "sfn_shader_tess.h"
#include "sfn_shader_vs.h"
#include "tgsi/tgsi_from_mesa.h"
#include "util/u_math.h"
#include <numeric>
#include <sstream>
@ -54,101 +54,79 @@ namespace r600 {
using std::string;
std::pair<unsigned, unsigned>
r600_get_varying_semantic(unsigned varying_location)
{
std::pair<unsigned, unsigned> result;
tgsi_get_gl_varying_semantic(static_cast<gl_varying_slot>(varying_location),
true,
&result.first,
&result.second);
if (result.first == TGSI_SEMANTIC_GENERIC) {
result.second += 9;
} else if (result.first == TGSI_SEMANTIC_PCOORD) {
result.second = 8;
}
return result;
}
void
ShaderIO::set_sid(int sid)
{
m_sid = sid;
switch (m_name) {
case TGSI_SEMANTIC_POSITION:
case TGSI_SEMANTIC_PSIZE:
case TGSI_SEMANTIC_EDGEFLAG:
case TGSI_SEMANTIC_FACE:
case TGSI_SEMANTIC_SAMPLEMASK:
case TGSI_SEMANTIC_CLIPVERTEX:
m_spi_sid = 0;
break;
case TGSI_SEMANTIC_GENERIC:
case TGSI_SEMANTIC_TEXCOORD:
case TGSI_SEMANTIC_PCOORD:
m_spi_sid = m_sid + 1;
break;
default:
/* For non-generic params - pack name and sid into 8 bits */
m_spi_sid = (0x80 | (m_name << 3) | m_sid) + 1;
}
}
void
ShaderIO::override_spi_sid(int spi)
{
m_spi_sid = spi;
}
void
ShaderIO::print(std::ostream& os) const
{
os << m_type << " LOC:" << m_location << " NAME:" << m_name;
os << m_type << " LOC:" << m_location;
if (m_varying_slot != NUM_TOTAL_VARYING_SLOTS)
os << " VARYING_SLOT:" << static_cast<int>(m_varying_slot);
if (m_no_varying)
os << " NO_VARYING";
do_print(os);
}
if (m_sid > 0) {
os << " SID:" << m_sid << " SPI_SID:" << m_spi_sid;
int
ShaderIO::spi_sid() const
{
if (no_varying())
return 0;
switch (varying_slot()) {
case NUM_TOTAL_VARYING_SLOTS:
case VARYING_SLOT_POS:
case VARYING_SLOT_PSIZ:
case VARYING_SLOT_EDGE:
case VARYING_SLOT_FACE:
case VARYING_SLOT_CLIP_VERTEX:
return 0;
default:
static_assert(static_cast<int>(NUM_TOTAL_VARYING_SLOTS) <= 0x100 - 1,
"All varying slots plus 1 must be usable as 8-bit SPI semantic IDs");
return static_cast<int>(varying_slot()) + 1;
}
}
ShaderIO::ShaderIO(const char *type, int loc, int name):
ShaderIO::ShaderIO(const char *type, int loc, gl_varying_slot varying_slot):
m_type(type),
m_location(loc),
m_name(name)
m_varying_slot(varying_slot)
{
}
ShaderOutput::ShaderOutput(int location, int writemask, gl_varying_slot varying_slot):
ShaderIO("OUTPUT", location, varying_slot),
m_writemask(writemask)
{
}
ShaderOutput::ShaderOutput():
ShaderIO("OUTPUT", -1, -1)
{
}
ShaderOutput::ShaderOutput(int location, int name, int writemask):
ShaderIO("OUTPUT", location, name),
m_writemask(writemask)
ShaderOutput(-1, 0)
{
}
void
ShaderOutput::do_print(std::ostream& os) const
{
if (m_frag_result != static_cast<gl_frag_result>(FRAG_RESULT_MAX))
os << " FRAG_RESULT:" << static_cast<int>(m_frag_result);
os << " MASK:" << m_writemask;
}
ShaderInput::ShaderInput(int location, int name):
ShaderIO("INPUT", location, name)
ShaderInput::ShaderInput(int location, gl_varying_slot varying_slot):
ShaderIO("INPUT", location, varying_slot)
{
}
ShaderInput::ShaderInput():
ShaderInput(-1, -1)
ShaderInput(-1)
{
}
void
ShaderInput::do_print(std::ostream& os) const
{
if (m_system_value != SYSTEM_VALUE_MAX)
os << " SYSVALUE: " << static_cast<int>(m_system_value);
if (m_interpolator)
os << " INTERP:" << m_interpolator;
if (m_interpolate_loc)
@ -249,23 +227,25 @@ Shader::emit_instruction_from_string(const std::string& s)
bool
Shader::read_output(std::istream& is)
{
string value;
is >> value;
int pos = int_from_string_with_prefix(value, "LOC:");
is >> value;
int name = int_from_string_with_prefix(value, "NAME:");
is >> value;
int mask = int_from_string_with_prefix(value, "MASK:");
ShaderOutput output(pos, name, mask);
ShaderOutput output;
value.clear();
is >> value;
if (!value.empty()) {
int sid = int_from_string_with_prefix(value, "SID:");
output.set_sid(sid);
is >> value;
ASSERTED int spi_sid = int_from_string_with_prefix(value, "SPI_SID:");
assert(spi_sid == output.spi_sid());
std::string token;
for (is >> token; !token.empty(); token.clear(), is >> token) {
int value;
if (int_from_string_with_prefix_optional(token, "LOC:", value))
output.set_location(value);
else if (int_from_string_with_prefix_optional(token, "VARYING_SLOT:", value))
output.set_varying_slot(static_cast<gl_varying_slot>(value));
else if (token == "NO_VARYING")
output.set_no_varying(true);
else if (int_from_string_with_prefix_optional(token, "FRAG_RESULT:", value))
output.set_frag_result(static_cast<gl_frag_result>(value));
else if (int_from_string_with_prefix_optional(token, "MASK:", value))
output.set_writemask(value);
else {
std::cerr << "Unknown parse value '" << token << "'";
assert(!"Unknown parse value in read_output");
}
}
add_output(output);
@ -275,40 +255,33 @@ Shader::read_output(std::istream& is)
bool
Shader::read_input(std::istream& is)
{
string value;
is >> value;
int pos = int_from_string_with_prefix(value, "LOC:");
is >> value;
int name = int_from_string_with_prefix(value, "NAME:");
value.clear();
ShaderInput input(pos, name);
ShaderInput input;
int interp = 0;
int interp_loc = 0;
bool use_centroid = false;
is >> value;
while (!value.empty()) {
if (value.substr(0, 4) == "SID:") {
int sid = int_from_string_with_prefix(value, "SID:");
input.set_sid(sid);
} else if (value.substr(0, 8) == "SPI_SID:") {
ASSERTED int spi_sid = int_from_string_with_prefix(value, "SPI_SID:");
assert(spi_sid == input.spi_sid());
} else if (value.substr(0, 7) == "INTERP:") {
interp = int_from_string_with_prefix(value, "INTERP:");
} else if (value.substr(0, 5) == "ILOC:") {
interp_loc = int_from_string_with_prefix(value, "ILOC:");
} else if (value == "USE_CENTROID") {
std::string token;
for (is >> token; !token.empty(); token.clear(), is >> token) {
int value;
if (int_from_string_with_prefix_optional(token, "LOC:", value))
input.set_location(value);
else if (int_from_string_with_prefix_optional(token, "VARYING_SLOT:", value))
input.set_varying_slot(static_cast<gl_varying_slot>(value));
else if (token == "NO_VARYING")
input.set_no_varying(true);
else if (int_from_string_with_prefix_optional(token, "SYSVALUE:", value))
input.set_system_value(static_cast<gl_system_value>(value));
else if (int_from_string_with_prefix_optional(token, "INTERP:", interp))
;
else if (int_from_string_with_prefix_optional(token, "ILOC:", interp_loc))
;
else if (token == "USE_CENTROID")
use_centroid = true;
} else {
std::cerr << "Unknown parse value '" << value << "'";
assert(!value.c_str());
else {
std::cerr << "Unknown parse value '" << token << "'";
assert(!"Unknown parse value in read_input");
}
value.clear();
is >> value;
}
input.set_interpolator(interp, interp_loc, use_centroid);
@ -593,10 +566,10 @@ Shader::scan_shader(const nir_function *func)
}
}
int param_id = 0;
int export_param = 0;
for (auto& [index, out] : m_outputs) {
if (out.is_param())
out.set_pos(param_id++);
if (out.spi_sid())
out.set_export_param(export_param++);
}
return true;
@ -1673,46 +1646,61 @@ void
Shader::get_shader_info(r600_shader *sh_info)
{
sh_info->ninput = m_inputs.size();
int lds_pos = 0;
sh_info->nlds = 0;
int input_array_array_loc = 0;
for (auto& [index, info] : m_inputs) {
r600_shader_io& io = sh_info->input[input_array_array_loc++];
io.sid = info.sid();
io.varying_slot = info.varying_slot();
io.system_value = info.system_value();
io.gpr = info.gpr();
io.spi_sid = info.spi_sid();
io.ij_index = info.ij_index();
io.name = info.name();
io.interpolate = info.interpolator();
io.interpolate_location = info.interpolate_loc();
if (info.need_lds_pos())
io.lds_pos = lds_pos++;
else
if (info.need_lds_pos()) {
io.lds_pos = info.lds_pos();
sh_info->nlds = MAX2(unsigned(info.lds_pos() + 1), sh_info->nlds);
} else {
io.lds_pos = 0;
}
io.ring_offset = info.ring_offset();
io.uses_interpolate_at_centroid = info.uses_interpolate_at_centroid();
sfn_log << SfnLog::io << "Emit Input [" << index << "] sid:" << io.sid
<< " spi_sid:" << io.spi_sid << "\n";
sfn_log << SfnLog::io << "Emit input [" << index << "]";
if (io.varying_slot != NUM_TOTAL_VARYING_SLOTS)
sfn_log << " varying_slot:" << static_cast<int>(io.varying_slot);
if (io.system_value != SYSTEM_VALUE_MAX)
sfn_log << " system_value:" << static_cast<int>(io.system_value);
sfn_log << " spi_sid:" << io.spi_sid << "\n";
assert(io.spi_sid >= 0);
}
sh_info->nlds = lds_pos;
sh_info->noutput = m_outputs.size();
/* VS is required to export at least one parameter. */
sh_info->highest_export_param = 0;
sh_info->num_loops = m_nloops;
int output_array_array_loc = 0;
for (auto& [index, info] : m_outputs) {
r600_shader_io& io = sh_info->output[output_array_array_loc++];
io.sid = info.sid();
io.varying_slot = info.varying_slot();
io.frag_result = info.frag_result();
io.gpr = info.gpr();
io.spi_sid = info.spi_sid();
io.name = info.name();
io.write_mask = info.writemask();
io.export_param = info.export_param();
if (info.export_param() >= 0)
sh_info->highest_export_param = MAX2(unsigned(info.export_param()),
sh_info->highest_export_param);
sfn_log << SfnLog::io << "Emit output[" << index << "] sid:" << io.sid
<< " spi_sid:" << io.spi_sid << "\n";
sfn_log << SfnLog::io << "Emit output[" << index << "]";
if (io.varying_slot != NUM_TOTAL_VARYING_SLOTS)
sfn_log << " varying_slot:" << static_cast<int>(io.varying_slot);
if (io.frag_result != static_cast<gl_frag_result>(FRAG_RESULT_MAX))
sfn_log << " frag_result:" << static_cast<int>(io.frag_result);
sfn_log << " spi_sid:" << io.spi_sid << " write_mask:" << io.write_mask << "\n";
assert(io.spi_sid >= 0);
}

49
src/gallium/drivers/r600/sfn/sfn_shader.h
View file

@ -28,6 +28,7 @@
#define SFN_SHADER_H
#include "amd_family.h"
#include "compiler/shader_enums.h"
#include "gallium/drivers/r600/r600_shader.h"
#include "sfn_instr.h"
#include "sfn_instr_controlflow.h"
@ -49,58 +50,66 @@ namespace r600 {
class ShaderIO {
public:
void set_sid(int sid);
void override_spi_sid(int spi_sid);
void print(std::ostream& os) const;
int spi_sid() const { return m_spi_sid; }
unsigned sid() const { return m_sid; }
int location() const { return m_location; }
unsigned name() const { return m_name; }
void set_location(int location) { m_location = location; }
int pos() const { return m_pos; }
void set_pos(int pos) { m_pos = pos; }
gl_varying_slot varying_slot() const { return m_varying_slot; }
void set_varying_slot(gl_varying_slot varying_slot) { m_varying_slot = varying_slot; }
bool is_param() const { return m_is_param; }
void set_is_param(bool val) { m_is_param = val; }
bool no_varying() const { return m_no_varying; }
void set_no_varying(bool no_varying) { m_no_varying = no_varying; }
int spi_sid() const;
void set_gpr(int gpr) { m_gpr = gpr; }
int gpr() const { return m_gpr; }
protected:
ShaderIO(const char *type, int loc, int name);
ShaderIO(const char *type, int loc, gl_varying_slot varying_slot = NUM_TOTAL_VARYING_SLOTS);
private:
virtual void do_print(std::ostream& os) const = 0;
const char *m_type;
int m_location{-1};
int m_name{-1};
int m_sid{0};
int m_spi_sid{0};
int m_pos{0};
int m_is_param{false};
gl_varying_slot m_varying_slot{NUM_TOTAL_VARYING_SLOTS};
bool m_no_varying{false};
int m_gpr{0};
};
class ShaderOutput : public ShaderIO {
public:
ShaderOutput();
ShaderOutput(int location, int name, int writemask);
ShaderOutput(int location, int writemask,
gl_varying_slot varying_slot = NUM_TOTAL_VARYING_SLOTS);
gl_frag_result frag_result() const { return m_frag_result; }
void set_frag_result(gl_frag_result frag_result) { m_frag_result = frag_result; }
int writemask() const { return m_writemask; }
void set_writemask(int writemask) { m_writemask = writemask; }
int export_param() const { return m_export_param; }
void set_export_param(int export_param) { m_export_param = export_param; }
private:
void do_print(std::ostream& os) const override;
gl_frag_result m_frag_result{static_cast<gl_frag_result>(FRAG_RESULT_MAX)};
int m_writemask{0};
int m_export_param{-1};
};
class ShaderInput : public ShaderIO {
public:
ShaderInput();
ShaderInput(int location, int name);
ShaderInput(int location, gl_varying_slot varying_slot = NUM_TOTAL_VARYING_SLOTS);
gl_system_value system_value() const { return m_system_value; }
void set_system_value(gl_system_value system_value) { m_system_value = system_value; }
void set_interpolator(int interp, int interp_loc, bool uses_interpolate_at_centroid);
void set_uses_interpolate_at_centroid();
void set_need_lds_pos() { m_need_lds_pos = true; }
@ -119,6 +128,7 @@ public:
private:
void do_print(std::ostream& os) const override;
gl_system_value m_system_value{SYSTEM_VALUE_MAX};
int m_interpolator{0};
int m_interpolate_loc{0};
int m_ij_index{0};
@ -407,9 +417,6 @@ private:
};
std::pair<unsigned, unsigned>
r600_get_varying_semantic(unsigned varying_location);
} // namespace r600
#endif // SHADER_H

90
src/gallium/drivers/r600/sfn/sfn_shader_fs.cpp
View file

@ -64,8 +64,6 @@ FragmentShader::do_get_shader_info(r600_shader *sh_info)
sh_info->rat_base = m_rat_base;
sh_info->uses_kill = m_uses_discard;
sh_info->gs_prim_id_input = m_gs_prim_id_input;
if (chip_class() >= ISA_CC_EVERGREEN)
sh_info->ps_prim_id_input = m_ps_prim_id_input;
sh_info->nsys_inputs = m_nsys_inputs;
sh_info->uses_helper_invocation = m_helper_invocation != nullptr;
}
@ -235,7 +233,8 @@ FragmentShader::do_allocate_reserved_registers()
sfn_log << SfnLog::io << "Set sample mask in register to " << *m_sample_mask_reg
<< "\n";
m_nsys_inputs = 1;
ShaderInput input(ninputs(), TGSI_SEMANTIC_SAMPLEMASK);
ShaderInput input(ninputs());
input.set_system_value(SYSTEM_VALUE_SAMPLE_MASK_IN);
input.set_gpr(face_reg_index);
add_input(input);
}
@ -245,7 +244,8 @@ FragmentShader::do_allocate_reserved_registers()
m_sample_id_reg = value_factory().allocate_pinned_register(sample_id_reg, 3);
sfn_log << SfnLog::io << "Set sample id register to " << *m_sample_id_reg << "\n";
m_nsys_inputs++;
ShaderInput input(ninputs(), TGSI_SEMANTIC_SAMPLEID);
ShaderInput input(ninputs());
input.set_system_value(SYSTEM_VALUE_SAMPLE_ID);
input.set_gpr(sample_id_reg);
add_input(input);
}
@ -350,17 +350,14 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
const unsigned location_offset = chip_class() < ISA_CC_EVERGREEN ? 32 : 0;
bool uses_interpol_at_centroid = false;
unsigned location = nir_intrinsic_io_semantics(intr).location + index->u32;
auto location =
static_cast<gl_varying_slot>(nir_intrinsic_io_semantics(intr).location + index->u32);
unsigned driver_location = nir_intrinsic_base(intr) + index->u32;
auto semantic = r600_get_varying_semantic(location);
tgsi_semantic name = (tgsi_semantic)semantic.first;
unsigned sid = semantic.second;
if (location == VARYING_SLOT_POS) {
m_sv_values.set(es_pos);
m_pos_driver_loc = driver_location + location_offset;
ShaderInput pos_input(m_pos_driver_loc, name);
pos_input.set_sid(sid);
ShaderInput pos_input(m_pos_driver_loc, location);
pos_input.set_interpolator(TGSI_INTERPOLATE_LINEAR,
TGSI_INTERPOLATE_LOC_CENTER,
false);
@ -371,8 +368,7 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
if (location == VARYING_SLOT_FACE) {
m_sv_values.set(es_face);
m_face_driver_loc = driver_location + location_offset;
ShaderInput face_input(m_face_driver_loc, name);
face_input.set_sid(sid);
ShaderInput face_input(m_face_driver_loc, location);
add_input(face_input);
return true;
}
@ -380,6 +376,10 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
tgsi_interpolate_mode tgsi_interpolate = TGSI_INTERPOLATE_CONSTANT;
tgsi_interpolate_loc tgsi_loc = TGSI_INTERPOLATE_LOC_CENTER;
const bool is_color =
(location >= VARYING_SLOT_COL0 && location <= VARYING_SLOT_COL1) ||
(location >= VARYING_SLOT_BFC0 && location <= VARYING_SLOT_BFC1);
if (index_src_id > 0) {
glsl_interp_mode mode = INTERP_MODE_NONE;
auto parent = nir_instr_as_intrinsic(intr->src[0].ssa->parent_instr);
@ -406,7 +406,7 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
switch (mode) {
case INTERP_MODE_NONE:
if (name == TGSI_SEMANTIC_COLOR || name == TGSI_SEMANTIC_BCOLOR) {
if (is_color) {
tgsi_interpolate = TGSI_INTERPOLATE_COLOR;
break;
}
@ -428,40 +428,31 @@ FragmentShader::scan_input(nir_intrinsic_instr *intr, int index_src_id)
}
}
switch (name) {
case TGSI_SEMANTIC_PRIMID:
if (location == VARYING_SLOT_PRIMITIVE_ID) {
m_gs_prim_id_input = true;
m_ps_prim_id_input = ninputs();
FALLTHROUGH;
case TGSI_SEMANTIC_COLOR:
case TGSI_SEMANTIC_BCOLOR:
case TGSI_SEMANTIC_FOG:
case TGSI_SEMANTIC_GENERIC:
case TGSI_SEMANTIC_TEXCOORD:
case TGSI_SEMANTIC_LAYER:
case TGSI_SEMANTIC_PCOORD:
case TGSI_SEMANTIC_VIEWPORT_INDEX:
case TGSI_SEMANTIC_CLIPDIST: {
sfn_log << SfnLog::io << " have IO at " << driver_location << "\n";
auto iinput = find_input(driver_location);
if (iinput == input_not_found()) {
ShaderInput input(driver_location, name);
input.set_sid(sid);
input.set_need_lds_pos();
input.set_interpolator(tgsi_interpolate, tgsi_loc, uses_interpol_at_centroid);
sfn_log << SfnLog::io << "add IO with LDS ID at " << input.location() << "\n";
add_input(input);
assert(find_input(input.location()) != input_not_found());
} else {
if (uses_interpol_at_centroid) {
iinput->second.set_uses_interpolate_at_centroid();
}
}
return true;
}
default:
} else if (!(is_color || (location >= VARYING_SLOT_VAR0 && location < VARYING_SLOT_MAX) ||
(location >= VARYING_SLOT_TEX0 && location <= VARYING_SLOT_TEX7) ||
(location >= VARYING_SLOT_CLIP_DIST0 && location <= VARYING_SLOT_CLIP_DIST1) ||
location == VARYING_SLOT_FOGC || location == VARYING_SLOT_LAYER ||
location == VARYING_SLOT_PNTC || location == VARYING_SLOT_VIEWPORT)) {
return false;
}
sfn_log << SfnLog::io << " have IO at " << driver_location << "\n";
auto iinput = find_input(driver_location);
if (iinput == input_not_found()) {
ShaderInput input(driver_location, location);
input.set_need_lds_pos();
input.set_interpolator(tgsi_interpolate, tgsi_loc, uses_interpol_at_centroid);
sfn_log << SfnLog::io << "add IO with LDS ID at " << input.location() << "\n";
add_input(input);
assert(find_input(input.location()) != input_not_found());
} else {
if (uses_interpol_at_centroid) {
iinput->second.set_uses_interpolate_at_centroid();
}
}
return true;
}
bool
@ -494,7 +485,8 @@ FragmentShader::emit_export_pixel(nir_intrinsic_instr& intr)
(semantics.location >= FRAG_RESULT_DATA0 &&
semantics.location <= FRAG_RESULT_DATA7)) {
ShaderOutput output(driver_location, TGSI_SEMANTIC_COLOR, write_mask);
ShaderOutput output(driver_location, write_mask);
output.set_frag_result(static_cast<gl_frag_result>(semantics.location));
add_output(output);
unsigned color_outputs =
@ -552,13 +544,9 @@ FragmentShader::emit_export_pixel(nir_intrinsic_instr& intr)
semantics.location == FRAG_RESULT_STENCIL ||
semantics.location == FRAG_RESULT_SAMPLE_MASK) {
emit_instruction(new ExportInstr(ExportInstr::pixel, 61, value));
int semantic = TGSI_SEMANTIC_POSITION;
if (semantics.location == FRAG_RESULT_STENCIL)
semantic = TGSI_SEMANTIC_STENCIL;
else if (semantics.location == FRAG_RESULT_SAMPLE_MASK)
semantic = TGSI_SEMANTIC_SAMPLEMASK;
ShaderOutput output(driver_location, semantic, write_mask);
ShaderOutput output(driver_location, write_mask);
output.set_frag_result(static_cast<gl_frag_result>(semantics.location));
add_output(output);
} else {

1
src/gallium/drivers/r600/sfn/sfn_shader_fs.h
View file

@ -84,7 +84,6 @@ private:
bool m_fs_write_all{false};
bool m_uses_discard{false};
bool m_gs_prim_id_input{false};
int m_ps_prim_id_input{0};
Register *m_sample_id_reg{nullptr};
Register *m_sample_mask_reg{nullptr};
Register *m_helper_invocation{nullptr};

16
src/gallium/drivers/r600/sfn/sfn_shader_gs.cpp
View file

@ -58,7 +58,7 @@ GeometryShader::do_scan_instruction(nir_instr *instr)
bool
GeometryShader::process_store_output(nir_intrinsic_instr *instr)
{
auto location = nir_intrinsic_io_semantics(instr).location;
auto location = static_cast<gl_varying_slot>(nir_intrinsic_io_semantics(instr).location);
auto index = nir_src_as_const_value(instr->src[1]);
assert(index);
@ -74,13 +74,11 @@ GeometryShader::process_store_output(nir_intrinsic_instr *instr)
location == VARYING_SLOT_PSIZ || location == VARYING_SLOT_LAYER ||
location == VARYING_SLOT_VIEWPORT || location == VARYING_SLOT_FOGC) {
auto semantic = r600_get_varying_semantic(location);
tgsi_semantic name = (tgsi_semantic)semantic.first;
auto write_mask = nir_intrinsic_write_mask(instr);
ShaderOutput output(driver_location, name, write_mask);
ShaderOutput output(driver_location, write_mask, location);
if (!nir_intrinsic_io_semantics(instr).no_varying)
output.set_sid(semantic.second);
if (nir_intrinsic_io_semantics(instr).no_varying)
output.set_no_varying(true);
if (nir_intrinsic_io_semantics(instr).location != VARYING_SLOT_CLIP_VERTEX)
add_output(output);
@ -107,7 +105,7 @@ GeometryShader::process_store_output(nir_intrinsic_instr *instr)
bool
GeometryShader::process_load_input(nir_intrinsic_instr *instr)
{
auto location = nir_intrinsic_io_semantics(instr).location;
auto location = static_cast<gl_varying_slot>(nir_intrinsic_io_semantics(instr).location);
auto index = nir_src_as_const_value(instr->src[1]);
assert(index);
@ -124,9 +122,7 @@ GeometryShader::process_load_input(nir_intrinsic_instr *instr)
uint64_t bit = 1ull << location;
if (!(bit & m_input_mask)) {
auto semantic = r600_get_varying_semantic(location);
ShaderInput input(driver_location, semantic.first);
input.set_sid(semantic.second);
ShaderInput input(driver_location, location);
input.set_ring_offset(16 * driver_location);
add_input(input);
m_next_input_ring_offset += 16;

23
src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp
View file

@ -187,33 +187,14 @@ TESShader::do_scan_instruction(nir_instr *instr)
break;
case nir_intrinsic_store_output: {
int driver_location = nir_intrinsic_base(intr);
int location = nir_intrinsic_io_semantics(intr).location;
auto semantic = r600_get_varying_semantic(location);
tgsi_semantic name = (tgsi_semantic)semantic.first;
unsigned sid = semantic.second;
auto location = static_cast<gl_varying_slot>(nir_intrinsic_io_semantics(intr).location);
auto write_mask = nir_intrinsic_write_mask(intr);
if (location == VARYING_SLOT_LAYER)
write_mask = 4;
ShaderOutput output(driver_location, name, write_mask);
output.set_sid(sid);
ShaderOutput output(driver_location, write_mask, location);
switch (location) {
case VARYING_SLOT_PSIZ:
case VARYING_SLOT_POS:
case VARYING_SLOT_CLIP_VERTEX:
case VARYING_SLOT_EDGE: {
break;
}
case VARYING_SLOT_CLIP_DIST0:
case VARYING_SLOT_CLIP_DIST1:
case VARYING_SLOT_VIEWPORT:
case VARYING_SLOT_LAYER:
case VARYING_SLOT_VIEW_INDEX:
default:
output.set_is_param(true);
}
add_output(output);
break;
}

62
src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
View file

@ -70,7 +70,6 @@ VertexExportForFs::VertexExportForFs(VertexStageShader *parent,
const r600_shader_key& key):
VertexExportStage(parent),
m_vs_as_gs_a(key.vs.as_gs_a),
m_vs_prim_id_out(key.vs.prim_id_out),
m_so_info(so_info)
{
}
@ -161,9 +160,8 @@ VertexExportForFs::finalize()
m_last_param_export = new ExportInstr(ExportInstr::param, param, primid);
m_parent->emit_instruction(m_last_param_export);
ShaderOutput output(m_parent->noutputs(), TGSI_SEMANTIC_PRIMID, 1);
output.set_sid(0);
output.override_spi_sid(m_vs_prim_id_out);
ShaderOutput output(m_parent->noutputs(), 1, VARYING_SLOT_PRIMITIVE_ID);
output.set_export_param(param);
m_parent->add_output(output);
}
@ -283,7 +281,8 @@ VertexExportForFs::emit_varying_param(const store_loc& store_info,
Pin pin = util_bitcount(write_mask) > 1 ? pin_group : pin_free;
int export_slot = m_parent->output(nir_intrinsic_base(&intr)).pos();
int export_slot = m_parent->output(nir_intrinsic_base(&intr)).export_param();
assert(export_slot >= 0);
auto value = m_parent->value_factory().temp_vec4(pin, swizzle);
AluInstr *alu = nullptr;
@ -442,38 +441,21 @@ VertexShader::do_scan_instruction(nir_instr *instr)
return true;
}
case nir_intrinsic_store_output: {
int driver_location = nir_intrinsic_base(intr);
int location = nir_intrinsic_io_semantics(intr).location;
auto semantic = r600_get_varying_semantic(location);
tgsi_semantic name = (tgsi_semantic)semantic.first;
unsigned sid = semantic.second;
auto write_mask = nir_intrinsic_write_mask(intr);
auto location = static_cast<gl_varying_slot>(nir_intrinsic_io_semantics(intr).location);
if (location == VARYING_SLOT_LAYER)
write_mask = 4;
ShaderOutput output(driver_location, name, write_mask);
output.set_sid(sid);
switch (location) {
case VARYING_SLOT_CLIP_DIST0:
case VARYING_SLOT_CLIP_DIST1:
if (nir_intrinsic_io_semantics(intr).no_varying)
break;
FALLTHROUGH;
case VARYING_SLOT_VIEWPORT:
case VARYING_SLOT_LAYER:
case VARYING_SLOT_VIEW_INDEX:
default:
output.set_is_param(true);
FALLTHROUGH;
case VARYING_SLOT_PSIZ:
case VARYING_SLOT_POS:
case VARYING_SLOT_CLIP_VERTEX:
case VARYING_SLOT_EDGE:
add_output(output);
if (nir_intrinsic_io_semantics(intr).no_varying &&
(location == VARYING_SLOT_CLIP_DIST0 || location == VARYING_SLOT_CLIP_DIST1)) {
break;
}
int driver_location = nir_intrinsic_base(intr);
int write_mask =
location == VARYING_SLOT_LAYER ? 1 << 2 : nir_intrinsic_write_mask(intr);
ShaderOutput output(driver_location, write_mask, location);
add_output(output);
break;
}
case nir_intrinsic_load_vertex_id:
@ -512,7 +494,7 @@ VertexShader::load_input(nir_intrinsic_instr *intr)
if (ir)
ir->set_alu_flag(alu_last_instr);
ShaderInput input(driver_location, location);
ShaderInput input(driver_location);
input.set_gpr(driver_location + 1);
add_input(input);
return true;
@ -601,14 +583,14 @@ VertexExportForGS::do_store_output(const store_loc& store_info,
auto out_io = m_parent->output(store_info.driver_location);
sfn_log << SfnLog::io << "check output " << store_info.driver_location
<< " name=" << out_io.name() << " sid=" << out_io.sid() << "\n";
<< " varying_slot=" << static_cast<int>(out_io.varying_slot()) << "\n";
for (unsigned k = 0; k < m_gs_shader->ninput; ++k) {
auto& in_io = m_gs_shader->input[k];
sfn_log << SfnLog::io << " against " << k << " name=" << in_io.name
<< " sid=" << in_io.sid << "\n";
sfn_log << SfnLog::io << " against " << k
<< " varying_slot=" << static_cast<int>(in_io.varying_slot) << "\n";
if (in_io.name == out_io.name() && in_io.sid == out_io.sid()) {
if (in_io.varying_slot == out_io.varying_slot()) {
ring_offset = in_io.ring_offset;
break;
}
@ -623,7 +605,7 @@ VertexExportForGS::do_store_output(const store_loc& store_info,
if (ring_offset == -1) {
sfn_log << SfnLog::warn << "VS defines output at "
<< store_info.driver_location
<< "name=" << out_io.name() << " sid=" << out_io.sid()
<< " varying_slot=" << static_cast<int>(out_io.varying_slot())
<< " that is not consumed as GS input\n";
return true;
}

1
src/gallium/drivers/r600/sfn/sfn_shader_vs.h
View file

@ -111,7 +111,6 @@ private:
bool m_out_misc_write{false};
bool m_vs_out_layer{false};
bool m_vs_as_gs_a{false};
int m_vs_prim_id_out{0};
bool m_out_edgeflag{false};
bool m_out_viewport{false};
bool m_out_point_size{false};

108
src/gallium/drivers/r600/sfn/tests/sfn_optimizer_test.cpp
View file

@ -92,7 +92,7 @@ REGISTERS R0.x R1.x R2.x R3.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU ADD R2.x : R0.x R2.x {W}
ALU MUL R3.x : R0.x R3.x {WL}
@ -109,7 +109,7 @@ REGISTERS R1024.x@group R1024.y@group R0.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU ADD R1024.x@group : R0.x R1024.x@group {W}
@ -134,7 +134,7 @@ REGISTERS R0.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : R0.x {W}
ALU MUL S3.x : S2.x S2.x {W}
@ -148,7 +148,7 @@ REGISTERS R0.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MUL S3.x : R0.x R0.x {W}
EXPORT_DONE PIXEL 0 S3.xxxx
@ -170,7 +170,7 @@ REGISTERS R0.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : R0.x {W}
ALU MOV R0.x : L[2.0] {W}
@ -185,7 +185,7 @@ REGISTERS R0.x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : R0.x {W}
ALU MOV R0.x : L[2.0] {W}
@ -210,7 +210,7 @@ ARRAYS A0[2].x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : A0[0].x {W}
ALU MOV A0[R0.x].x : L[2.0] {W}
@ -226,7 +226,7 @@ ARRAYS A0[2].x
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : A0[0].x {W}
ALU MOV A0[R0.x].x : L[2.0] {W}
@ -251,7 +251,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A0[4].x
REGISTERS R0.xy
SHADER
@ -280,7 +280,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A0[4].x
REGISTERS R0.xy
SHADER
@ -516,9 +516,9 @@ TEST_F(TestShaderFromNir, OptimizeAddWChanetoTrans)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU MOV S2.x@free{s} : I[0] {WL}
@ -552,9 +552,9 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU ADD S8.y@free{s} : L[0x40c00000] -KC0[0].x {WL}
@ -578,9 +578,9 @@ TEST_F(TestShaderFromNir, PeeholeSoureModsSimple)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU MOV S2.x@free{s} : I[0] {WL}
@ -614,9 +614,9 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU ADD S8.y@free{s} : L[0x40c00000] |KC0[0].x| {WL}
@ -640,9 +640,9 @@ TEST_F(TestShaderFromNir, PeeholeSoureModsAbsNegTwice)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU MOV S2.x@free{s} : I[0] {WL}
@ -680,9 +680,9 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
SHADER
BLOCK_START
ALU ADD S19.y@free{s} : L[0x40c00000] |KC0[0].x| {WL}
@ -706,8 +706,8 @@ TEST_F(TestShaderFromNir, PeeholeSoureModsClamp)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
SHADER
BLOCK_START
ALU MOV S1.x{s} : |KC0[0].x| {W}
@ -720,8 +720,8 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
SHADER
BLOCK_START
ALU ADD CLAMP S3.x : |KC0[0].x| -KC0[0].y {W}
@ -738,8 +738,8 @@ TEST_F(TestShaderFromNir, PeeholeSoureModsMuliSlot)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R1.xyzw
SHADER
BLOCK_START
@ -758,8 +758,8 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R1.xyzw
SHADER
BLOCK_START
@ -778,8 +778,8 @@ TEST_F(TestShaderFromNir, OptimizeIntoGroup)
const char *input =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x R1.x R2.x
SHADER
BLOCK_START
@ -798,8 +798,8 @@ BLOCK_END)";
const char *expect =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:15
OUTPUT LOC:0 NAME:0 MASK:15
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x R1.x R2.x
SHADER
BLOCK_START
@ -827,7 +827,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MIN_UINT S3.w@free{s} : KC0[0].x L[0x2] {WL}
@ -848,7 +848,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -886,7 +886,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -905,7 +905,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -943,7 +943,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -962,7 +962,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -999,7 +999,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1018,7 +1018,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1053,7 +1053,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1072,7 +1072,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1107,7 +1107,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1126,7 +1126,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1164,7 +1164,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START
@ -1189,7 +1189,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A1[2].x
SHADER
BLOCK_START

56
src/gallium/drivers/r600/sfn/tests/sfn_split_address_loads_test.cpp
View file

@ -41,7 +41,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x__
ARRAYS A1[4].x
REGISTERS AR
@ -58,7 +58,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x__
ARRAYS A1[4].x
REGISTERS AR
@ -80,12 +80,12 @@ TEST_F(TestShaderFromNir, DestIndirectAddress)
const char *input =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
OUTPUT LOC:2 NAME:5 MASK:15 SID:10 SPI_SID:11
OUTPUT LOC:3 NAME:5 MASK:15 SID:11 SPI_SID:12
OUTPUT LOC:4 NAME:5 MASK:15 SID:12 SPI_SID:13
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
OUTPUT LOC:2 VARYING_SLOT:33 MASK:15
OUTPUT LOC:3 VARYING_SLOT:34 MASK:15
OUTPUT LOC:4 VARYING_SLOT:35 MASK:15
REGISTERS R1.xyzw
ARRAYS A2[4].xy A2[4].zw
SHADER
@ -157,12 +157,12 @@ EXPORT_DONE PARAM 3 S49.xyzw
const char *expect =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
OUTPUT LOC:2 NAME:5 MASK:15 SID:10 SPI_SID:11
OUTPUT LOC:3 NAME:5 MASK:15 SID:11 SPI_SID:12
OUTPUT LOC:4 NAME:5 MASK:15 SID:12 SPI_SID:13
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
OUTPUT LOC:2 VARYING_SLOT:33 MASK:15
OUTPUT LOC:3 VARYING_SLOT:34 MASK:15
OUTPUT LOC:4 VARYING_SLOT:35 MASK:15
REGISTERS R1.xyzw
ARRAYS A2[4].xy A2[4].zw
SHADER
@ -249,7 +249,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x
ARRAYS A1[4].x
REGISTERS AR
@ -265,7 +265,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x
ARRAYS A1[4].x
REGISTERS AR
@ -290,7 +290,7 @@ CHIPCLASS CAYMAN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x
ARRAYS A1[4].x
REGISTERS AR
@ -306,7 +306,7 @@ CHIPCLASS CAYMAN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x
ARRAYS A1[4].x
REGISTERS AR
@ -331,7 +331,7 @@ CHIPCLASS CAYMAN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x R0.y
REGISTERS AR
SHADER
@ -346,7 +346,7 @@ CHIPCLASS CAYMAN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.x R0.y
SHADER
ALU MOVA_INT IDX0 : R0.y
@ -370,7 +370,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MIN_UINT S3.w@free{s} : KC0[0].x L[0x2] {WL}
@ -390,7 +390,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MIN_UINT S3.w@free{s} : KC0[0].x L[0x2] {WL}
@ -418,7 +418,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MIN_UINT S3.w@free : KC0[0].x L[0x2] {WL}
@ -438,7 +438,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -477,7 +477,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MOV S0.x@free : KC0[1].x {W}
@ -500,7 +500,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -543,7 +543,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU MIN_UINT S3.x@free : KC0[0].x L[0x2] {W}
@ -566,7 +566,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:0
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN

208
src/gallium/drivers/r600/sfn/tests/sfn_test_shaders.cpp
View file

@ -68,7 +68,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@group : I[1.0] {W}
ALU MOV S0.y@group : I[0] {W}
@ -83,7 +83,7 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@group : I[1.0] {W}
ALU MOV S0.y@group : I[0] {W}
@ -123,7 +123,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP WRITE_ALL_COLORS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@free : L[0xbf000000] {WL}
ALU MOV S1.x@free : I[0] {WL}
@ -147,7 +147,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP WRITE_ALL_COLORS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@free : L[0xbf000000] {WL}
ALU MOV S1.x@free : I[0] {WL}
@ -171,7 +171,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP WRITE_ALL_COLORS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU ADD S3.x@free : L[0xbf000000] KC0[0].x {WL}
ALU MOV S4.x@group : S3.x@free {W}
@ -189,7 +189,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP WRITE_ALL_COLORS:1
PROP COLOR_EXPORT_MASK:15
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU ADD S4.x@group : L[0xbf000000] KC0[0].x {W}
@ -233,8 +233,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU MOV S1.x@free : I[0] {WL}
@ -275,8 +275,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU MOV S1.x@free : I[0] {WL}
@ -311,8 +311,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU_GROUP_BEGIN
@ -337,8 +337,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU MOV S1024.x : I[0] {WL}
@ -374,8 +374,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
BLOCK_START
@ -422,8 +422,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU MOV S1024.x : I[0] {WL}
@ -459,8 +459,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
BLOCK_START
@ -509,8 +509,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
BLOCK_START
@ -547,8 +547,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:1
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:1
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SYSVALUES R0.xy__
SHADER
ALU_GROUP_BEGIN
@ -577,7 +577,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S1.x : KC0[0].x {W}
ALU MOV S1.y : KC0[0].y {W}
@ -602,7 +602,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
#PROP RAT_BASE:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S2.x : KC0[1].x {W}
ALU MOV S2.y : KC0[1].y {W}
@ -673,10 +673,10 @@ impl main {
const char *glxgears_vs2_from_nir_expect =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
INPUT LOC:1 NAME:1
OUTPUT LOC:0 NAME:0 MASK:15 SID:0 SPI_SID:0
OUTPUT LOC:1 NAME:1 MASK:15 SID:0 SPI_SID:137
INPUT LOC:0
INPUT LOC:1
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:1 MASK:15
SYSVALUES R1.xyzw R2.xyzw
SHADER
ALU MOV S3.x@free : I[0] {WL}
@ -781,10 +781,10 @@ EXPORT_DONE PARAM 0 S40.xyzw)";
const char *glxgears_vs2_from_nir_expect_cayman =
R"(VS
CHIPCLASS CAYMAN
INPUT LOC:0 NAME:0
INPUT LOC:1 NAME:1
OUTPUT LOC:0 NAME:0 MASK:15 SID:0 SPI_SID:0
OUTPUT LOC:1 NAME:1 MASK:15 SID:0 SPI_SID:137
INPUT LOC:0
INPUT LOC:1
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:1 MASK:15
SYSVALUES R1.xyzw R2.xyzw
SHADER
ALU MOV S3.x@free : I[0] {WL}
@ -889,10 +889,10 @@ EXPORT_DONE PARAM 0 S40.xyzw)";
const char *glxgears_vs2_from_nir_expect_optimized =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
INPUT LOC:1 NAME:1
OUTPUT LOC:0 NAME:0 MASK:15 SID:0 SPI_SID:0
OUTPUT LOC:1 NAME:1 MASK:15 SID:0 SPI_SID:137
INPUT LOC:0
INPUT LOC:1
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:1 MASK:15
SYSVALUES R1.xyzw R2.xyzw
SHADER
ALU MUL_IEEE S6.x : R1.x@fully KC0[6].x {W}
@ -1050,9 +1050,9 @@ impl main {
const char *vs_nexted_loop_from_nir_expect =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15 SID:0 SPI_SID:0
OUTPUT LOC:1 NAME:1 MASK:15 SID:0 SPI_SID:137
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:1 MASK:15
SYSVALUES R1.xyzw
REGISTERS R2.x R3.x R4.x R5.x R6.x R7.x R8.x
SHADER
@ -1120,9 +1120,9 @@ const char *vs_nexted_loop_from_nir_expect_opt =
R"(
VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15 SID:0 SPI_SID:0
OUTPUT LOC:1 NAME:1 MASK:15 SID:0 SPI_SID:137
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:1 MASK:15
SYSVALUES R1.xyzw
REGISTERS R2.x@free R3.x@free R4.x@free R5.x@free R6.x@free R7.x@free R8.x@free
SHADER
@ -1254,9 +1254,9 @@ PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
#PROP RAT_BASE:1
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10 INTERP:2
INPUT LOC:1 NAME:5 SID:10 SPI_SID:11 INTERP:2
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
INPUT LOC:1 VARYING_SLOT:33 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully R1.x
ARRAYS A1[4].x A1[4].y
SHADER
@ -1343,7 +1343,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x : I[0] {WL}
ALU MOV S1.x : I[1.0] {WL}
@ -1374,7 +1374,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -1457,7 +1457,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@free : I[0] {WL}
ALU MOV S1.x@free : I[1] {WL}
@ -1550,7 +1550,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -1647,7 +1647,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x : I[0] {WL}
ALU MOV S1.x : I[1] {WL}
@ -1685,7 +1685,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
BLOCK_START
ALU_GROUP_BEGIN
@ -1723,12 +1723,12 @@ BLOCK_END
const char *shader_with_dest_array =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
OUTPUT LOC:2 NAME:5 MASK:15 SID:10 SPI_SID:11
OUTPUT LOC:3 NAME:5 MASK:15 SID:11 SPI_SID:12
OUTPUT LOC:4 NAME:5 MASK:15 SID:12 SPI_SID:13
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
OUTPUT LOC:2 VARYING_SLOT:33 MASK:15
OUTPUT LOC:3 VARYING_SLOT:34 MASK:15
OUTPUT LOC:4 VARYING_SLOT:35 MASK:15
REGISTERS R1.xyzw
ARRAYS A2[4].xy A2[4].zw
SHADER
@ -1862,12 +1862,12 @@ EXPORT_DONE PARAM 3 S49.xyzw
const char *shader_with_dest_array_opt_expect =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
OUTPUT LOC:2 NAME:5 MASK:15 SID:10 SPI_SID:11
OUTPUT LOC:3 NAME:5 MASK:15 SID:11 SPI_SID:12
OUTPUT LOC:4 NAME:5 MASK:15 SID:12 SPI_SID:13
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
OUTPUT LOC:2 VARYING_SLOT:33 MASK:15
OUTPUT LOC:3 VARYING_SLOT:34 MASK:15
OUTPUT LOC:4 VARYING_SLOT:35 MASK:15
REGISTERS R1.xyzw
ARRAYS A2[4].xy A2[4].zw
SHADER
@ -1938,12 +1938,12 @@ EXPORT_DONE PARAM 3 S49.xyzw
const char *shader_with_dest_array_opt_scheduled =
R"(VS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:0
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
OUTPUT LOC:2 NAME:5 MASK:15 SID:10 SPI_SID:11
OUTPUT LOC:3 NAME:5 MASK:15 SID:11 SPI_SID:12
OUTPUT LOC:4 NAME:5 MASK:15 SID:12 SPI_SID:13
INPUT LOC:0
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
OUTPUT LOC:2 VARYING_SLOT:33 MASK:15
OUTPUT LOC:3 VARYING_SLOT:34 MASK:15
OUTPUT LOC:4 VARYING_SLOT:35 MASK:15
REGISTERS R1.xyzw
ARRAYS A2[4].xy A2[4].zw
SHADER
@ -2062,7 +2062,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A0[2].xy
SHADER
BLOCK_START
@ -2090,7 +2090,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A0[2].xy
SHADER
BLOCK_START
@ -2131,7 +2131,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
ARRAYS A0[2].xy
SHADER
BLOCK_START
@ -2172,8 +2172,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.xy__
SHADER
ALU_GROUP_BEGIN
@ -2202,8 +2202,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x R0.y
SHADER
ALU_GROUP_BEGIN
@ -2228,8 +2228,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
@ -2254,8 +2254,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully R1.xyzw
SHADER
ALU_GROUP_BEGIN
@ -2280,7 +2280,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S0.x@free : I[0] {WL}
ALU MOV S1.x : KC0[0].x {W}
@ -2304,7 +2304,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU DOT4_IEEE S1026.x@group : KC0[0].y KC0[0].y + KC0[0].y KC0[0].y + I[0] I[0] + I[0] I[0] {WL}
ALU DOT4_IEEE S1026.z@group : KC0[0].x KC0[0].z + KC0[0].x KC0[0].w + I[0] I[0] + I[0] I[0] {WL}
@ -2319,8 +2319,8 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV S1.x@free : I[0] {WL}
ALU_GROUP_BEGIN
@ -2373,8 +2373,8 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
@ -2405,8 +2405,8 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
@ -2435,8 +2435,8 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
ALU_GROUP_BEGIN
@ -2470,8 +2470,8 @@ CHIPCLASS EVERGREEN
PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
INPUT LOC:0 NAME:5 INTERP:2 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:1 MASK:15
INPUT LOC:0 VARYING_SLOT:32 INTERP:2
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
REGISTERS R0.x@fully R0.y@fully
SHADER
BLOCK_START
@ -2517,7 +2517,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU MOV R1.x@free : I[0] {WL}
ALU MOV S2.x@free : L[0x38f00000] {WL}
@ -2540,7 +2540,7 @@ PROP MAX_COLOR_EXPORTS:1
PROP COLOR_EXPORTS:1
PROP COLOR_EXPORT_MASK:15
PROP WRITE_ALL_COLORS:1
OUTPUT LOC:0 NAME:1 MASK:15
OUTPUT LOC:0 FRAG_RESULT:2 MASK:15
SHADER
ALU_GROUP_BEGIN
ALU MOV R1.x@free : I[0] {W}
@ -2624,9 +2624,9 @@ impl main {
const char *gs_abs_float_expect =
R"(GS
CHIPCLASS EVERGREEN
INPUT LOC:0 NAME:5 SID:9 SPI_SID:10
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:1 NAME:5 MASK:15 SID:9 SPI_SID:10
INPUT LOC:0 VARYING_SLOT:32
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
OUTPUT LOC:1 VARYING_SLOT:32 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.w@fully
SHADER
ALU MOV S2.x@chan : I[0] {WL}
@ -3013,7 +3013,7 @@ impl main {
const char *tes_from_nir_expect =
R"(TES
CHIPCLASS EVERGREEN
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.z@fully
SHADER
ALU MOV S1.x@free : L[0x40000000] {WL}
@ -3046,7 +3046,7 @@ EXPORT_DONE PARAM 0 R0.____)";
const char *tes_pre_op =
R"(TES
CHIPCLASS EVERGREEN
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.z@fully
SHADER
ALU MOV S1024.x@free : L[0x40000000] {WL}
@ -3079,7 +3079,7 @@ EXPORT_DONE PARAM 0 R0.____)";
const char *tes_optimized =
R"(TES
CHIPCLASS EVERGREEN
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.z@fully
SHADER
ALU ADD S1026.x@free : R0.x@fully R0.y@fully {WL}
@ -3102,7 +3102,7 @@ EXPORT_DONE PARAM 0 R0.____)";
const char *tes_optimized_pre_sched =
R"(TES
CHIPCLASS EVERGREEN
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.z@fully
SHADER
ALU ADD S1026.x@free : R0.x@fully R0.y@fully {WL}
@ -3125,7 +3125,7 @@ EXPORT_DONE PARAM 0 R0.____)";
const char *tes_optimized_sched =
R"(TES
CHIPCLASS EVERGREEN
OUTPUT LOC:0 NAME:0 MASK:15
OUTPUT LOC:0 VARYING_SLOT:0 MASK:15
REGISTERS R0.x@fully R0.y@fully R0.z@fully
SHADER
BLOCK_START