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panfrost: move handling for bifrost mediump lowering to pan_collect_varyings
For Bifrost and newer, we always write mediump varyings from a 32-bit source in the VS. This is needed because the FS does not unconditionally lower mediump to 16-bit. Previously we worked around this in panvk by replacing 16-bit formats with 32-bit in emit_varying_descs, but once we support storageInputOutput16, we will need to preserve 16-bit formats for explicit 16-bit varyings. Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33078>
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26ba20be51
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02dc105a36
5 changed files with 30 additions and 37 deletions
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@ -5856,7 +5856,7 @@ bifrost_compile_shader_nir(nir_shader *nir,
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info->tls_size = nir->scratch_size;
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info->vs.idvs = bi_should_idvs(nir, inputs);
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pan_nir_collect_varyings(nir, info);
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pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_32BIT);
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if (info->vs.idvs) {
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bi_compile_variant(nir, inputs, binary, info, BI_IDVS_POSITION);
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@ -2984,7 +2984,7 @@ midgard_compile_shader_nir(nir_shader *nir,
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/* Collect varyings after lowering I/O */
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info->quirk_no_auto32 = (ctx->quirks & MIDGARD_NO_AUTO32);
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pan_nir_collect_varyings(nir, info);
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pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_SMOOTH_16BIT);
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/* Optimisation passes */
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optimise_nir(nir, ctx->quirks, inputs->is_blend);
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@ -69,6 +69,7 @@ struct slot_info {
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};
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struct walk_varyings_data {
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enum pan_mediump_vary mediump;
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struct pan_shader_info *info;
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struct slot_info *slots;
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};
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@ -128,19 +129,20 @@ walk_varyings(UNUSED nir_builder *b, nir_instr *instr, void *data)
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bool auto32 = !info->quirk_no_auto32;
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nir_alu_type type = (flat && auto32) ? nir_type_uint : nir_type_float;
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/* Demote interpolated float varyings to fp16 where possible. We do not
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* demote flat varyings, including integer varyings, due to various
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* issues with the Midgard hardware behaviour and TGSI shaders, as well
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* as having no demonstrable benefit in practice.
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*/
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if (type == nir_type_float && sem.medium_precision)
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size = 16;
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else {
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/* We never emit 16-bit user varyings except for lowered mediump floats */
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if (sem.location >= VARYING_SLOT_VAR0)
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assert(size == 32);
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if (sem.medium_precision) {
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/* Demote interpolated float varyings to fp16 where possible. We do not
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* demote flat varyings, including integer varyings, due to various
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* issues with the Midgard hardware behaviour and TGSI shaders, as well
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* as having no demonstrable benefit in practice.
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*/
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if (wv_data->mediump == PAN_MEDIUMP_VARY_SMOOTH_16BIT)
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size = type == nir_type_float ? 16 : 32;
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if (wv_data->mediump == PAN_MEDIUMP_VARY_32BIT)
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size = 32;
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}
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assert(size == 32 || size == 16);
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type |= size;
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/* Count currently contains the number of components accessed by this
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@ -206,14 +208,15 @@ pan_nir_collect_noperspective_varyings_fs(nir_shader *s)
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}
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void
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pan_nir_collect_varyings(nir_shader *s, struct pan_shader_info *info)
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pan_nir_collect_varyings(nir_shader *s, struct pan_shader_info *info,
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enum pan_mediump_vary mediump)
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{
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if (s->info.stage != MESA_SHADER_VERTEX &&
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s->info.stage != MESA_SHADER_FRAGMENT)
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return;
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struct slot_info slots[64] = {0};
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struct walk_varyings_data wv_data = {info, slots};
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struct walk_varyings_data wv_data = {mediump, info, slots};
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nir_shader_instructions_pass(s, walk_varyings, nir_metadata_all, &wv_data);
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struct pan_shader_varying *varyings = (s->info.stage == MESA_SHADER_VERTEX)
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@ -393,6 +393,15 @@ void pan_print_alu_type(nir_alu_type t, FILE *fp);
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#define PAN_WRITEOUT_S 4
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#define PAN_WRITEOUT_2 8
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/* Specify the mediump lowering behavior for pan_nir_collect_varyings */
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enum pan_mediump_vary {
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/* Always assign a 32-bit format to mediump varyings */
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PAN_MEDIUMP_VARY_32BIT,
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/* Assign a 16-bit format to varyings with smooth interpolation, and a
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* 32-bit format to varyings with flat interpolation */
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PAN_MEDIUMP_VARY_SMOOTH_16BIT,
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};
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bool pan_nir_lower_zs_store(nir_shader *nir);
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bool pan_nir_lower_store_component(nir_shader *shader);
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@ -413,7 +422,8 @@ bool pan_lower_xfb(nir_shader *nir);
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bool pan_lower_image_index(nir_shader *shader, unsigned vs_img_attrib_offset);
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uint32_t pan_nir_collect_noperspective_varyings_fs(nir_shader *s);
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void pan_nir_collect_varyings(nir_shader *s, struct pan_shader_info *info);
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void pan_nir_collect_varyings(nir_shader *s, struct pan_shader_info *info,
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enum pan_mediump_vary mediump);
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/*
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* Helper returning the subgroup size. Generally, this is equal to the number of
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@ -197,31 +197,11 @@ emit_varying_descs(const struct panvk_cmd_buffer *cmdbuf,
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if (var->location < VARYING_SLOT_VAR0)
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continue;
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/* We currently always write out F32 in the vertex shaders, so the format
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* needs to reflect this. */
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enum pipe_format f = var->format;
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switch (f) {
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case PIPE_FORMAT_R16_FLOAT:
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f = PIPE_FORMAT_R32_FLOAT;
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break;
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case PIPE_FORMAT_R16G16_FLOAT:
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f = PIPE_FORMAT_R32G32_FLOAT;
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break;
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case PIPE_FORMAT_R16G16B16_FLOAT:
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f = PIPE_FORMAT_R32G32B32_FLOAT;
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break;
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case PIPE_FORMAT_R16G16B16A16_FLOAT:
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f = PIPE_FORMAT_R32G32B32A32_FLOAT;
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break;
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default:
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break;
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}
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uint32_t loc = var->location - VARYING_SLOT_VAR0;
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pan_pack(&descs[i], ATTRIBUTE, cfg) {
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cfg.attribute_type = MALI_ATTRIBUTE_TYPE_VERTEX_PACKET;
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cfg.offset_enable = false;
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cfg.format = GENX(panfrost_format_from_pipe_format)(f)->hw;
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cfg.format = GENX(panfrost_format_from_pipe_format)(var->format)->hw;
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cfg.table = 61;
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cfg.frequency = MALI_ATTRIBUTE_FREQUENCY_VERTEX;
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cfg.offset = 1024 + (loc * 16);
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