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pvr: rename rogue_get_slc_cache_line_size

Browse source 
This isn't really rogue-specific, so let's rename it to not cause any
confusion.

Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38352>
This commit is contained in:
Erik Faye-Lund 2025-11-05 15:26:44 +01:00
parent e7fb4a9948
commit 02b5e78f0d
15 changed files with 30 additions and 30 deletions
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6
src/imagination/include/hwdef/rogue_hw_utils.h
View file

@ -259,7 +259,7 @@ rogue_get_render_size_max(const struct pvr_device_info *dev_info)
rogue_get_render_size_max(dev_info)
static inline uint32_t
rogue_get_slc_cache_line_size(const struct pvr_device_info *dev_info)
pvr_get_slc_cache_line_size(const struct pvr_device_info *dev_info)
{
return PVR_GET_FEATURE_VALUE(dev_info, slc_cache_line_size_bits, 8U) / 8U;
}
@ -313,7 +313,7 @@ rogue_get_cdm_context_resume_buffer_size(const struct pvr_device_info *dev_info)
{
if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support)) {
const uint32_t max_num_cores = rogue_get_max_num_cores(dev_info);
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
const uint32_t cdm_context_resume_buffer_stride =
ALIGN_POT(ROGUE_LLS_CDM_CONTEXT_RESUME_BUFFER_SIZE, cache_line_size);
@ -331,7 +331,7 @@ static inline uint32_t rogue_get_cdm_context_resume_buffer_alignment(
const struct pvr_device_info *dev_info)
{
if (PVR_HAS_FEATURE(dev_info, gpu_multicore_support))
return rogue_get_slc_cache_line_size(dev_info);
return pvr_get_slc_cache_line_size(dev_info);
return ROGUE_LLS_CDM_CONTEXT_RESUME_BUFFER_ALIGNMENT;
}

2
src/imagination/vulkan/pvr_bo.c
View file

@ -560,7 +560,7 @@ VkResult pvr_bo_suballoc(struct pvr_suballocator *allocator,
{
const struct pvr_device_info *dev_info =
&allocator->device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
struct pvr_suballoc_bo *suballoc_bo;
uint32_t alloc_size, aligned_size;
VkResult result;

2
src/imagination/vulkan/pvr_border.c
View file

@ -287,7 +287,7 @@ VkResult pvr_border_color_table_init(struct pvr_border_color_table *const table,
struct pvr_device *const device)
{
const struct pvr_device_info *const dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
const uint32_t table_size = sizeof(struct pvr_border_color_table_entry) *
PVR_BORDER_COLOR_TABLE_NR_ENTRIES;

4
src/imagination/vulkan/pvr_clear.c
View file

@ -168,7 +168,7 @@ VkResult pvr_emit_ppp_from_template(
struct pvr_device *const device = csb->device;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
const struct pvr_static_clear_ppp_base *const base =
&device->static_clear_state.ppp_base;
struct pvr_suballoc_bo *pvr_bo;
@ -465,7 +465,7 @@ VkResult pvr_device_init_graphics_static_clear_state(struct pvr_device *device)
const uint32_t vdm_state_size_in_dw =
pvr_clear_vdm_state_get_size_in_dw(dev_info, 1);
struct pvr_device_static_clear_state *state = &device->static_clear_state;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
struct pvr_pds_vertex_shader_program pds_program;
const pco_precomp_data *precomp_data;
uint32_t *state_buffer;

8
src/imagination/vulkan/pvr_cmd_buffer.c
View file

@ -325,7 +325,7 @@ pvr_cmd_buffer_upload_tables(struct pvr_device *device,
struct pvr_sub_cmd_gfx *const sub_cmd)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
VkResult result;
assert(!sub_cmd->depth_bias_bo && !sub_cmd->scissor_bo);
@ -399,7 +399,7 @@ pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer,
{
struct pvr_device *const device = cmd_buffer->device;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_suballoc_bo *suballoc_bo;
VkResult result;
@ -428,7 +428,7 @@ pvr_cmd_buffer_upload_usc(struct pvr_cmd_buffer *const cmd_buffer,
{
struct pvr_device *const device = cmd_buffer->device;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_suballoc_bo *suballoc_bo;
VkResult result;
@ -2716,7 +2716,7 @@ VkResult pvr_cmd_buffer_alloc_mem(struct pvr_cmd_buffer *cmd_buffer,
struct pvr_suballoc_bo **const pvr_bo_out)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&cmd_buffer->device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&cmd_buffer->device->pdevice->dev_info);
struct pvr_suballoc_bo *suballoc_bo;
struct pvr_suballocator *allocator;
VkResult result;

2
src/imagination/vulkan/pvr_csb.c
View file

@ -234,7 +234,7 @@ static bool pvr_csb_buffer_extend(struct pvr_csb *csb)
const uint8_t stream_reserved_space =
stream_link_space + ROGUE_VDMCTRL_GUARD_SIZE_DEFAULT;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&csb->device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&csb->device->pdevice->dev_info);
size_t current_state_update_size = 0;
struct pvr_bo *pvr_bo;
VkResult result;

2
src/imagination/vulkan/pvr_descriptor_set.c
View file

@ -258,7 +258,7 @@ VkResult pvr_CreateDescriptorPool(VkDevice _device,
{
VK_FROM_HANDLE(pvr_device, device, _device);
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_descriptor_pool *pool;
uint64_t bo_size = 0;
VkResult result;

8
src/imagination/vulkan/pvr_device.c
View file

@ -208,7 +208,7 @@ VkResult pvr_pds_compute_shader_create_and_upload(
struct pvr_pds_upload *const pds_upload_out)
{
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
size_t staging_buffer_size;
uint32_t *staging_buffer;
uint32_t *data_buffer;
@ -576,7 +576,7 @@ static void pvr_device_get_pixel_event_pds_program_data_size(
static VkResult pvr_device_init_nop_program(struct pvr_device *device)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_pds_kickusc_program program = { 0 };
const pco_precomp_data *precomp_data;
uint32_t staging_buffer_size;
@ -738,7 +738,7 @@ VkResult pvr_device_tile_buffer_ensure_cap(struct pvr_device *device,
struct pvr_device_tile_buffer_state *tile_buffer_state =
&device->tile_buffer_state;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
VkResult result;
simple_mtx_lock(&tile_buffer_state->mtx);
@ -1797,7 +1797,7 @@ pvr_framebuffer_create_ppp_state(struct pvr_device *device,
struct pvr_framebuffer *framebuffer)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
uint32_t ppp_state[3];
VkResult result;

12
src/imagination/vulkan/pvr_job_context.c
View file

@ -91,7 +91,7 @@ static VkResult pvr_pds_pt_store_program_create_and_upload(
{
struct pvr_pds_stream_out_terminate_program program = { 0 };
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
size_t staging_buffer_size;
uint32_t *staging_buffer;
uint32_t *data_buffer;
@ -160,7 +160,7 @@ static VkResult pvr_pds_pt_resume_program_create_and_upload(
{
struct pvr_pds_stream_out_init_program program = { 0 };
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
size_t staging_buffer_size;
uint32_t *staging_buffer;
uint32_t *data_buffer;
@ -322,7 +322,7 @@ static VkResult pvr_pds_render_ctx_sr_program_create_and_upload(
struct pvr_pds_upload *const pds_upload_out)
{
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
const uint32_t pds_data_alignment =
ROGUE_VDMCTRL_PDS_STATE0_PDS_DATA_SIZE_UNIT_SIZE / 4U;
@ -382,7 +382,7 @@ static VkResult pvr_pds_compute_ctx_sr_program_create_and_upload(
struct pvr_pds_upload *const pds_upload_out)
{
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
const uint32_t pds_data_alignment =
ROGUE_VDMCTRL_PDS_STATE0_PDS_DATA_SIZE_UNIT_SIZE / 4U;
@ -468,7 +468,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
ROGUE_LLS_USC_SHARED_REGS_BUFFER_SIZE +
ROGUE_LLS_SHARED_REGS_RESERVE_SIZE;
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
uint64_t usc_store_program_upload_offset;
uint64_t usc_load_program_upload_offset;
const pco_precomp_data *precomp_data;
@ -1232,7 +1232,7 @@ static VkResult pvr_transfer_eot_shaders_init(struct pvr_device *device,
for (uint32_t i = 0; i < ARRAY_SIZE(ctx->usc_eot_bos); i++) {
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_eot_props props = {
.emit_count = i + 1,
.shared_words = true,

2
src/imagination/vulkan/pvr_job_render.c
View file

@ -170,7 +170,7 @@ VkResult pvr_free_list_create(struct pvr_device *device,
* of the two values) and divide this by 4. If the PM page size is 4096
* bytes then we end up with an alignment of 65536 bytes.
*/
cache_line_size = rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
cache_line_size = pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
addr_alignment =
MAX2(ROGUE_BIF_PM_FREELIST_BASE_ADDR_ALIGNSIZE, cache_line_size);

2
src/imagination/vulkan/pvr_pass.c
View file

@ -258,7 +258,7 @@ pvr_load_op_shader_generate(struct pvr_device *device,
struct pvr_load_op *load_op)
{
const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
const uint32_t cache_line_size = pvr_get_slc_cache_line_size(dev_info);
pco_shader *loadop = pvr_uscgen_loadop(device->pdevice->pco_ctx, load_op);

4
src/imagination/vulkan/pvr_pipeline.c
View file

@ -980,7 +980,7 @@ static VkResult pvr_compute_pipeline_compile(
{
struct vk_pipeline_layout *layout = compute_pipeline->base.layout;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
pco_ctx *pco_ctx = device->pdevice->pco_ctx;
void *shader_mem_ctx = ralloc_context(NULL);
pco_data shader_data = { 0 };
@ -2605,7 +2605,7 @@ pvr_graphics_pipeline_compile(struct pvr_device *const device,
{
struct vk_pipeline_layout *layout = gfx_pipeline->base.layout;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
VkResult result;
struct pvr_vertex_shader_state *vertex_state =

2
src/imagination/vulkan/pvr_query_compute.c
View file

@ -148,7 +148,7 @@ static VkResult pvr_create_compute_query_precomp_program(
struct pvr_compute_query_shader *query_prog)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_pds_compute_shader_program pds_primary_prog = { 0 };
const pco_precomp_data *precomp_data;
VkResult result;

2
src/imagination/vulkan/pvr_spm.c
View file

@ -125,7 +125,7 @@ pvr_spm_scratch_buffer_alloc(struct pvr_device *device,
struct pvr_spm_scratch_buffer **const buffer_out)
{
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_spm_scratch_buffer *scratch_buffer;
struct pvr_bo *bo;
VkResult result;

2
src/imagination/vulkan/pvr_transfer_frag_store.c
View file

@ -187,7 +187,7 @@ static VkResult pvr_transfer_frag_store_entry_data_compile(
offsetof(struct pvr_combined_image_sampler_descriptor, sampler) / 4;
const uint32_t cache_line_size =
rogue_get_slc_cache_line_size(&device->pdevice->dev_info);
pvr_get_slc_cache_line_size(&device->pdevice->dev_info);
struct pvr_tq_frag_sh_reg_layout *sh_reg_layout = &entry_data->sh_reg_layout;
uint32_t next_free_sh_reg = 0;