diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c
index 957fadb97f7..b6e4d096326 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.c
+++ b/src/gallium/drivers/iris/iris_bufmgr.c
@@ -855,7 +855,7 @@ flags_to_heap(struct iris_bufmgr *bufmgr, unsigned flags)
          return IRIS_HEAP_DEVICE_LOCAL_COMPRESSED;
 
       /* Discrete GPUs currently always snoop CPU caches. */
-      if ((flags & BO_ALLOC_SMEM) || (flags & BO_ALLOC_COHERENT))
+      if ((flags & BO_ALLOC_SMEM) || (flags & BO_ALLOC_CACHED_COHERENT))
          return IRIS_HEAP_SYSTEM_MEMORY_CACHED_COHERENT;
 
       if ((flags & BO_ALLOC_LMEM) ||
@@ -882,7 +882,7 @@ flags_to_heap(struct iris_bufmgr *bufmgr, unsigned flags)
       if (flags & BO_ALLOC_COMPRESSED)
          return IRIS_HEAP_SYSTEM_MEMORY_UNCACHED_COMPRESSED;
 
-      if (flags & BO_ALLOC_COHERENT)
+      if (flags & BO_ALLOC_CACHED_COHERENT)
          return IRIS_HEAP_SYSTEM_MEMORY_CACHED_COHERENT;
 
       return IRIS_HEAP_SYSTEM_MEMORY_UNCACHED;
@@ -1210,7 +1210,7 @@ iris_bo_alloc(struct iris_bufmgr *bufmgr,
    struct bo_cache_bucket *bucket =
       bucket_for_size(bufmgr, size, heap, flags);
 
-   if (memzone != IRIS_MEMZONE_OTHER || (flags & BO_ALLOC_COHERENT))
+   if (memzone != IRIS_MEMZONE_OTHER || (flags & BO_ALLOC_CACHED_COHERENT))
       flags |= BO_ALLOC_NO_SUBALLOC;
 
    /* By default, capture all driver-internal buffers like shader kernels,
@@ -1278,7 +1278,7 @@ iris_bo_alloc(struct iris_bufmgr *bufmgr,
    /* On integrated GPUs, enable snooping to ensure coherency if needed.
     * For discrete, we instead use SMEM and avoid WB maps for coherency.
     */
-   if ((flags & BO_ALLOC_COHERENT) &&
+   if ((flags & BO_ALLOC_CACHED_COHERENT) &&
        !bufmgr->devinfo.has_llc && bufmgr->devinfo.has_caching_uapi) {
       if (bufmgr->kmd_backend->bo_set_caching(bo, true) != 0)
          goto err_free;
diff --git a/src/gallium/drivers/iris/iris_bufmgr.h b/src/gallium/drivers/iris/iris_bufmgr.h
index 352756a2daa..93d5657bed5 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.h
+++ b/src/gallium/drivers/iris/iris_bufmgr.h
@@ -365,7 +365,7 @@ struct iris_bo {
  * integrated platforms without LLC.
  * Should only be used in BOs that will be written and read from CPU often.
  */
-#define BO_ALLOC_COHERENT        (1<<1)
+#define BO_ALLOC_CACHED_COHERENT (1<<1)
 /* Place BO only on smem. */
 #define BO_ALLOC_SMEM            (1<<2)
 /* BO can be sent to display. */
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 0f78e847552..c56a97bee0e 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -473,7 +473,7 @@ iris_resource_alloc_flags(const struct iris_screen *screen,
 
    switch (templ->usage) {
    case PIPE_USAGE_STAGING:
-      flags |= BO_ALLOC_SMEM | BO_ALLOC_COHERENT;
+      flags |= BO_ALLOC_SMEM | BO_ALLOC_CACHED_COHERENT;
       break;
    case PIPE_USAGE_STREAM:
       flags |= BO_ALLOC_SMEM;
@@ -490,7 +490,7 @@ iris_resource_alloc_flags(const struct iris_screen *screen,
 
    if (templ->flags & (PIPE_RESOURCE_FLAG_MAP_COHERENT |
                        PIPE_RESOURCE_FLAG_MAP_PERSISTENT))
-      flags |= BO_ALLOC_SMEM | BO_ALLOC_COHERENT;
+      flags |= BO_ALLOC_SMEM | BO_ALLOC_CACHED_COHERENT;
 
    if (screen->devinfo->verx10 >= 125 && screen->devinfo->has_local_mem &&
        isl_aux_usage_has_ccs(res->aux.usage)) {
@@ -1037,7 +1037,7 @@ iris_resource_image_is_pat_compressible(const struct iris_screen *screen,
       return false;
 
    if (flags & (BO_ALLOC_PROTECTED |
-                BO_ALLOC_COHERENT |
+                BO_ALLOC_CACHED_COHERENT |
                 BO_ALLOC_CPU_VISIBLE))
       return false;