mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-04-18 14:40:40 +02:00
radeon/r200: move more stuff closer together in context
This commit is contained in:
Dave Airlie
parent
b6e4869069
commit
0217ed2cf9
12 changed files with 112 additions and 117 deletions
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@ -93,8 +93,8 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
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r200ContextPtr rmesa = R200_CONTEXT(ctx);
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static char buffer[128];
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unsigned offset;
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GLuint agp_mode = (rmesa->r200Screen->card_type == RADEON_CARD_PCI)? 0 :
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rmesa->r200Screen->AGPMode;
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GLuint agp_mode = (rmesa->radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
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rmesa->radeonScreen->AGPMode;
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switch ( name ) {
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case GL_VENDOR:
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@ -321,12 +321,12 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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rmesa->dri.fd = sPriv->fd;
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rmesa->dri.drmMinor = sPriv->drm_version.minor;
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rmesa->r200Screen = screen;
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rmesa->radeonScreen = screen;
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rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
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screen->sarea_priv_offset);
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rmesa->dma.buf0_address = rmesa->r200Screen->buffers->list[0].address;
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rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
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(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
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make_empty_list( & rmesa->swapped );
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@ -391,7 +391,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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ctx->Const.MinPointSizeAA = 1.0;
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ctx->Const.MaxPointSizeAA = 1.0;
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ctx->Const.PointSizeGranularity = 0.0625;
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if (rmesa->r200Screen->drmSupportsPointSprites)
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if (rmesa->radeonScreen->drmSupportsPointSprites)
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ctx->Const.MaxPointSize = 2047.0;
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else
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ctx->Const.MaxPointSize = 1.0;
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@ -445,7 +445,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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_math_matrix_set_identity( &rmesa->tmpmat );
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driInitExtensions( ctx, card_extensions, GL_TRUE );
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if (!(rmesa->r200Screen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
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if (!(rmesa->radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
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/* yuv textures don't work with some chips - R200 / rv280 okay so far
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others get the bit ordering right but don't actually do YUV-RGB conversion */
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_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
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@ -458,19 +458,19 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
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}
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if (rmesa->r200Screen->drmSupportsCubeMapsR200)
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if (rmesa->radeonScreen->drmSupportsCubeMapsR200)
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_mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
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if (rmesa->r200Screen->drmSupportsBlendColor) {
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if (rmesa->radeonScreen->drmSupportsBlendColor) {
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driInitExtensions( ctx, blend_extensions, GL_FALSE );
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}
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if(rmesa->r200Screen->drmSupportsVertexProgram)
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if(rmesa->radeonScreen->drmSupportsVertexProgram)
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driInitSingleExtension( ctx, ARB_vp_extension );
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if(driQueryOptionb(&rmesa->optionCache, "nv_vertex_program"))
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driInitSingleExtension( ctx, NV_vp_extension );
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if ((ctx->Const.MaxTextureUnits == 6) && rmesa->r200Screen->drmSupportsFragShader)
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if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeonScreen->drmSupportsFragShader)
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driInitSingleExtension( ctx, ATI_fs_extension );
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if (rmesa->r200Screen->drmSupportsPointSprites)
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if (rmesa->radeonScreen->drmSupportsPointSprites)
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driInitExtensions( ctx, point_extensions, GL_FALSE );
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#if 0
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r200InitDriverFuncs( ctx );
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@ -490,7 +490,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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rmesa->iw.irq_seq = -1;
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rmesa->irqsEmitted = 0;
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rmesa->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
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rmesa->r200Screen->irq);
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rmesa->radeonScreen->irq);
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rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
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@ -499,7 +499,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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"IRQ's not enabled, falling back to %s: %d %d\n",
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rmesa->do_usleeps ? "usleeps" : "busy waits",
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fthrottle_mode,
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rmesa->r200Screen->irq);
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rmesa->radeonScreen->irq);
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rmesa->prefer_gart_client_texturing =
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(getenv("R200_GART_CLIENT_TEXTURES") != 0);
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@ -520,9 +520,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
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FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
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}
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else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
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!(rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL)) {
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if (rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL) {
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rmesa->r200Screen->chip_flags &= ~RADEON_CHIPSET_TCL;
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!(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
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if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
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rmesa->radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
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fprintf(stderr, "Disabling HW TCL support\n");
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}
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TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
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@ -670,7 +670,7 @@ r200MakeCurrent( __DRIcontextPrivate *driContextPriv,
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if ( newCtx->dri.drawable != driDrawPriv ||
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newCtx->lastStamp != driDrawPriv->lastStamp ) {
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if (driDrawPriv->swap_interval == (unsigned)-1) {
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driDrawPriv->vblFlags = (newCtx->r200Screen->irq != 0)
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driDrawPriv->vblFlags = (newCtx->radeonScreen->irq != 0)
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? driGetDefaultVBlankFlags(&newCtx->optionCache)
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: VBLANK_FLAG_NO_IRQ;
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@ -540,20 +540,12 @@ struct r200_state {
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GLuint envneeded;
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};
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#define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \
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#define GET_START(rvb) (rmesa->radeonScreen->gart_buffer_offset + \
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(rvb)->address - rmesa->dma.buf0_address + \
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(rvb)->start)
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#define R200_CMD_BUF_SZ (16*1024)
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struct r200_store {
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GLuint statenr;
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GLuint primnr;
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char cmd_buf[R200_CMD_BUF_SZ];
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int cmd_used;
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int elts_start;
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};
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/* r200_tcl.c
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*/
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@ -671,11 +663,11 @@ struct r200_context {
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*/
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struct radeon_ioctl ioctl;
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struct radeon_dma dma;
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struct r200_store store;
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struct radeon_store store;
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/* A full state emit as of the first state emit in the main store, in case
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* the context is lost.
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*/
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struct r200_store backup_store;
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struct radeon_store backup_store;
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/* Page flipping
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*/
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@ -699,7 +691,7 @@ struct r200_context {
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unsigned int lastStamp;
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GLboolean lost_context;
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GLboolean save_on_next_emit;
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radeonScreenPtr r200Screen; /* Screen private DRI data */
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radeonScreenPtr radeonScreen; /* Screen private DRI data */
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drm_radeon_sarea_t *sarea; /* Private SAREA data */
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/* TCL stuff
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@ -66,7 +66,7 @@ static void r200WaitForIdle( r200ContextPtr rmesa );
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static void r200BackUpAndEmitLostStateLocked( r200ContextPtr rmesa )
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{
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GLuint nr_released_bufs;
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struct r200_store saved_store;
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struct radeon_store saved_store;
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if (rmesa->backup_store.cmd_used == 0)
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return;
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@ -249,7 +249,7 @@ void r200RefillCurrentDmaRegion( r200ContextPtr rmesa )
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fprintf(stderr, "Allocated buffer %d\n", index);
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dmabuf = CALLOC_STRUCT( radeon_dma_buffer );
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dmabuf->buf = &rmesa->r200Screen->buffers->list[index];
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dmabuf->buf = &rmesa->radeonScreen->buffers->list[index];
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dmabuf->refcount = 1;
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rmesa->dma.current.buf = dmabuf;
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@ -578,16 +578,16 @@ void r200PageFlip( __DRIdrawablePrivate *dPriv )
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#if 000
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if ( rmesa->sarea->pfCurrentPage == 1 ) {
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rmesa->state.color.drawOffset = rmesa->r200Screen->frontOffset;
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rmesa->state.color.drawPitch = rmesa->r200Screen->frontPitch;
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rmesa->state.color.drawOffset = rmesa->radeonScreen->frontOffset;
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rmesa->state.color.drawPitch = rmesa->radeonScreen->frontPitch;
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} else {
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rmesa->state.color.drawOffset = rmesa->r200Screen->backOffset;
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rmesa->state.color.drawPitch = rmesa->r200Screen->backPitch;
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rmesa->state.color.drawOffset = rmesa->radeonScreen->backOffset;
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rmesa->state.color.drawPitch = rmesa->radeonScreen->backPitch;
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}
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R200_STATECHANGE( rmesa, ctx );
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rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = rmesa->state.color.drawOffset
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+ rmesa->r200Screen->fbLocation;
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+ rmesa->radeonScreen->fbLocation;
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rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = rmesa->state.color.drawPitch;
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if (rmesa->sarea->tiling_enabled) {
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rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
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@ -663,7 +663,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
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if (rmesa->using_hyperz) {
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flags |= RADEON_USE_COMP_ZBUF;
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/* if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200)
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/* if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200)
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flags |= RADEON_USE_HIERZ; */
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if (!(rmesa->state.stencil.hwBuffer) ||
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((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
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@ -875,7 +875,7 @@ void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
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fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq,
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writefreq, priority);
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if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->r200Screen->gartTextures.map)
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if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeonScreen->gartTextures.map)
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return NULL;
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if (getenv("R200_NO_ALLOC"))
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@ -886,7 +886,7 @@ void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
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alloc.size = size;
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alloc.region_offset = ®ion_offset;
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ret = drmCommandWriteRead( rmesa->r200Screen->driScreen->fd,
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ret = drmCommandWriteRead( rmesa->radeonScreen->driScreen->fd,
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DRM_RADEON_ALLOC,
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&alloc, sizeof(alloc));
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@ -896,7 +896,7 @@ void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
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}
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{
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char *region_start = (char *)rmesa->r200Screen->gartTextures.map;
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char *region_start = (char *)rmesa->radeonScreen->gartTextures.map;
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return (void *)(region_start + region_offset);
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}
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}
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@ -914,24 +914,24 @@ void r200FreeMemoryMESA(__DRIscreen *screen, GLvoid *pointer)
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if (R200_DEBUG & DEBUG_IOCTL)
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fprintf(stderr, "%s %p\n", __FUNCTION__, pointer);
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if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->r200Screen->gartTextures.map) {
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if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeonScreen->gartTextures.map) {
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fprintf(stderr, "%s: no context\n", __FUNCTION__);
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return;
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}
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region_offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
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region_offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
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if (region_offset < 0 ||
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region_offset > rmesa->r200Screen->gartTextures.size) {
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region_offset > rmesa->radeonScreen->gartTextures.size) {
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fprintf(stderr, "offset %d outside range 0..%d\n", region_offset,
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rmesa->r200Screen->gartTextures.size);
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rmesa->radeonScreen->gartTextures.size);
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return;
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}
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memfree.region = RADEON_MEM_REGION_GART;
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memfree.region_offset = region_offset;
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ret = drmCommandWrite( rmesa->r200Screen->driScreen->fd,
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ret = drmCommandWrite( rmesa->radeonScreen->driScreen->fd,
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DRM_RADEON_FREE,
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&memfree, sizeof(memfree));
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@ -956,16 +956,16 @@ GLuint r200GetMemoryOffsetMESA(__DRIscreen *screen, const GLvoid *pointer)
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card_offset = r200GartOffsetFromVirtual( rmesa, pointer );
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return card_offset - rmesa->r200Screen->gart_base;
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return card_offset - rmesa->radeonScreen->gart_base;
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}
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GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
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GLint size )
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{
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ptrdiff_t offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
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ptrdiff_t offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
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int valid = (size >= 0 &&
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offset >= 0 &&
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offset + size < rmesa->r200Screen->gartTextures.size);
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offset + size < rmesa->radeonScreen->gartTextures.size);
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if (R200_DEBUG & DEBUG_IOCTL)
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fprintf(stderr, "r200IsGartMemory( %p ) : %d\n", pointer, valid );
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@ -976,12 +976,12 @@ GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
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GLuint r200GartOffsetFromVirtual( r200ContextPtr rmesa, const GLvoid *pointer )
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{
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ptrdiff_t offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
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ptrdiff_t offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
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if (offset < 0 || offset > rmesa->r200Screen->gartTextures.size)
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if (offset < 0 || offset > rmesa->radeonScreen->gartTextures.size)
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return ~0;
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else
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return rmesa->r200Screen->gart_texture_offset + offset;
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return rmesa->radeonScreen->gart_texture_offset + offset;
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}
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@ -51,7 +51,7 @@ check_color( const GLcontext *ctx, GLenum type, GLenum format,
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const void *pixels, GLint sz, GLint pitch )
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{
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r200ContextPtr rmesa = R200_CONTEXT(ctx);
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GLuint cpp = rmesa->r200Screen->cpp;
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GLuint cpp = rmesa->radeonScreen->cpp;
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if (R200_DEBUG & DEBUG_PIXEL)
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fprintf(stderr, "%s\n", __FUNCTION__);
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@ -137,8 +137,8 @@ clip_pixelrect( const GLcontext *ctx,
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if (*height <= 0)
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return GL_FALSE;
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*size = ((*y + *height - 1) * rmesa->r200Screen->frontPitch +
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(*x + *width - 1) * rmesa->r200Screen->cpp);
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*size = ((*y + *height - 1) * rmesa->radeonScreen->frontPitch +
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(*x + *width - 1) * rmesa->radeonScreen->cpp);
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return GL_TRUE;
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}
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@ -153,7 +153,7 @@ r200TryReadPixels( GLcontext *ctx,
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r200ContextPtr rmesa = R200_CONTEXT(ctx);
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GLint pitch = pack->RowLength ? pack->RowLength : width;
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GLint blit_format;
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GLuint cpp = rmesa->r200Screen->cpp;
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GLuint cpp = rmesa->radeonScreen->cpp;
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GLint size = width * height * cpp;
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if (R200_DEBUG & DEBUG_PIXEL)
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@ -162,7 +162,7 @@ r200TryReadPixels( GLcontext *ctx,
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/* Only accelerate reading to GART buffers.
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*/
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if ( !r200IsGartMemory(rmesa, pixels,
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pitch * height * rmesa->r200Screen->cpp ) ) {
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pitch * height * rmesa->radeonScreen->cpp ) ) {
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if (R200_DEBUG & DEBUG_PIXEL)
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fprintf(stderr, "%s: dest not GART\n", __FUNCTION__);
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return GL_FALSE;
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@ -180,7 +180,7 @@ r200TryReadPixels( GLcontext *ctx,
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if (!check_color(ctx, type, format, pack, pixels, size, pitch))
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return GL_FALSE;
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switch ( rmesa->r200Screen->cpp ) {
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switch ( rmesa->radeonScreen->cpp ) {
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case 4:
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blit_format = R200_CP_COLOR_FORMAT_ARGB8888;
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break;
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@ -216,10 +216,10 @@ r200TryReadPixels( GLcontext *ctx,
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driRenderbuffer *drb = (driRenderbuffer *) ctx->ReadBuffer->_ColorReadBuffer;
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int nbox = dPriv->numClipRects;
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int src_offset = drb->offset
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+ rmesa->r200Screen->fbLocation;
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+ rmesa->radeonScreen->fbLocation;
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int src_pitch = drb->pitch * drb->cpp;
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int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels );
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int dst_pitch = pitch * rmesa->r200Screen->cpp;
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int dst_pitch = pitch * rmesa->radeonScreen->cpp;
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drm_clip_rect_t *box = dPriv->pClipRects;
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int i;
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@ -301,12 +301,12 @@ static void do_draw_pix( GLcontext *ctx,
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int blit_format;
|
||||
int size;
|
||||
int src_offset = r200GartOffsetFromVirtual( rmesa, pixels );
|
||||
int src_pitch = pitch * rmesa->r200Screen->cpp;
|
||||
int src_pitch = pitch * rmesa->radeonScreen->cpp;
|
||||
|
||||
if (R200_DEBUG & DEBUG_PIXEL)
|
||||
fprintf(stderr, "%s\n", __FUNCTION__);
|
||||
|
||||
switch ( rmesa->r200Screen->cpp ) {
|
||||
switch ( rmesa->radeonScreen->cpp ) {
|
||||
case 2:
|
||||
blit_format = R200_CP_COLOR_FORMAT_RGB565;
|
||||
break;
|
||||
|
|
@ -357,7 +357,7 @@ static void do_draw_pix( GLcontext *ctx,
|
|||
blit_format,
|
||||
src_pitch, src_offset,
|
||||
drb->pitch * drb->cpp,
|
||||
drb->offset + rmesa->r200Screen->fbLocation,
|
||||
drb->offset + rmesa->radeonScreen->fbLocation,
|
||||
bx - x, by - y,
|
||||
bx, by,
|
||||
bw, bh );
|
||||
|
|
@ -381,7 +381,7 @@ r200TryDrawPixels( GLcontext *ctx,
|
|||
r200ContextPtr rmesa = R200_CONTEXT(ctx);
|
||||
GLint pitch = unpack->RowLength ? unpack->RowLength : width;
|
||||
GLuint planemask;
|
||||
GLuint cpp = rmesa->r200Screen->cpp;
|
||||
GLuint cpp = rmesa->radeonScreen->cpp;
|
||||
GLint size = height * pitch * cpp;
|
||||
|
||||
if (R200_DEBUG & DEBUG_PIXEL)
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@ static void r200BlendColor( GLcontext *ctx, const GLfloat cf[4] )
|
|||
CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
|
||||
CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
|
||||
CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
|
||||
if (rmesa->r200Screen->drmSupportsBlendColor)
|
||||
if (rmesa->radeonScreen->drmSupportsBlendColor)
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] );
|
||||
}
|
||||
|
||||
|
|
@ -213,7 +213,7 @@ static void r200_set_blend_state( GLcontext * ctx )
|
|||
|
||||
R200_STATECHANGE( rmesa, ctx );
|
||||
|
||||
if (rmesa->r200Screen->drmSupportsBlendColor) {
|
||||
if (rmesa->radeonScreen->drmSupportsBlendColor) {
|
||||
if (ctx->Color.ColorLogicOpEnabled) {
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ROP_ENABLE;
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func;
|
||||
|
|
@ -278,7 +278,7 @@ static void r200_set_blend_state( GLcontext * ctx )
|
|||
return;
|
||||
}
|
||||
|
||||
if (!rmesa->r200Screen->drmSupportsBlendColor) {
|
||||
if (!rmesa->radeonScreen->drmSupportsBlendColor) {
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
|
||||
return;
|
||||
}
|
||||
|
|
@ -803,7 +803,7 @@ static void r200ColorMask( GLcontext *ctx,
|
|||
GLboolean b, GLboolean a )
|
||||
{
|
||||
r200ContextPtr rmesa = R200_CONTEXT(ctx);
|
||||
GLuint mask = radeonPackColor( rmesa->r200Screen->cpp,
|
||||
GLuint mask = radeonPackColor( rmesa->radeonScreen->cpp,
|
||||
ctx->Color.ColorMask[RCOMP],
|
||||
ctx->Color.ColorMask[GCOMP],
|
||||
ctx->Color.ColorMask[BCOMP],
|
||||
|
|
@ -1805,7 +1805,7 @@ static void r200ClearColor( GLcontext *ctx, const GLfloat c[4] )
|
|||
CLAMPED_FLOAT_TO_UBYTE(color[1], c[1]);
|
||||
CLAMPED_FLOAT_TO_UBYTE(color[2], c[2]);
|
||||
CLAMPED_FLOAT_TO_UBYTE(color[3], c[3]);
|
||||
rmesa->state.color.clear = radeonPackColor( rmesa->r200Screen->cpp,
|
||||
rmesa->state.color.clear = radeonPackColor( rmesa->radeonScreen->cpp,
|
||||
color[0], color[1],
|
||||
color[2], color[3] );
|
||||
}
|
||||
|
|
@ -2465,7 +2465,7 @@ r200UpdateDrawBuffer(GLcontext *ctx)
|
|||
|
||||
/* Note: we used the (possibly) page-flipped values */
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET]
|
||||
= ((drb->flippedOffset + rmesa->r200Screen->fbLocation)
|
||||
= ((drb->flippedOffset + rmesa->radeonScreen->fbLocation)
|
||||
& R200_COLOROFFSET_MASK);
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch;
|
||||
if (rmesa->sarea->tiling_enabled) {
|
||||
|
|
|
|||
|
|
@ -191,7 +191,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
GLuint color_fmt, depth_fmt, i;
|
||||
GLint drawPitch, drawOffset;
|
||||
|
||||
switch ( rmesa->r200Screen->cpp ) {
|
||||
switch ( rmesa->radeonScreen->cpp ) {
|
||||
case 2:
|
||||
color_fmt = R200_COLOR_FORMAT_RGB565;
|
||||
break;
|
||||
|
|
@ -231,19 +231,19 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
rmesa->Fallback = 0;
|
||||
|
||||
if ( ctx->Visual.doubleBufferMode && rmesa->sarea->pfCurrentPage == 0 ) {
|
||||
drawOffset = rmesa->r200Screen->backOffset;
|
||||
drawPitch = rmesa->r200Screen->backPitch;
|
||||
drawOffset = rmesa->radeonScreen->backOffset;
|
||||
drawPitch = rmesa->radeonScreen->backPitch;
|
||||
} else {
|
||||
drawOffset = rmesa->r200Screen->frontOffset;
|
||||
drawPitch = rmesa->r200Screen->frontPitch;
|
||||
drawOffset = rmesa->radeonScreen->frontOffset;
|
||||
drawPitch = rmesa->radeonScreen->frontPitch;
|
||||
}
|
||||
#if 000
|
||||
if ( ctx->Visual.doubleBufferMode && rmesa->sarea->pfCurrentPage == 0 ) {
|
||||
rmesa->state.color.drawOffset = rmesa->r200Screen->backOffset;
|
||||
rmesa->state.color.drawPitch = rmesa->r200Screen->backPitch;
|
||||
rmesa->state.color.drawOffset = rmesa->radeonScreen->backOffset;
|
||||
rmesa->state.color.drawPitch = rmesa->radeonScreen->backPitch;
|
||||
} else {
|
||||
rmesa->state.color.drawOffset = rmesa->r200Screen->frontOffset;
|
||||
rmesa->state.color.drawPitch = rmesa->r200Screen->frontPitch;
|
||||
rmesa->state.color.drawOffset = rmesa->radeonScreen->frontOffset;
|
||||
rmesa->state.color.drawPitch = rmesa->radeonScreen->frontPitch;
|
||||
}
|
||||
|
||||
rmesa->state.pixel.readOffset = rmesa->state.color.drawOffset;
|
||||
|
|
@ -267,7 +267,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
|
||||
/* Allocate state buffers:
|
||||
*/
|
||||
if (rmesa->r200Screen->drmSupportsBlendColor)
|
||||
if (rmesa->radeonScreen->drmSupportsBlendColor)
|
||||
ALLOC_STATE( ctx, always, CTX_STATE_SIZE_NEWDRM, "CTX/context", 0 );
|
||||
else
|
||||
ALLOC_STATE( ctx, always, CTX_STATE_SIZE_OLDDRM, "CTX/context", 0 );
|
||||
|
|
@ -282,8 +282,8 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
ALLOC_STATE( cst, always, CST_STATE_SIZE, "CST/constant", 0 );
|
||||
ALLOC_STATE( zbs, always, ZBS_STATE_SIZE, "ZBS/zbias", 0 );
|
||||
ALLOC_STATE( tf, tf, TF_STATE_SIZE, "TF/tfactor", 0 );
|
||||
if (rmesa->r200Screen->drmSupportsFragShader) {
|
||||
if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
|
||||
if (rmesa->radeonScreen->drmSupportsFragShader) {
|
||||
if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
|
||||
/* make sure texture units 0/1 are emitted pair-wise for r200 t0 hang workaround */
|
||||
ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-0", 0 );
|
||||
ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-1", 1 );
|
||||
|
|
@ -303,7 +303,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
ALLOC_STATE( afs[1], afs, AFS_STATE_SIZE, "AFS/afsinst-1", 1 );
|
||||
}
|
||||
else {
|
||||
if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
|
||||
if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
|
||||
ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-0", 0 );
|
||||
ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-1", 1 );
|
||||
ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 );
|
||||
|
|
@ -321,7 +321,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
ALLOC_STATE( afs[0], never, AFS_STATE_SIZE, "AFS/afsinst-0", 0 );
|
||||
ALLOC_STATE( afs[1], never, AFS_STATE_SIZE, "AFS/afsinst-1", 1 );
|
||||
}
|
||||
if (rmesa->r200Screen->drmSupportsCubeMapsR200) {
|
||||
if (rmesa->radeonScreen->drmSupportsCubeMapsR200) {
|
||||
ALLOC_STATE( cube[0], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-0", 0 );
|
||||
ALLOC_STATE( cube[1], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-1", 1 );
|
||||
ALLOC_STATE( cube[2], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-2", 2 );
|
||||
|
|
@ -337,7 +337,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
ALLOC_STATE( cube[4], never, CUBE_STATE_SIZE, "CUBE/tex-4", 4 );
|
||||
ALLOC_STATE( cube[5], never, CUBE_STATE_SIZE, "CUBE/tex-5", 5 );
|
||||
}
|
||||
if (rmesa->r200Screen->drmSupportsVertexProgram) {
|
||||
if (rmesa->radeonScreen->drmSupportsVertexProgram) {
|
||||
ALLOC_STATE( pvs, tcl_vp, PVS_STATE_SIZE, "PVS/pvscntl", 0 );
|
||||
ALLOC_STATE( vpi[0], tcl_vp, VPI_STATE_SIZE, "VP/vertexprog-0", 0 );
|
||||
ALLOC_STATE( vpi[1], tcl_vp_size, VPI_STATE_SIZE, "VP/vertexprog-1", 1 );
|
||||
|
|
@ -390,13 +390,13 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
ALLOC_STATE( pix[3], texenv, PIX_STATE_SIZE, "PIX/pixstage-3", 3 );
|
||||
ALLOC_STATE( pix[4], texenv, PIX_STATE_SIZE, "PIX/pixstage-4", 4 );
|
||||
ALLOC_STATE( pix[5], texenv, PIX_STATE_SIZE, "PIX/pixstage-5", 5 );
|
||||
if (rmesa->r200Screen->drmSupportsTriPerf) {
|
||||
if (rmesa->radeonScreen->drmSupportsTriPerf) {
|
||||
ALLOC_STATE( prf, always, PRF_STATE_SIZE, "PRF/performance-tri", 0 );
|
||||
}
|
||||
else {
|
||||
ALLOC_STATE( prf, never, PRF_STATE_SIZE, "PRF/performance-tri", 0 );
|
||||
}
|
||||
if (rmesa->r200Screen->drmSupportsPointSprites) {
|
||||
if (rmesa->radeonScreen->drmSupportsPointSprites) {
|
||||
ALLOC_STATE( spr, always, SPR_STATE_SIZE, "SPR/pointsprite", 0 );
|
||||
ALLOC_STATE( ptp, tcl, PTP_STATE_SIZE, "PTP/pointparams", 0 );
|
||||
}
|
||||
|
|
@ -412,7 +412,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
rmesa->hw.ctx.cmd[CTX_CMD_0] = cmdpkt(RADEON_EMIT_PP_MISC);
|
||||
rmesa->hw.ctx.cmd[CTX_CMD_1] = cmdpkt(RADEON_EMIT_PP_CNTL);
|
||||
rmesa->hw.ctx.cmd[CTX_CMD_2] = cmdpkt(RADEON_EMIT_RB3D_COLORPITCH);
|
||||
if (rmesa->r200Screen->drmSupportsBlendColor)
|
||||
if (rmesa->radeonScreen->drmSupportsBlendColor)
|
||||
rmesa->hw.ctx.cmd[CTX_CMD_3] = cmdpkt(R200_EMIT_RB3D_BLENDCOLOR);
|
||||
rmesa->hw.lin.cmd[LIN_CMD_0] = cmdpkt(RADEON_EMIT_RE_LINE_PATTERN);
|
||||
rmesa->hw.lin.cmd[LIN_CMD_1] = cmdpkt(RADEON_EMIT_SE_LINE_WIDTH);
|
||||
|
|
@ -429,7 +429,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0);
|
||||
rmesa->hw.tam.cmd[TAM_CMD_0] = cmdpkt(R200_EMIT_PP_TAM_DEBUG3);
|
||||
rmesa->hw.tf.cmd[TF_CMD_0] = cmdpkt(R200_EMIT_TFACTOR_0);
|
||||
if (rmesa->r200Screen->drmSupportsFragShader) {
|
||||
if (rmesa->radeonScreen->drmSupportsFragShader) {
|
||||
rmesa->hw.atf.cmd[ATF_CMD_0] = cmdpkt(R200_EMIT_ATF_TFACTOR);
|
||||
rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(R200_EMIT_PP_TXCTLALL_0);
|
||||
rmesa->hw.tex[0].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(R200_EMIT_PP_TXOFFSET_0);
|
||||
|
|
@ -567,7 +567,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
(R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
|
||||
(R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT));
|
||||
|
||||
if (rmesa->r200Screen->drmSupportsBlendColor) {
|
||||
if (rmesa->radeonScreen->drmSupportsBlendColor) {
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = 0x00000000;
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP |
|
||||
(R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
|
||||
|
|
@ -578,10 +578,10 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
}
|
||||
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHOFFSET] =
|
||||
rmesa->r200Screen->depthOffset + rmesa->r200Screen->fbLocation;
|
||||
rmesa->radeonScreen->depthOffset + rmesa->radeonScreen->fbLocation;
|
||||
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] =
|
||||
((rmesa->r200Screen->depthPitch &
|
||||
((rmesa->radeonScreen->depthPitch &
|
||||
R200_DEPTHPITCH_MASK) |
|
||||
R200_DEPTH_ENDIAN_NO_SWAP);
|
||||
|
||||
|
|
@ -599,7 +599,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
if (rmesa->using_hyperz) {
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= R200_Z_COMPRESSION_ENABLE |
|
||||
R200_Z_DECOMPRESSION_ENABLE;
|
||||
/* if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200)
|
||||
/* if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200)
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/
|
||||
}
|
||||
|
||||
|
|
@ -628,7 +628,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
|
||||
#if 000
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = ((rmesa->state.color.drawOffset +
|
||||
rmesa->r200Screen->fbLocation)
|
||||
rmesa->radeonScreen->fbLocation)
|
||||
& R200_COLOROFFSET_MASK);
|
||||
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = ((rmesa->state.color.drawPitch &
|
||||
|
|
@ -636,7 +636,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
R200_COLOR_ENDIAN_NO_SWAP);
|
||||
#else
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = ((drawOffset +
|
||||
rmesa->r200Screen->fbLocation)
|
||||
rmesa->radeonScreen->fbLocation)
|
||||
& R200_COLOROFFSET_MASK);
|
||||
|
||||
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = ((drawPitch &
|
||||
|
|
@ -704,7 +704,7 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
R200_VC_NO_SWAP;
|
||||
#endif
|
||||
|
||||
if (!(rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL)) {
|
||||
if (!(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
|
||||
/* Bypass TCL */
|
||||
rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] |= (1<<8);
|
||||
}
|
||||
|
|
@ -743,28 +743,28 @@ void r200InitState( r200ContextPtr rmesa )
|
|||
rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] =
|
||||
(/* R200_TEXCOORD_PROJ | */
|
||||
0x100000); /* Small default bias */
|
||||
if (rmesa->r200Screen->drmSupportsFragShader) {
|
||||
if (rmesa->radeonScreen->drmSupportsFragShader) {
|
||||
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->hw.tex[i].cmd[TEX_PP_CUBIC_FACES] = 0;
|
||||
rmesa->hw.tex[i].cmd[TEX_PP_TXMULTI_CTL] = 0;
|
||||
}
|
||||
else {
|
||||
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_OLDDRM] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
}
|
||||
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] =
|
||||
rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
|
||||
|
||||
rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND] =
|
||||
(R200_TXC_ARG_A_ZERO |
|
||||
|
|
|
|||
|
|
@ -285,7 +285,7 @@ static void flush_last_swtcl_prim( r200ContextPtr rmesa )
|
|||
|
||||
if (rmesa->dma.current.buf) {
|
||||
struct radeon_dma_region *current = &rmesa->dma.current;
|
||||
GLuint current_offset = (rmesa->r200Screen->gart_buffer_offset +
|
||||
GLuint current_offset = (rmesa->radeonScreen->gart_buffer_offset +
|
||||
current->buf->buf->idx * RADEON_BUFFER_SIZE +
|
||||
current->start);
|
||||
|
||||
|
|
|
|||
|
|
@ -489,7 +489,7 @@ int r200UploadTexImages( r200ContextPtr rmesa, radeonTexObjPtr t, GLuint face )
|
|||
}
|
||||
|
||||
/* Set the base offset of the texture image */
|
||||
t->bufAddr = rmesa->r200Screen->texOffset[heap]
|
||||
t->bufAddr = rmesa->radeonScreen->texOffset[heap]
|
||||
+ t->base.memBlock->ofs;
|
||||
t->pp_txoffset = t->bufAddr;
|
||||
|
||||
|
|
|
|||
|
|
@ -1225,7 +1225,7 @@ static void import_tex_obj_state( r200ContextPtr rmesa,
|
|||
cmd[TEX_PP_TXSIZE] = texobj->pp_txsize; /* NPOT only! */
|
||||
cmd[TEX_PP_TXPITCH] = texobj->pp_txpitch; /* NPOT only! */
|
||||
cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color;
|
||||
if (rmesa->r200Screen->drmSupportsFragShader) {
|
||||
if (rmesa->radeonScreen->drmSupportsFragShader) {
|
||||
cmd[TEX_PP_TXOFFSET_NEWDRM] = texobj->pp_txoffset;
|
||||
}
|
||||
else {
|
||||
|
|
@ -1239,7 +1239,7 @@ static void import_tex_obj_state( r200ContextPtr rmesa,
|
|||
|
||||
R200_STATECHANGE( rmesa, cube[unit] );
|
||||
cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
|
||||
if (rmesa->r200Screen->drmSupportsFragShader) {
|
||||
if (rmesa->radeonScreen->drmSupportsFragShader) {
|
||||
/* that value is submitted twice. could change cube atom
|
||||
to not include that command when new drm is used */
|
||||
cmd[TEX_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
|
||||
|
|
@ -1850,7 +1850,7 @@ void r200UpdateTextureState( GLcontext *ctx )
|
|||
r200ChooseVertexState( ctx );
|
||||
|
||||
|
||||
if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
|
||||
if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
|
||||
|
||||
/*
|
||||
* T0 hang workaround -------------
|
||||
|
|
|
|||
|
|
@ -1110,7 +1110,7 @@ void r200SetupVertexProg( GLcontext *ctx ) {
|
|||
}
|
||||
/* could optimize setting up vertex progs away for non-tcl hw */
|
||||
fallback = !(vp->native && r200VertexProgUpdateParams(ctx, vp) &&
|
||||
rmesa->r200Screen->drmSupportsVertexProgram);
|
||||
rmesa->radeonScreen->drmSupportsVertexProgram);
|
||||
TCL_FALLBACK(ctx, R200_TCL_FALLBACK_VERTEX_PROGRAM, fallback);
|
||||
if (rmesa->TclFallback) return;
|
||||
|
||||
|
|
|
|||
|
|
@ -178,6 +178,16 @@ static INLINE GLuint radeonPackColor(GLuint cpp,
|
|||
}
|
||||
}
|
||||
|
||||
#define MAX_CMD_BUF_SZ (16*1024)
|
||||
|
||||
struct radeon_store {
|
||||
GLuint statenr;
|
||||
GLuint primnr;
|
||||
char cmd_buf[MAX_CMD_BUF_SZ];
|
||||
int cmd_used;
|
||||
int elts_start;
|
||||
};
|
||||
|
||||
struct radeon_dri_mirror {
|
||||
__DRIcontextPrivate *context; /* DRI context */
|
||||
__DRIscreenPrivate *screen; /* DRI screen */
|
||||
|
|
@ -213,3 +223,4 @@ struct radeon_dri_mirror {
|
|||
#define DEBUG_SYNC 0x1000
|
||||
#define DEBUG_PIXEL 0x2000
|
||||
#define DEBUG_MEMORY 0x4000
|
||||
|
||||
|
|
|
|||
|
|
@ -354,14 +354,6 @@ struct radeon_state {
|
|||
|
||||
#define RADEON_CMD_BUF_SZ (8*1024)
|
||||
|
||||
struct radeon_store {
|
||||
GLuint statenr;
|
||||
GLuint primnr;
|
||||
char cmd_buf[RADEON_CMD_BUF_SZ];
|
||||
int cmd_used;
|
||||
int elts_start;
|
||||
};
|
||||
|
||||
/* radeon_tcl.c
|
||||
*/
|
||||
struct radeon_tcl_info {
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue