radeonsi: add color buffer support for R9G9B9E5_FLOAT on gfx10.3

This was missed when we added gfx10.3.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16215>
This commit is contained in:
Marek Olšák 2022-04-24 23:06:43 -04:00
parent fd5e661954
commit 01d994f5e6
4 changed files with 11 additions and 5 deletions

View file

@ -169,7 +169,7 @@ bool vi_alpha_is_on_msb(struct si_screen *sscreen, enum pipe_format format)
{
format = si_simplify_cb_format(format);
const struct util_format_description *desc = util_format_description(format);
unsigned comp_swap = si_translate_colorswap(format, false);
unsigned comp_swap = si_translate_colorswap(sscreen->info.chip_class, format, false);
/* The following code matches the hw behavior. */
if (desc->nr_channels == 1) {

View file

@ -1584,7 +1584,8 @@ struct pipe_surface *si_create_surface_custom(struct pipe_context *pipe,
struct pipe_resource *texture,
const struct pipe_surface *templ, unsigned width0,
unsigned height0, unsigned width, unsigned height);
unsigned si_translate_colorswap(enum pipe_format format, bool do_endian_swap);
unsigned si_translate_colorswap(enum chip_class chip_class, enum pipe_format format,
bool do_endian_swap);
bool si_texture_disable_dcc(struct si_context *sctx, struct si_texture *tex);
void si_init_screen_texture_functions(struct si_screen *sscreen);
void si_init_context_texture_functions(struct si_context *sctx);

View file

@ -2299,7 +2299,7 @@ static bool si_is_colorbuffer_format_supported(enum chip_class chip_class,
enum pipe_format format)
{
return si_translate_colorformat(chip_class, format) != V_028C70_COLOR_INVALID &&
si_translate_colorswap(format, false) != ~0U;
si_translate_colorswap(chip_class, format, false) != ~0U;
}
static bool si_is_zs_format_supported(enum pipe_format format)
@ -2460,7 +2460,7 @@ static void si_initialize_color_surface(struct si_context *sctx, struct si_surfa
PRINT_ERR("Invalid CB format: %d, disabling CB.\n", surf->base.format);
}
assert(format != V_028C70_COLOR_INVALID);
swap = si_translate_colorswap(surf->base.format, false);
swap = si_translate_colorswap(sctx->chip_class, surf->base.format, false);
endian = si_colorformat_endian_swap(format);
/* blend clamp should be set for all NORM/SRGB types */

View file

@ -2130,7 +2130,8 @@ static void si_surface_destroy(struct pipe_context *pipe, struct pipe_surface *s
FREE(surface);
}
unsigned si_translate_colorswap(enum pipe_format format, bool do_endian_swap)
unsigned si_translate_colorswap(enum chip_class chip_class, enum pipe_format format,
bool do_endian_swap)
{
const struct util_format_description *desc = util_format_description(format);
@ -2139,6 +2140,10 @@ unsigned si_translate_colorswap(enum pipe_format format, bool do_endian_swap)
if (format == PIPE_FORMAT_R11G11B10_FLOAT) /* isn't plain */
return V_028C70_SWAP_STD;
if (chip_class >= GFX10_3 &&
format == PIPE_FORMAT_R9G9B9E5_FLOAT) /* isn't plain */
return V_028C70_SWAP_STD;
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
return ~0U;