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gallium: Import Dennis Smit cpu detection code.
It still needs a slight code massasing to integrate with the rest of gallium (namely mapping the OS_* ARCH_* defines), but I'm commiting anyway so that it is available to be used when somebody needs it.
This commit is contained in:
José Fonseca
parent
b721bc8792
commit
01bd21eef8
2 changed files with 584 additions and 0 deletions
506
src/gallium/auxiliary/util/u_cpu_detect.c
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506
src/gallium/auxiliary/util/u_cpu_detect.c
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@ -0,0 +1,506 @@
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/**************************************************************************
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*
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* Copyright 2008 Dennis Smit
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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/*
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* Based on the work of Eric Anholt <anholt@FreeBSD.org>
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*/
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/* FIXME: clean this entire file up */
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#include "u_cpu_detect.h"
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#ifdef __linux__
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#define OS_LINUX
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#endif
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#ifdef WIN32
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#define OS_WIN32
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#endif
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#if defined(ARCH_POWERPC)
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#if defined(OS_DARWIN)
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#include <sys/sysctl.h>
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#else
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#include <signal.h>
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#include <setjmp.h>
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#endif
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#endif
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#if defined(OS_NETBSD) || defined(OS_OPENBSD)
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <machine/cpu.h>
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#endif
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#if defined(OS_FREEBSD)
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#if defined(OS_LINUX)
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#include <signal.h>
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#endif
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#if defined(OS_WIN32)
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#include <windows.h>
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <string.h>
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static struct cpu_detect_caps __cpu_detect_caps;
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static int __cpu_detect_initialized = 0;
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static int has_cpuid(void);
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static int cpuid(unsigned int ax, unsigned int *p);
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/* The sigill handlers */
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#if defined(ARCH_X86) /* x86 (linux katmai handler check thing) */
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#if defined(OS_LINUX) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
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static void sigill_handler_sse(int signal, struct sigcontext sc)
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{
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/* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
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* instructions are 3 bytes long. We must increment the instruction
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* pointer manually to avoid repeated execution of the offending
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* instruction.
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*
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* If the SIGILL is caused by a divide-by-zero when unmasked
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* exceptions aren't supported, the SIMD FPU status and control
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* word will be restored at the end of the test, so we don't need
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* to worry about doing it here. Besides, we may not be able to...
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*/
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sc.eip += 3;
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__cpu_detect_caps.hasSSE=0;
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}
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static void sigfpe_handler_sse(int signal, struct sigcontext sc)
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{
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if (sc.fpstate->magic != 0xffff) {
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/* Our signal context has the extended FPU state, so reset the
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* divide-by-zero exception mask and clear the divide-by-zero
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* exception bit.
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*/
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sc.fpstate->mxcsr |= 0x00000200;
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sc.fpstate->mxcsr &= 0xfffffffb;
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} else {
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/* If we ever get here, we're completely hosed.
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*/
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}
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}
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#endif
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#endif /* OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
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#if defined(OS_WIN32)
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LONG CALLBACK win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
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{
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if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
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ep->ContextRecord->Eip +=3;
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__cpu_detect_caps.hasSSE=0;
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return EXCEPTION_CONTINUE_EXECUTION;
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}
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return EXCEPTION_CONTINUE_SEARCH;
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}
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#endif /* OS_WIN32 */
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#if defined(ARCH_POWERPC) && !defined(OS_DARWIN)
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static sigjmp_buf __lv_powerpc_jmpbuf;
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static volatile sig_atomic_t __lv_powerpc_canjump = 0;
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static void sigill_handler (int sig);
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static void sigill_handler (int sig)
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{
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if (!__lv_powerpc_canjump) {
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signal (sig, SIG_DFL);
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raise (sig);
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}
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__lv_powerpc_canjump = 0;
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siglongjmp(__lv_powerpc_jmpbuf, 1);
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}
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static void check_os_altivec_support(void)
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{
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#if defined(OS_DARWIN)
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int sels[2] = {CTL_HW, HW_VECTORUNIT};
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int has_vu = 0;
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int len = sizeof (has_vu);
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int err;
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err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
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if (err == 0) {
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if (has_vu != 0) {
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__cpu_detect_caps.hasAltiVec = 1;
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}
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}
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#else /* !OS_DARWIN */
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/* no Darwin, do it the brute-force way */
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/* this is borrowed from the libmpeg2 library */
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signal(SIGILL, sigill_handler);
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if (sigsetjmp(__lv_powerpc_jmpbuf, 1)) {
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signal(SIGILL, SIG_DFL);
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} else {
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__lv_powerpc_canjump = 1;
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__asm __volatile
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("mtspr 256, %0\n\t"
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"vand %%v0, %%v0, %%v0"
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:
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: "r" (-1));
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signal(SIGILL, SIG_DFL);
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__cpu_detect_caps.hasAltiVec = 1;
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}
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#endif
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}
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#endif
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/* If we're running on a processor that can do SSE, let's see if we
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* are allowed to or not. This will catch 2.4.0 or later kernels that
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* haven't been configured for a Pentium III but are running on one,
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* and RedHat patched 2.2 kernels that have broken exception handling
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* support for user space apps that do SSE.
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*/
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static void check_os_katmai_support(void)
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{
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#if defined(ARCH_X86)
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#if defined(OS_FREEBSD)
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int has_sse=0, ret;
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int len = sizeof (has_sse);
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ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0);
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if (ret || !has_sse)
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__cpu_detect_caps.hasSSE=0;
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#elif defined(OS_NETBSD) || defined(OS_OPENBSD)
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int has_sse, has_sse2, ret, mib[2];
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int varlen;
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mib[0] = CTL_MACHDEP;
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mib[1] = CPU_SSE;
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varlen = sizeof (has_sse);
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ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
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if (ret < 0 || !has_sse) {
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__cpu_detect_caps.hasSSE = 0;
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} else {
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__cpu_detect_caps.hasSSE = 1;
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}
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mib[1] = CPU_SSE2;
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varlen = sizeof (has_sse2);
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ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
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if (ret < 0 || !has_sse2) {
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__cpu_detect_caps.hasSSE2 = 0;
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} else {
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__cpu_detect_caps.hasSSE2 = 1;
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}
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__cpu_detect_caps.hasSSE = 0; /* FIXME ?!?!? */
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#elif defined(OS_WIN32)
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LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
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if (__cpu_detect_caps.hasSSE) {
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exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
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__asm __volatile ("xorps %xmm0, %xmm0");
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SetUnhandledExceptionFilter(exc_fil);
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}
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#elif defined(OS_LINUX)
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struct sigaction saved_sigill;
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struct sigaction saved_sigfpe;
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/* Save the original signal handlers.
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*/
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sigaction(SIGILL, NULL, &saved_sigill);
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sigaction(SIGFPE, NULL, &saved_sigfpe);
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signal(SIGILL, (void (*)(int))sigill_handler_sse);
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signal(SIGFPE, (void (*)(int))sigfpe_handler_sse);
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/* Emulate test for OSFXSR in CR4. The OS will set this bit if it
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* supports the extended FPU save and restore required for SSE. If
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* we execute an SSE instruction on a PIII and get a SIGILL, the OS
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* doesn't support Streaming SIMD Exceptions, even if the processor
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* does.
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*/
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if (__cpu_detect_caps.hasSSE) {
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__asm __volatile ("xorps %xmm1, %xmm0");
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}
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/* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
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* it supports unmasked SIMD FPU exceptions. If we unmask the
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* exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
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* doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
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* as expected, we're okay but we need to clean up after it.
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*
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* Are we being too stringent in our requirement that the OS support
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* unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
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* setting CR4.OSFXSR but don't support unmasked exceptions. Win98
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* doesn't even support them. We at least know the user-space SSE
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* support is good in kernels that do support unmasked exceptions,
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* and therefore to be safe I'm going to leave this test in here.
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*/
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if (__cpu_detect_caps.hasSSE) {
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// test_os_katmai_exception_support();
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}
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/* Restore the original signal handlers.
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*/
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sigaction(SIGILL, &saved_sigill, NULL);
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sigaction(SIGFPE, &saved_sigfpe, NULL);
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#else
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/* We can't use POSIX signal handling to test the availability of
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* SSE, so we disable it by default.
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*/
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__cpu_detect_caps.hasSSE = 0;
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#endif /* __linux__ */
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#endif
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}
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static int has_cpuid(void)
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{
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#if defined(ARCH_X86)
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int a, c;
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__asm __volatile
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("pushf\n"
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"popl %0\n"
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"movl %0, %1\n"
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"xorl $0x200000, %0\n"
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"push %0\n"
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"popf\n"
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"pushf\n"
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"popl %0\n"
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: "=a" (a), "=c" (c)
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:
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: "cc");
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return a != c;
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#else
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return 0;
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#endif
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}
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static int cpuid(unsigned int ax, unsigned int *p)
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{
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#if defined(ARCH_X86)
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unsigned int flags;
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__asm __volatile
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("movl %%ebx, %%esi\n\t"
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"cpuid\n\t"
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"xchgl %%ebx, %%esi"
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: "=a" (p[0]), "=S" (p[1]),
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"=c" (p[2]), "=d" (p[3])
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: "0" (ax));
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return 0;
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#else
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return -1;
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#endif
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}
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void cpu_detect_initialize()
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{
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unsigned int regs[4];
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unsigned int regs2[4];
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int mib[2], ncpu;
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int len;
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memset(&__cpu_detect_caps, 0, sizeof (struct cpu_detect_caps));
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/* Check for arch type */
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#if defined(ARCH_MIPS)
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__cpu_detect_caps.type = CPU_DETECT_TYPE_MIPS;
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#elif defined(ARCH_ALPHA)
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__cpu_detect_caps.type = CPU_DETECT_TYPE_ALPHA;
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#elif defined(ARCH_SPARC)
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__cpu_detect_caps.type = CPU_DETECT_TYPE_SPARC;
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#elif defined(ARCH_X86)
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__cpu_detect_caps.type = CPU_DETECT_TYPE_X86;
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#elif defined(ARCH_POWERPC)
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__cpu_detect_caps.type = CPU_DETECT_TYPE_POWERPC;
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#else
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__cpu_detect_caps.type = CPU_DETECT_TYPE_OTHER;
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#endif
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/* Count the number of CPUs in system */
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#if !defined(OS_WIN32) && !defined(OS_UNKNOWN) && defined(_SC_NPROCESSORS_ONLN)
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__cpu_detect_caps.nrcpu = sysconf(_SC_NPROCESSORS_ONLN);
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if (__cpu_detect_caps.nrcpu == -1)
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__cpu_detect_caps.nrcpu = 1;
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#elif defined(OS_NETBSD) || defined(OS_FREEBSD) || defined(OS_OPENBSD)
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mib[0] = CTL_HW;
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mib[1] = HW_NCPU;
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len = sizeof (ncpu);
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sysctl(mib, 2, &ncpu, &len, NULL, 0);
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__cpu_detect_caps.nrcpu = ncpu;
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#else
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__cpu_detect_caps.nrcpu = 1;
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#endif
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#if defined(ARCH_X86)
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/* No cpuid, old 486 or lower */
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if (has_cpuid() == 0)
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return;
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__cpu_detect_caps.cacheline = 32;
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/* Get max cpuid level */
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cpuid(0x00000000, regs);
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if (regs[0] >= 0x00000001) {
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unsigned int cacheline;
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cpuid (0x00000001, regs2);
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__cpu_detect_caps.x86cpuType = (regs2[0] >> 8) & 0xf;
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if (__cpu_detect_caps.x86cpuType == 0xf)
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__cpu_detect_caps.x86cpuType = 8 + ((regs2[0] >> 20) & 255); /* use extended family (P4, IA64) */
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/* general feature flags */
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__cpu_detect_caps.hasTSC = (regs2[3] & (1 << 8 )) >> 8; /* 0x0000010 */
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__cpu_detect_caps.hasMMX = (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
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__cpu_detect_caps.hasSSE = (regs2[3] & (1 << 25 )) >> 25; /* 0x2000000 */
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__cpu_detect_caps.hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; /* 0x4000000 */
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__cpu_detect_caps.hasSSE3 = (regs2[2] & (1)); /* 0x0000001 */
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__cpu_detect_caps.hasSSSE3 = (regs2[2] & (1 << 9 )) >> 9; /* 0x0000020 */
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__cpu_detect_caps.hasMMX2 = __cpu_detect_caps.hasSSE; /* SSE cpus supports mmxext too */
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cacheline = ((regs2[1] >> 8) & 0xFF) * 8;
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if (cacheline > 0)
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__cpu_detect_caps.cacheline = cacheline;
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}
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cpuid(0x80000000, regs);
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if (regs[0] >= 0x80000001) {
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cpuid(0x80000001, regs2);
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__cpu_detect_caps.hasMMX |= (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
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__cpu_detect_caps.hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; /* 0x400000 */
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__cpu_detect_caps.has3DNow = (regs2[3] & (1 << 31 )) >> 31; /* 0x80000000 */
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__cpu_detect_caps.has3DNowExt = (regs2[3] & (1 << 30 )) >> 30;
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}
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if (regs[0] >= 0x80000006) {
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cpuid(0x80000006, regs2);
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__cpu_detect_caps.cacheline = regs2[2] & 0xFF;
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}
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#if defined(OS_LINUX) || defined(OS_FREEBSD) || defined(OS_NETBSD) || defined(OS_CYGWIN) || defined(OS_OPENBSD)
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if (__cpu_detect_caps.hasSSE)
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check_os_katmai_support();
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if (!__cpu_detect_caps.hasSSE) {
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__cpu_detect_caps.hasSSE2 = 0;
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__cpu_detect_caps.hasSSE3 = 0;
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__cpu_detect_caps.hasSSSE3 = 0;
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}
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#else
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__cpu_detect_caps.hasSSE = 0;
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__cpu_detect_caps.hasSSE2 = 0;
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__cpu_detect_caps.hasSSE3 = 0;
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__cpu_detect_caps.hasSSSE3 = 0;
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#endif
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#endif /* ARCH_X86 */
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#if defined(ARCH_POWERPC)
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check_os_altivec_support();
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#endif /* ARCH_POWERPC */
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__cpu_detect_initialized = 1;
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}
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struct cpu_detect_caps *cpu_detect_get_caps()
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||||
{
|
||||
return &__cpu_detect_caps;
|
||||
}
|
||||
|
||||
/* The getters and setters for feature flags */
|
||||
int cpu_detect_get_tsc()
|
||||
{
|
||||
return __cpu_detect_caps.hasTSC;
|
||||
}
|
||||
|
||||
int cpu_detect_get_mmx()
|
||||
{
|
||||
return __cpu_detect_caps.hasMMX;
|
||||
}
|
||||
|
||||
int cpu_detect_get_mmx2()
|
||||
{
|
||||
return __cpu_detect_caps.hasMMX2;
|
||||
}
|
||||
|
||||
int cpu_detect_get_sse()
|
||||
{
|
||||
return __cpu_detect_caps.hasSSE;
|
||||
}
|
||||
|
||||
int cpu_detect_get_sse2()
|
||||
{
|
||||
return __cpu_detect_caps.hasSSE2;
|
||||
}
|
||||
|
||||
int cpu_detect_get_sse3()
|
||||
{
|
||||
return __cpu_detect_caps.hasSSE3;
|
||||
}
|
||||
|
||||
int cpu_detect_get_ssse3()
|
||||
{
|
||||
return __cpu_detect_caps.hasSSSE3;
|
||||
}
|
||||
|
||||
int cpu_detect_get_3dnow()
|
||||
{
|
||||
return __cpu_detect_caps.has3DNow;
|
||||
}
|
||||
|
||||
int cpu_detect_get_3dnow2()
|
||||
{
|
||||
return __cpu_detect_caps.has3DNowExt;
|
||||
}
|
||||
|
||||
int cpu_detect_get_altivec()
|
||||
{
|
||||
return __cpu_detect_caps.hasAltiVec;
|
||||
}
|
||||
|
||||
78
src/gallium/auxiliary/util/u_cpu_detect.h
Normal file
78
src/gallium/auxiliary/util/u_cpu_detect.h
Normal file
|
|
@ -0,0 +1,78 @@
|
|||
/**************************************************************************
|
||||
*
|
||||
* Copyright 2008 Dennis Smit
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
* Based on the work of Eric Anholt <anholt@FreeBSD.org>
|
||||
*/
|
||||
|
||||
#ifndef _CPU_DETECT_H
|
||||
#define _CPU_DETECT_H
|
||||
|
||||
typedef enum {
|
||||
CPU_DETECT_TYPE_MIPS,
|
||||
CPU_DETECT_TYPE_ALPHA,
|
||||
CPU_DETECT_TYPE_SPARC,
|
||||
CPU_DETECT_TYPE_X86,
|
||||
CPU_DETECT_TYPE_POWERPC,
|
||||
CPU_DETECT_TYPE_OTHER
|
||||
} cpu_detect_type;
|
||||
|
||||
struct cpu_detect_caps {
|
||||
cpu_detect_type type;
|
||||
int nrcpu;
|
||||
|
||||
/* Feature flags */
|
||||
int x86cpuType;
|
||||
int cacheline;
|
||||
|
||||
int hasTSC;
|
||||
int hasMMX;
|
||||
int hasMMX2;
|
||||
int hasSSE;
|
||||
int hasSSE2;
|
||||
int hasSSE3;
|
||||
int hasSSSE3;
|
||||
int has3DNow;
|
||||
int has3DNowExt;
|
||||
int hasAltiVec;
|
||||
};
|
||||
|
||||
/* prototypes */
|
||||
void cpu_detect_initialize(void);
|
||||
struct cpu_detect_caps *cpu_detect_get_caps(void);
|
||||
|
||||
int cpu_detect_get_tsc(void);
|
||||
int cpu_detect_get_mmx(void);
|
||||
int cpu_detect_get_mmx2(void);
|
||||
int cpu_detect_get_sse(void);
|
||||
int cpu_detect_get_sse2(void);
|
||||
int cpu_detect_get_sse3(void);
|
||||
int cpu_detect_get_ssse3(void);
|
||||
int cpu_detect_get_3dnow(void);
|
||||
int cpu_detect_get_3dnow2(void);
|
||||
int cpu_detect_get_altivec(void);
|
||||
|
||||
#endif /* _CPU_DETECT_H */
|
||||
Loading…
Add table
Reference in a new issue