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i965/state: Get rid of dword_pitch arguments to buffer functions

Browse source 
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit abb569ca18)
This commit is contained in:
Jason Ekstrand 2015-12-04 18:33:51 -08:00 • committed by Emil Velikov
parent 61cb4db868
commit 017f4755fd
6 changed files with 19 additions and 38 deletions
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9
src/mesa/drivers/dri/i965/brw_context.h
View file

@ -1434,14 +1434,12 @@ void brw_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
uint32_t *out_offset,
bool dword_pitch);
uint32_t *out_offset);
void brw_create_buffer_surface(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
uint32_t *out_offset,
bool dword_pitch);
uint32_t *out_offset);
void brw_update_buffer_texture_surface(struct gl_context *ctx,
unsigned unit,
uint32_t *surf_offset);
@ -1453,8 +1451,7 @@ brw_update_sol_surface(struct brw_context *brw,
void brw_upload_ubo_surfaces(struct brw_context *brw,
struct gl_shader *shader,
struct brw_stage_state *stage_state,
struct brw_stage_prog_data *prog_data,
bool dword_pitch);
struct brw_stage_prog_data *prog_data);
void brw_upload_abo_surfaces(struct brw_context *brw,
struct gl_shader *shader,
struct brw_stage_state *stage_state,

6
src/mesa/drivers/dri/i965/brw_gs_surface_state.c
View file

@ -48,11 +48,10 @@ brw_upload_gs_pull_constants(struct brw_context *brw)
/* BRW_NEW_GS_PROG_DATA */
const struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base;
const bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
/* _NEW_PROGRAM_CONSTANTS */
brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program.Base,
stage_state, &prog_data->base, dword_pitch);
stage_state, &prog_data->base);
}
const struct brw_tracked_state brw_gs_pull_constants = {
@ -79,10 +78,9 @@ brw_upload_gs_ubo_surfaces(struct brw_context *brw)
/* BRW_NEW_GS_PROG_DATA */
struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base;
bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY],
&brw->gs.base, &prog_data->base, dword_pitch);
&brw->gs.base, &prog_data->base);
}
const struct brw_tracked_state brw_gs_ubo_surfaces = {

3
src/mesa/drivers/dri/i965/brw_state.h
View file

@ -357,8 +357,7 @@ brw_upload_pull_constants(struct brw_context *brw,
GLbitfield64 brw_new_constbuf,
const struct gl_program *prog,
struct brw_stage_state *stage_state,
const struct brw_stage_prog_data *prog_data,
bool dword_pitch);
const struct brw_stage_prog_data *prog_data);
/* gen7_vs_state.c */
void

16
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
View file

@ -53,8 +53,7 @@ brw_upload_pull_constants(struct brw_context *brw,
GLbitfield64 brw_new_constbuf,
const struct gl_program *prog,
struct brw_stage_state *stage_state,
const struct brw_stage_prog_data *prog_data,
bool dword_pitch)
const struct brw_stage_prog_data *prog_data)
{
unsigned i;
uint32_t surf_index = prog_data->binding_table.pull_constants_start;
@ -94,8 +93,7 @@ brw_upload_pull_constants(struct brw_context *brw,
}
brw_create_constant_surface(brw, const_bo, const_offset, size,
&stage_state->surf_offset[surf_index],
dword_pitch);
&stage_state->surf_offset[surf_index]);
drm_intel_bo_unreference(const_bo);
brw->ctx.NewDriverState |= brw_new_constbuf;
@ -112,7 +110,6 @@ static void
brw_upload_vs_pull_constants(struct brw_context *brw)
{
struct brw_stage_state *stage_state = &brw->vs.base;
bool dword_pitch;
/* BRW_NEW_VERTEX_PROGRAM */
struct brw_vertex_program *vp =
@ -121,11 +118,9 @@ brw_upload_vs_pull_constants(struct brw_context *brw)
/* BRW_NEW_VS_PROG_DATA */
const struct brw_stage_prog_data *prog_data = &brw->vs.prog_data->base.base;
dword_pitch = brw->vs.prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8;
/* _NEW_PROGRAM_CONSTANTS */
brw_upload_pull_constants(brw, BRW_NEW_VS_CONSTBUF, &vp->program.Base,
stage_state, prog_data, dword_pitch);
stage_state, prog_data);
}
const struct brw_tracked_state brw_vs_pull_constants = {
@ -145,16 +140,13 @@ brw_upload_vs_ubo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
bool dword_pitch;
if (!prog)
return;
/* BRW_NEW_VS_PROG_DATA */
dword_pitch = brw->vs.prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8;
brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX],
&brw->vs.base, &brw->vs.prog_data->base.base,
dword_pitch);
&brw->vs.base, &brw->vs.prog_data->base.base);
}
const struct brw_tracked_state brw_vs_ubo_surfaces = {

21
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -400,8 +400,7 @@ brw_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
uint32_t *out_offset,
bool dword_pitch)
uint32_t *out_offset)
{
brw->vtbl.emit_buffer_surface_state(brw, out_offset, bo, offset,
BRW_SURFACEFORMAT_R32G32B32A32_FLOAT,
@ -418,8 +417,7 @@ brw_create_buffer_surface(struct brw_context *brw,
drm_intel_bo *bo,
uint32_t offset,
uint32_t size,
uint32_t *out_offset,
bool dword_pitch)
uint32_t *out_offset)
{
/* Use a raw surface so we can reuse existing untyped read/write/atomic
* messages. We need these specifically for the fragment shader since they
@ -534,7 +532,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
/* _NEW_PROGRAM_CONSTANTS */
brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &fp->program.Base,
stage_state, prog_data, true);
stage_state, prog_data);
}
const struct brw_tracked_state brw_wm_pull_constants = {
@ -915,8 +913,7 @@ void
brw_upload_ubo_surfaces(struct brw_context *brw,
struct gl_shader *shader,
struct brw_stage_state *stage_state,
struct brw_stage_prog_data *prog_data,
bool dword_pitch)
struct brw_stage_prog_data *prog_data)
{
struct gl_context *ctx = &brw->ctx;
@ -941,8 +938,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw,
binding->BufferObject->Size - binding->Offset);
brw_create_constant_surface(brw, bo, binding->Offset,
binding->BufferObject->Size - binding->Offset,
&ubo_surf_offsets[i],
dword_pitch);
&ubo_surf_offsets[i]);
}
}
@ -964,8 +960,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw,
binding->BufferObject->Size - binding->Offset);
brw_create_buffer_surface(brw, bo, binding->Offset,
binding->BufferObject->Size - binding->Offset,
&ssbo_surf_offsets[i],
dword_pitch);
&ssbo_surf_offsets[i]);
}
}
@ -985,7 +980,7 @@ brw_upload_wm_ubo_surfaces(struct brw_context *brw)
/* BRW_NEW_FS_PROG_DATA */
brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT],
&brw->wm.base, &brw->wm.prog_data->base, true);
&brw->wm.base, &brw->wm.prog_data->base);
}
const struct brw_tracked_state brw_wm_ubo_surfaces = {
@ -1011,7 +1006,7 @@ brw_upload_cs_ubo_surfaces(struct brw_context *brw)
/* BRW_NEW_CS_PROG_DATA */
brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE],
&brw->cs.base, &brw->cs.prog_data->base, true);
&brw->cs.base, &brw->cs.prog_data->base);
}
const struct brw_tracked_state brw_cs_ubo_surfaces = {

2
src/mesa/drivers/dri/i965/gen7_cs_state.c
View file

@ -304,7 +304,7 @@ brw_upload_cs_pull_constants(struct brw_context *brw)
/* _NEW_PROGRAM_CONSTANTS */
brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &cp->program.Base,
stage_state, prog_data, true);
stage_state, prog_data);
}
const struct brw_tracked_state brw_cs_pull_constants = {