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freedreno/registers: add CP_ALWAYS_ON_CONTEXT

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37237>
This commit is contained in:
Anna Maniscalco 2025-09-08 17:53:58 +02:00 • committed by Marge Bot
parent 1da270fb35
commit 011ba1842e
4 changed files with 4 additions and 6 deletions
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1
src/freedreno/registers/adreno/a6xx.xml
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@ -254,6 +254,7 @@ by a particular renderpass/blit.
<bitfield name="CONTEXT" low="4" high="5"/>
</bitset>
<reg64 offset="0x0980" name="CP_ALWAYS_ON_COUNTER"/>
<reg64 offset="0x0982" name="CP_ALWAYS_ON_CONTEXT"/>
<reg32 offset="0x098D" name="CP_AHB_CNTL"/>
<reg32 offset="0x0A00" name="CP_APERTURE_CNTL_HOST" variants="A6XX"/>
<reg32 offset="0x0A00" name="CP_APERTURE_CNTL_HOST" type="a7xx_aperture_cntl" variants="A7XX-"/>

3
src/freedreno/tests/reference/crash.log
View file

@ -747,8 +747,7 @@ registers:
00000000 CP_ROQ_AVAIL_MRB: { REM = 0 }
00000000 CP_ROQ_AVAIL_VSD: { REM = 0 }
00305efe CP_ALWAYS_ON_COUNTER: 0x305efe
00225162 0x982: 00225162
00000000 0x983: 00000000
00225162 CP_ALWAYS_ON_CONTEXT: 0x225162
00000000 0x984: 00000000
00000001 CP_AHB_CNTL: 0x1
00000000 0x98e: 00000000

3
src/freedreno/tests/reference/crash_prefetch.log
View file

@ -962,8 +962,7 @@ registers:
00000000 CP_ROQ_AVAIL_MRB: { REM = 0 }
00000000 CP_ROQ_AVAIL_VSD: { REM = 0 }
002312f5 CP_ALWAYS_ON_COUNTER: 0x2312f5
0022a29d 0x982: 0022a29d
00000000 0x983: 00000000
0022a29d CP_ALWAYS_ON_CONTEXT: 0x22a29d
00000000 0x984: 00000000
00000001 CP_AHB_CNTL: 0x1
00000000 0x98e: 00000000

3
src/freedreno/tests/reference/prefetch-test.log
View file

@ -1541,8 +1541,7 @@ registers:
00000000 CP_ROQ_AVAIL_MRB: { REM = 0 }
00000000 CP_ROQ_AVAIL_VSD: { REM = 0 }
01d492cc CP_ALWAYS_ON_COUNTER: 0x1d492cc
01d41af4 0x982: 01d41af4
00000000 0x983: 00000000
01d41af4 CP_ALWAYS_ON_CONTEXT: 0x1d41af4
00000000 0x984: 00000000
00000001 CP_AHB_CNTL: 0x1
00000000 0x98e: 00000000