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freedreno/a6xx: Handle tess_bo size differences for gen8

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Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
Rob Clark 2025-12-03 10:31:29 -08:00 • committed by Marge Bot
parent 222c005c01
commit 01041c858e
6 changed files with 32 additions and 10 deletions
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3
src/gallium/drivers/freedreno/a6xx/fd6_const.cc
View file

@ -10,6 +10,7 @@
#include "fd6_const.h"
#include "fd6_compute.h"
#include "fd6_pack.h"
#include "fd6_screen.h"
#include "ir3_const.h"
@ -201,7 +202,7 @@ fd6_build_tess_consts(struct fd6_emit *emit)
if (emit->hs) {
struct fd_bo *tess_bo = ctx->screen->tess_bo;
int64_t tess_factor_iova = fd_bo_get_iova(tess_bo);
int64_t tess_param_iova = tess_factor_iova + FD6_TESS_FACTOR_SIZE;
int64_t tess_param_iova = tess_factor_iova + FD6_TESS<CHIP>::FACTOR_SIZE;
constobj.attach_bo(tess_bo);

5
src/gallium/drivers/freedreno/a6xx/fd6_draw.cc
View file

@ -25,6 +25,7 @@
#include "fd6_draw.h"
#include "fd6_emit.h"
#include "fd6_program.h"
#include "fd6_screen.h"
#include "fd6_vsc.h"
#include "fd6_zsa.h"
@ -429,8 +430,8 @@ draw_vbos(struct fd_context *ctx, const struct pipe_draw_info *info,
draw0.tess_enable = true;
/* maximum number of patches that can fit in tess factor/param buffers */
uint32_t subdraw_size = MIN2(FD6_TESS_FACTOR_SIZE / factor_stride,
FD6_TESS_PARAM_SIZE / (emit.hs->output_size * 4));
uint32_t subdraw_size = MIN2(FD6_TESS<CHIP>::FACTOR_SIZE / factor_stride,
FD6_TESS<CHIP>::PARAM_SIZE / (emit.hs->output_size * 4));
/* convert from # of patches to draw count */
subdraw_size *= ctx->patch_vertices;

5
src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
View file

@ -31,6 +31,7 @@
#include "fd6_pack.h"
#include "fd6_program.h"
#include "fd6_rasterizer.h"
#include "fd6_screen.h"
#include "fd6_texture.h"
#include "fd6_zsa.h"
@ -996,12 +997,12 @@ fd6_emit_static_context_regs(struct fd_context *ctx, fd_cs &cs)
if (CHIP >= A7XX) {
/* Blob sets these two per draw. */
crb.add(PC_HS_BUFFER_SIZE(CHIP, FD6_TESS_PARAM_SIZE));
crb.add(PC_HS_BUFFER_SIZE(CHIP, FD6_TESS<CHIP>::PARAM_SIZE));
/* Blob adds a bit more space ({0x10, 0x20, 0x30, 0x40} bytes)
* but the meaning of this additional space is not known,
* so we play safe and don't add it.
*/
crb.add(PC_TF_BUFFER_SIZE(CHIP, FD6_TESS_FACTOR_SIZE));
crb.add(PC_TF_BUFFER_SIZE(CHIP, FD6_TESS<CHIP>::FACTOR_SIZE));
}
/* There is an optimization to skip executing draw states for draws with no

3
src/gallium/drivers/freedreno/a6xx/fd6_program.cc
View file

@ -24,6 +24,7 @@
#include "fd6_emit.h"
#include "fd6_pack.h"
#include "fd6_program.h"
#include "fd6_screen.h"
#include "fd6_texture.h"
/**
@ -1464,7 +1465,7 @@ fd6_program_create(void *data, const struct ir3_shader_variant *bs,
fd_screen_lock(screen);
if (!screen->tess_bo)
screen->tess_bo =
fd_bo_new(screen->dev, FD6_TESS_BO_SIZE, FD_BO_NOMAP, "tessfactor");
fd_bo_new(screen->dev, FD6_TESS<CHIP>::BO_SIZE, FD_BO_NOMAP, "tessfactor");
fd_screen_unlock(screen);
}

22
src/gallium/drivers/freedreno/a6xx/fd6_screen.h
View file

@ -11,7 +11,29 @@
#define FD6_SCREEN_H_
#include "freedreno_screen.h"
#include "freedreno_common.h"
EXTERNC void fd6_screen_init(struct pipe_screen *pscreen);
#ifdef __cplusplus
template <chip_range_support>
struct FD6_TESS;
template <chip CHIP>
struct FD6_TESS<chip_range(CHIP <= A7XX)> {
/* the blob seems to always use 8K factor and 128K param sizes, copy them */
static const size_t FACTOR_SIZE = 8 * 1024;
static const size_t PARAM_SIZE = 128 * 1024;
static const size_t BO_SIZE = FACTOR_SIZE + PARAM_SIZE;
};
template <chip CHIP>
struct FD6_TESS<chip_range(CHIP >= A8XX)> {
/* for gen8, buffers are sized for two draws: */
static const size_t FACTOR_SIZE = 0x4040;
static const size_t PARAM_SIZE = 0x40000;
static const size_t BO_SIZE = FACTOR_SIZE + PARAM_SIZE;
};
#endif
#endif /* FD6_SCREEN_H_ */

4
src/gallium/drivers/freedreno/freedreno_screen.h
View file

@ -165,10 +165,6 @@ struct fd_screen {
struct renderonly *ro;
/* the blob seems to always use 8K factor and 128K param sizes, copy them */
#define FD6_TESS_FACTOR_SIZE (8 * 1024)
#define FD6_TESS_PARAM_SIZE (128 * 1024)
#define FD6_TESS_BO_SIZE (FD6_TESS_FACTOR_SIZE + FD6_TESS_PARAM_SIZE)
struct fd_bo *tess_bo;
/* table with MESA_PRIM_COUNT+1 entries mapping MESA_PRIM_x to