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anv: use workaround framework for 1408224581, 14014097488

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This makes sure we apply WA only when it is required, these issues
do not happen for later MTL steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
This commit is contained in:
Tapani Pälli 2023-06-12 16:37:06 +03:00 • committed by Marge Bot
parent c7c902cdbf
commit 00a91d8870
1 changed files with 15 additions and 12 deletions
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27
src/intel/vulkan/genX_cmd_buffer.c
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@ -7096,18 +7096,21 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_POST_SYNC_BIT;
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
/* Wa_1408224581
*
* Workaround: Gfx12LP Astep only An additional pipe control with
* post-sync = store dword operation would be required.( w/a is to
* have an additional pipe control after the stencil state whenever
* the surface state bits of this state is changing).
*
* This also seems sufficient to handle Wa_14014097488.
*/
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
pc.PostSyncOperation = WriteImmediateData;
pc.Address = cmd_buffer->device->workaround_address;
if (intel_needs_workaround(cmd_buffer->device->info, 1408224581) ||
intel_needs_workaround(cmd_buffer->device->info, 14014097488)) {
/* Wa_1408224581
*
* Workaround: Gfx12LP Astep only An additional pipe control with
* post-sync = store dword operation would be required.( w/a is to
* have an additional pipe control after the stencil state whenever
* the surface state bits of this state is changing).
*
* This also seems sufficient to handle Wa_14014097488.
*/
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
pc.PostSyncOperation = WriteImmediateData;
pc.Address = cmd_buffer->device->workaround_address;
}
}
}
cmd_buffer->state.hiz_enabled = isl_aux_usage_has_hiz(info.hiz_usage);