radv: Remap 10 and 12 bit formats to 16 bit formats

Preserves the previous behavior while handling the new formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>

src/amd/vulkan/meta/radv_meta_clear.c

@@ -1438,7 +1438,7 @@ gfx8_get_fast_clear_parameters(struct radv_device *device, const struct radv_ima
        iview->vk.format == VK_FORMAT_B5G6R5_UNORM_PACK16)
       extra_channel = -1;
    else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {
-      if (ac_alpha_is_on_msb(&pdev->info, vk_format_to_pipe_format(iview->vk.format)))
+      if (ac_alpha_is_on_msb(&pdev->info, radv_format_to_pipe_format(iview->vk.format)))
          extra_channel = desc->nr_channels - 1;
       else
          extra_channel = 0;
@@ -1538,7 +1538,7 @@ gfx11_get_fast_clear_parameters(struct radv_device *device, const struct radv_im
       uint32_t ui[4];
    } value;
    memset(&value, 0, sizeof(value));
-   util_format_pack_rgba(vk_format_to_pipe_format(iview->vk.format), &value, clear_value, 1);
+   util_format_pack_rgba(radv_format_to_pipe_format(iview->vk.format), &value, clear_value, 1);
 
    /* Check the cases where all components or bits are either all 0 or all 1. */
    bool all_bits_are_0 = true;

src/amd/vulkan/radv_buffer_view.c

@@ -42,7 +42,7 @@ radv_make_texel_buffer_descriptor(struct radv_device *device, uint64_t va, VkFor
    const struct ac_buffer_state ac_state = {
       .va = va,
       .size = range,
-      .format = vk_format_to_pipe_format(vk_format),
+      .format = radv_format_to_pipe_format(vk_format),
       .swizzle =
          {
             swizzle[0],

src/amd/vulkan/radv_device.c

@@ -1523,7 +1523,7 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff
 
    const struct ac_cb_state cb_state = {
       .surf = surf,
-      .format = vk_format_to_pipe_format(iview->vk.format),
+      .format = radv_format_to_pipe_format(iview->vk.format),
       .width = vk_format_get_plane_width(iview->image->vk.format, iview->plane_id, iview->extent.width),
       .height = vk_format_get_plane_height(iview->image->vk.format, iview->plane_id, iview->extent.height),
       .first_layer = iview->vk.base_array_layer,
@@ -1605,7 +1605,7 @@ radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buff
    const struct ac_ds_state ds_state = {
       .surf = &iview->image->planes[0].surface,
       .va = radv_image_get_va(iview->image, 0),
-      .format = vk_format_to_pipe_format(iview->image->vk.format),
+      .format = radv_format_to_pipe_format(iview->image->vk.format),
       .width = iview->image->vk.extent.width,
       .height = iview->image->vk.extent.height,
       .level = level,
@@ -1625,7 +1625,7 @@ radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buff
 
    const struct ac_mutable_ds_state mutable_ds_state = {
       .ds = &ds->ac,
-      .format = vk_format_to_pipe_format(iview->image->vk.format),
+      .format = radv_format_to_pipe_format(iview->image->vk.format),
       .tc_compat_htile_enabled = radv_htile_enabled(iview->image, level) && radv_image_is_tc_compat_htile(iview->image),
       .zrange_precision = true,
       .no_d16_compression = true,

src/amd/vulkan/radv_formats.c

@@ -248,13 +248,13 @@ radv_is_zs_format_supported(VkFormat format)
    if (format == VK_FORMAT_D24_UNORM_S8_UINT || format == VK_FORMAT_X8_D24_UNORM_PACK32)
       return false;
 
-   return ac_is_zs_format_supported(vk_format_to_pipe_format(format)) || format == VK_FORMAT_S8_UINT;
+   return ac_is_zs_format_supported(radv_format_to_pipe_format(format)) || format == VK_FORMAT_S8_UINT;
 }
 
 static bool
 radv_is_filter_minmax_format_supported(const struct radv_physical_device *pdev, VkFormat format)
 {
-   return ac_is_reduction_mode_supported(&pdev->info, vk_format_to_pipe_format(format), false);
+   return ac_is_reduction_mode_supported(&pdev->info, radv_format_to_pipe_format(format), false);
 }
 
 bool
@@ -657,7 +657,8 @@ radv_list_drm_format_modifiers(struct radv_physical_device *pdev, VkFormat forma
    VK_OUTARRAY_MAKE_TYPED(VkDrmFormatModifierPropertiesEXT, out, mod_list->pDrmFormatModifierProperties,
                           &mod_list->drmFormatModifierCount);
 
-   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, vk_format_to_pipe_format(format), &mod_count, NULL);
+   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, radv_format_to_pipe_format(format), &mod_count,
+                              NULL);
 
    uint64_t *mods = malloc(mod_count * sizeof(uint64_t));
    if (!mods) {
@@ -665,7 +666,8 @@ radv_list_drm_format_modifiers(struct radv_physical_device *pdev, VkFormat forma
       mod_list->drmFormatModifierCount = 0;
       return;
    }
-   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, vk_format_to_pipe_format(format), &mod_count, mods);
+   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, radv_format_to_pipe_format(format), &mod_count,
+                              mods);
 
    for (unsigned i = 0; i < mod_count; ++i) {
       VkFormatFeatureFlags2 features = radv_get_modifier_flags(pdev, format, mods[i], format_props);
@@ -706,7 +708,8 @@ radv_list_drm_format_modifiers_2(struct radv_physical_device *pdev, VkFormat for
    VK_OUTARRAY_MAKE_TYPED(VkDrmFormatModifierProperties2EXT, out, mod_list->pDrmFormatModifierProperties,
                           &mod_list->drmFormatModifierCount);
 
-   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, vk_format_to_pipe_format(format), &mod_count, NULL);
+   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, radv_format_to_pipe_format(format), &mod_count,
+                              NULL);
 
    uint64_t *mods = malloc(mod_count * sizeof(uint64_t));
    if (!mods) {
@@ -714,7 +717,8 @@ radv_list_drm_format_modifiers_2(struct radv_physical_device *pdev, VkFormat for
       mod_list->drmFormatModifierCount = 0;
       return;
    }
-   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, vk_format_to_pipe_format(format), &mod_count, mods);
+   ac_get_supported_modifiers(&pdev->info, &radv_modifier_options, radv_format_to_pipe_format(format), &mod_count,
+                              mods);
 
    for (unsigned i = 0; i < mod_count; ++i) {
       VkFormatFeatureFlags2 features = radv_get_modifier_flags(pdev, format, mods[i], format_props);

src/amd/vulkan/radv_formats.h

@@ -19,6 +19,21 @@
 
 #include "vk_format.h"
 
+static inline enum pipe_format
+radv_format_to_pipe_format(enum VkFormat vkformat)
+{
+   switch (vkformat) {
+   case VK_FORMAT_R10X6_UNORM_PACK16:
+   case VK_FORMAT_R12X4_UNORM_PACK16:
+      return PIPE_FORMAT_R16_UNORM;
+   case VK_FORMAT_R10X6G10X6_UNORM_2PACK16:
+   case VK_FORMAT_R12X4G12X4_UNORM_2PACK16:
+      return PIPE_FORMAT_R16G16_UNORM;
+   default:
+      return vk_format_to_pipe_format(vkformat);
+   }
+}
+
 /**
  * Return the index of the first non-void channel
  * -1 if no non-void channels
@@ -26,7 +41,7 @@
 static inline int
 vk_format_get_first_non_void_channel(VkFormat format)
 {
-   return util_format_get_first_non_void_channel(vk_format_to_pipe_format(format));
+   return util_format_get_first_non_void_channel(radv_format_to_pipe_format(format));
 }
 
 static inline enum pipe_swizzle
@@ -61,7 +76,7 @@ vk_format_compose_swizzles(const VkComponentMapping *mapping, const unsigned cha
 static inline bool
 vk_format_is_subsampled(VkFormat format)
 {
-   return util_format_is_subsampled_422(vk_format_to_pipe_format(format));
+   return util_format_is_subsampled_422(radv_format_to_pipe_format(format));
 }
 
 static inline VkFormat

src/amd/vulkan/radv_image.c

@@ -1263,7 +1263,7 @@ radv_select_modifier(const struct radv_device *dev, VkFormat format,
       .dcc_retile = true,
    };
 
-   ac_get_supported_modifiers(&pdev->info, &modifier_options, vk_format_to_pipe_format(format), &mod_count, NULL);
+   ac_get_supported_modifiers(&pdev->info, &modifier_options, radv_format_to_pipe_format(format), &mod_count, NULL);
 
    uint64_t *mods = calloc(mod_count, sizeof(*mods));
 
@@ -1271,7 +1271,7 @@ radv_select_modifier(const struct radv_device *dev, VkFormat format,
    if (!mods)
       return mod_list->pDrmFormatModifiers[0];
 
-   ac_get_supported_modifiers(&pdev->info, &modifier_options, vk_format_to_pipe_format(format), &mod_count, mods);
+   ac_get_supported_modifiers(&pdev->info, &modifier_options, radv_format_to_pipe_format(format), &mod_count, mods);
 
    for (unsigned i = 0; i < mod_count; ++i) {
       for (uint32_t j = 0; j < mod_list->drmFormatModifierCount; ++j) {

src/amd/vulkan/radv_image_view.c

@@ -102,7 +102,7 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
    const struct radv_physical_device *pdev = radv_device_physical(device);
    const bool create_2d_view_of_3d =
       (image->vk.create_flags & VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT) && view_type == VK_IMAGE_VIEW_TYPE_2D;
-   enum pipe_format format = vk_format_to_pipe_format(vk_format);
+   enum pipe_format format = radv_format_to_pipe_format(vk_format);
    const struct util_format_description *desc;
    enum pipe_swizzle swizzle[4];
    unsigned array_pitch = 0;
@@ -153,7 +153,7 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
    const struct ac_texture_state tex_state = {
       .surf = &image->planes[0].surface,
       .format = format,
-      .img_format = vk_format_to_pipe_format(image->vk.format),
+      .img_format = radv_format_to_pipe_format(image->vk.format),
       .width = width,
       .height = height,
       .depth = type == V_008F1C_SQ_RSRC_IMG_3D ? depth - 1 : last_layer,
@@ -224,7 +224,7 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
 {
    const struct radv_physical_device *pdev = radv_device_physical(device);
    const struct radv_instance *instance = radv_physical_device_instance(pdev);
-   enum pipe_format format = vk_format_to_pipe_format(vk_format);
+   enum pipe_format format = radv_format_to_pipe_format(vk_format);
    const struct util_format_description *desc;
    enum pipe_swizzle swizzle[4];
    unsigned type;
@@ -257,7 +257,7 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
    const struct ac_texture_state tex_state = {
       .surf = &image->planes[0].surface,
       .format = format,
-      .img_format = vk_format_to_pipe_format(image->vk.format),
+      .img_format = radv_format_to_pipe_format(image->vk.format),
       .width = width,
       .height = height,
       .depth = depth,

src/amd/vulkan/radv_pipeline_graphics.c

@@ -1848,7 +1848,7 @@ radv_generate_graphics_state_key(const struct radv_device *device, const struct
       u_foreach_bit (i, state->vi->attributes_valid) {
          uint32_t binding = state->vi->attributes[i].binding;
          uint32_t offset = state->vi->attributes[i].offset;
-         enum pipe_format format = vk_format_to_pipe_format(state->vi->attributes[i].format);
+         enum pipe_format format = radv_format_to_pipe_format(state->vi->attributes[i].format);
 
          key.vi.vertex_attribute_formats[i] = format;
          key.vi.vertex_attribute_bindings[i] = binding;
@@ -3122,7 +3122,7 @@ radv_pipeline_init_vertex_input_state(const struct radv_device *device, struct r
 
          pipeline->vertex_input.offsets[i] = offset;
 
-         enum pipe_format format = vk_format_to_pipe_format(state->vi->attributes[i].format);
+         enum pipe_format format = radv_format_to_pipe_format(state->vi->attributes[i].format);
          const struct ac_vtx_format_info *vtx_info = &vtx_info_table[format];
 
          pipeline->vertex_input.formats[i] = format;

src/amd/vulkan/radv_sdma.c

@@ -194,8 +194,8 @@ radv_sdma_get_metadata_config(const struct radv_device *const device, const stru
    const VkFormat format = vk_format_get_aspect_format(image->vk.format, aspect_mask);
    const struct util_format_description *desc = vk_format_description(format);
 
-   const uint32_t data_format = ac_get_cb_format(pdev->info.gfx_level, vk_format_to_pipe_format(format));
+   const uint32_t data_format = ac_get_cb_format(pdev->info.gfx_level, radv_format_to_pipe_format(format));
-   const uint32_t alpha_is_on_msb = ac_alpha_is_on_msb(&pdev->info, vk_format_to_pipe_format(format));
+   const uint32_t alpha_is_on_msb = ac_alpha_is_on_msb(&pdev->info, radv_format_to_pipe_format(format));
    const uint32_t number_type = radv_translate_buffer_numformat(desc, vk_format_get_first_non_void_channel(format));
    const uint32_t surface_type = radv_sdma_surface_type_from_aspect_mask(aspect_mask);
    const uint32_t max_comp_block_size = surf->u.gfx9.color.dcc.max_compressed_block_size;