2015-05-04 15:17:56 -07:00
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Jason Ekstrand (jason@jlekstrand.net)
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*
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*/
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2017-07-26 13:32:01 -07:00
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#include <math.h>
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2018-04-25 18:19:23 +02:00
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#include "nir/nir_builtin_builder.h"
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2015-12-28 11:49:33 -08:00
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#include "vtn_private.h"
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#include "GLSL.std.450.h"
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2015-05-04 15:17:56 -07:00
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2016-01-19 12:15:36 -08:00
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#define M_PIf ((float) M_PI)
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#define M_PI_2f ((float) M_PI_2)
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#define M_PI_4f ((float) M_PI_4)
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2016-01-08 16:02:06 -08:00
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static nir_ssa_def *
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build_mat2_det(nir_builder *b, nir_ssa_def *col[2])
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{
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2018-07-13 03:33:22 +02:00
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unsigned swiz[2] = {1, 0 };
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2016-01-08 16:02:06 -08:00
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nir_ssa_def *p = nir_fmul(b, col[0], nir_swizzle(b, col[1], swiz, 2, true));
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return nir_fsub(b, nir_channel(b, p, 0), nir_channel(b, p, 1));
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}
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static nir_ssa_def *
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build_mat3_det(nir_builder *b, nir_ssa_def *col[3])
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{
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2018-07-13 03:33:22 +02:00
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unsigned yzx[3] = {1, 2, 0 };
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unsigned zxy[3] = {2, 0, 1 };
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2016-01-08 16:02:06 -08:00
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nir_ssa_def *prod0 =
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nir_fmul(b, col[0],
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nir_fmul(b, nir_swizzle(b, col[1], yzx, 3, true),
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nir_swizzle(b, col[2], zxy, 3, true)));
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nir_ssa_def *prod1 =
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nir_fmul(b, col[0],
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nir_fmul(b, nir_swizzle(b, col[1], zxy, 3, true),
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nir_swizzle(b, col[2], yzx, 3, true)));
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nir_ssa_def *diff = nir_fsub(b, prod0, prod1);
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return nir_fadd(b, nir_channel(b, diff, 0),
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nir_fadd(b, nir_channel(b, diff, 1),
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nir_channel(b, diff, 2)));
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}
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static nir_ssa_def *
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build_mat4_det(nir_builder *b, nir_ssa_def **col)
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{
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nir_ssa_def *subdet[4];
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for (unsigned i = 0; i < 4; i++) {
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unsigned swiz[3];
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2016-02-12 10:40:24 -08:00
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for (unsigned j = 0; j < 3; j++)
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swiz[j] = j + (j >= i);
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2016-01-08 16:02:06 -08:00
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nir_ssa_def *subcol[3];
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subcol[0] = nir_swizzle(b, col[1], swiz, 3, true);
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subcol[1] = nir_swizzle(b, col[2], swiz, 3, true);
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subcol[2] = nir_swizzle(b, col[3], swiz, 3, true);
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subdet[i] = build_mat3_det(b, subcol);
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}
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nir_ssa_def *prod = nir_fmul(b, col[0], nir_vec(b, subdet, 4));
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return nir_fadd(b, nir_fsub(b, nir_channel(b, prod, 0),
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nir_channel(b, prod, 1)),
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nir_fsub(b, nir_channel(b, prod, 2),
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nir_channel(b, prod, 3)));
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}
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static nir_ssa_def *
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build_mat_det(struct vtn_builder *b, struct vtn_ssa_value *src)
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{
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unsigned size = glsl_get_vector_elements(src->type);
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nir_ssa_def *cols[4];
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for (unsigned i = 0; i < size; i++)
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cols[i] = src->elems[i]->def;
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switch(size) {
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case 2: return build_mat2_det(&b->nb, cols);
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case 3: return build_mat3_det(&b->nb, cols);
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case 4: return build_mat4_det(&b->nb, cols);
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default:
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2017-09-05 15:46:58 -07:00
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vtn_fail("Invalid matrix size");
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2016-01-08 16:02:06 -08:00
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}
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}
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/* Computes the determinate of the submatrix given by taking src and
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* removing the specified row and column.
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*/
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static nir_ssa_def *
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build_mat_subdet(struct nir_builder *b, struct vtn_ssa_value *src,
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unsigned size, unsigned row, unsigned col)
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{
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assert(row < size && col < size);
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if (size == 2) {
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return nir_channel(b, src->elems[1 - col]->def, 1 - row);
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} else {
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/* Swizzle to get all but the specified row */
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unsigned swiz[3];
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2016-02-12 10:40:24 -08:00
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for (unsigned j = 0; j < 3; j++)
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swiz[j] = j + (j >= row);
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2016-01-08 16:02:06 -08:00
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/* Grab all but the specified column */
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nir_ssa_def *subcol[3];
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for (unsigned j = 0; j < size; j++) {
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if (j != col) {
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subcol[j - (j > col)] = nir_swizzle(b, src->elems[j]->def,
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swiz, size - 1, true);
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}
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}
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if (size == 3) {
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return build_mat2_det(b, subcol);
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} else {
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assert(size == 4);
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return build_mat3_det(b, subcol);
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}
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}
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}
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static struct vtn_ssa_value *
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matrix_inverse(struct vtn_builder *b, struct vtn_ssa_value *src)
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{
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nir_ssa_def *adj_col[4];
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unsigned size = glsl_get_vector_elements(src->type);
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/* Build up an adjugate matrix */
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for (unsigned c = 0; c < size; c++) {
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nir_ssa_def *elem[4];
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for (unsigned r = 0; r < size; r++) {
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elem[r] = build_mat_subdet(&b->nb, src, size, c, r);
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if ((r + c) % 2)
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elem[r] = nir_fneg(&b->nb, elem[r]);
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}
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adj_col[c] = nir_vec(&b->nb, elem, size);
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}
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nir_ssa_def *det_inv = nir_frcp(&b->nb, build_mat_det(b, src));
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struct vtn_ssa_value *val = vtn_create_ssa_value(b, src->type);
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for (unsigned i = 0; i < size; i++)
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val->elems[i]->def = nir_fmul(&b->nb, adj_col[i], det_inv);
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return val;
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}
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2015-12-29 15:15:05 -08:00
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/**
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* Return e^x.
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*/
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static nir_ssa_def *
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build_exp(nir_builder *b, nir_ssa_def *x)
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{
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2018-04-18 10:09:33 +02:00
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return nir_fexp2(b, nir_fmul_imm(b, x, M_LOG2E));
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2015-12-29 15:15:05 -08:00
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}
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/**
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* Return ln(x) - the natural logarithm of x.
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*/
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static nir_ssa_def *
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build_log(nir_builder *b, nir_ssa_def *x)
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{
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2018-04-18 10:09:33 +02:00
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return nir_fmul_imm(b, nir_flog2(b, x), 1.0 / M_LOG2E);
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2015-12-29 15:15:05 -08:00
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}
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2016-01-28 18:59:00 -08:00
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/**
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* Approximate asin(x) by the formula:
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* asin~(x) = sign(x) * (pi/2 - sqrt(1 - |x|) * (pi/2 + |x|(pi/4 - 1 + |x|(p0 + |x|p1))))
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*
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* which is correct to first order at x=0 and x=±1 regardless of the p
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* coefficients but can be made second-order correct at both ends by selecting
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* the fit coefficients appropriately. Different p coefficients can be used
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* in the asin and acos implementation to minimize some relative error metric
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* in each case.
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*/
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2016-01-19 12:15:36 -08:00
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static nir_ssa_def *
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2016-01-28 18:59:00 -08:00
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build_asin(nir_builder *b, nir_ssa_def *x, float p0, float p1)
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2016-01-19 12:15:36 -08:00
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{
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2018-05-31 10:34:03 +02:00
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if (x->bit_size == 16) {
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/* The polynomial approximation isn't precise enough to meet half-float
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* precision requirements. Alternatively, we could implement this using
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* the formula:
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*
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* asin(x) = atan2(x, sqrt(1 - x*x))
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*
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* But that is very expensive, so instead we just do the polynomial
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* approximation in 32-bit math and then we convert the result back to
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* 16-bit.
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*/
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return nir_f2f16(b, build_asin(b, nir_f2f32(b, x), p0, p1));
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}
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2018-04-18 08:47:53 +02:00
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nir_ssa_def *one = nir_imm_floatN_t(b, 1.0f, x->bit_size);
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2016-01-19 12:15:36 -08:00
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nir_ssa_def *abs_x = nir_fabs(b, x);
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2018-04-18 08:47:53 +02:00
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nir_ssa_def *p0_plus_xp1 = nir_fadd_imm(b, nir_fmul_imm(b, abs_x, p1), p0);
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nir_ssa_def *expr_tail =
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nir_fadd_imm(b, nir_fmul(b, abs_x,
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nir_fadd_imm(b, nir_fmul(b, abs_x,
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p0_plus_xp1),
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M_PI_4f - 1.0f)),
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M_PI_2f);
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2016-01-19 12:15:36 -08:00
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return nir_fmul(b, nir_fsign(b, x),
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2018-04-18 08:47:53 +02:00
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nir_fsub(b, nir_imm_floatN_t(b, M_PI_2f, x->bit_size),
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nir_fmul(b, nir_fsqrt(b, nir_fsub(b, one, abs_x)),
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expr_tail)));
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2016-01-27 16:58:42 -08:00
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}
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2016-01-19 14:30:02 -08:00
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/**
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* Compute xs[0] + xs[1] + xs[2] + ... using fadd.
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*/
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static nir_ssa_def *
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build_fsum(nir_builder *b, nir_ssa_def **xs, int terms)
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{
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nir_ssa_def *accum = xs[0];
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for (int i = 1; i < terms; i++)
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accum = nir_fadd(b, accum, xs[i]);
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return accum;
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}
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static nir_ssa_def *
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build_atan(nir_builder *b, nir_ssa_def *y_over_x)
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{
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2018-04-18 09:36:41 +02:00
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const uint32_t bit_size = y_over_x->bit_size;
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2016-01-19 14:30:02 -08:00
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nir_ssa_def *abs_y_over_x = nir_fabs(b, y_over_x);
|
2018-04-18 09:36:41 +02:00
|
|
|
|
nir_ssa_def *one = nir_imm_floatN_t(b, 1.0f, bit_size);
|
2016-01-19 14:30:02 -08:00
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
|
* range-reduction, first step:
|
|
|
|
|
|
*
|
|
|
|
|
|
* / y_over_x if |y_over_x| <= 1.0;
|
|
|
|
|
|
* x = <
|
|
|
|
|
|
* \ 1.0 / y_over_x otherwise
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *x = nir_fdiv(b, nir_fmin(b, abs_y_over_x, one),
|
|
|
|
|
|
nir_fmax(b, abs_y_over_x, one));
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
|
* approximate atan by evaluating polynomial:
|
|
|
|
|
|
*
|
|
|
|
|
|
* x * 0.9999793128310355 - x^3 * 0.3326756418091246 +
|
|
|
|
|
|
* x^5 * 0.1938924977115610 - x^7 * 0.1173503194786851 +
|
|
|
|
|
|
* x^9 * 0.0536813784310406 - x^11 * 0.0121323213173444
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *x_2 = nir_fmul(b, x, x);
|
|
|
|
|
|
nir_ssa_def *x_3 = nir_fmul(b, x_2, x);
|
|
|
|
|
|
nir_ssa_def *x_5 = nir_fmul(b, x_3, x_2);
|
|
|
|
|
|
nir_ssa_def *x_7 = nir_fmul(b, x_5, x_2);
|
|
|
|
|
|
nir_ssa_def *x_9 = nir_fmul(b, x_7, x_2);
|
|
|
|
|
|
nir_ssa_def *x_11 = nir_fmul(b, x_9, x_2);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *polynomial_terms[] = {
|
2018-04-18 09:36:41 +02:00
|
|
|
|
nir_fmul_imm(b, x, 0.9999793128310355f),
|
|
|
|
|
|
nir_fmul_imm(b, x_3, -0.3326756418091246f),
|
|
|
|
|
|
nir_fmul_imm(b, x_5, 0.1938924977115610f),
|
|
|
|
|
|
nir_fmul_imm(b, x_7, -0.1173503194786851f),
|
|
|
|
|
|
nir_fmul_imm(b, x_9, 0.0536813784310406f),
|
|
|
|
|
|
nir_fmul_imm(b, x_11, -0.0121323213173444f),
|
2016-01-19 14:30:02 -08:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *tmp =
|
|
|
|
|
|
build_fsum(b, polynomial_terms, ARRAY_SIZE(polynomial_terms));
|
|
|
|
|
|
|
|
|
|
|
|
/* range-reduction fixup */
|
|
|
|
|
|
tmp = nir_fadd(b, tmp,
|
2018-04-18 09:36:41 +02:00
|
|
|
|
nir_fmul(b, nir_b2f(b, nir_flt(b, one, abs_y_over_x), bit_size),
|
|
|
|
|
|
nir_fadd_imm(b, nir_fmul_imm(b, tmp, -2.0f), M_PI_2f)));
|
2016-01-19 14:30:02 -08:00
|
|
|
|
|
|
|
|
|
|
/* sign fixup */
|
|
|
|
|
|
return nir_fmul(b, tmp, nir_fsign(b, y_over_x));
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-01-19 15:56:50 -08:00
|
|
|
|
static nir_ssa_def *
|
|
|
|
|
|
build_atan2(nir_builder *b, nir_ssa_def *y, nir_ssa_def *x)
|
|
|
|
|
|
{
|
2018-04-18 10:07:54 +02:00
|
|
|
|
assert(y->bit_size == x->bit_size);
|
|
|
|
|
|
const uint32_t bit_size = x->bit_size;
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *zero = nir_imm_floatN_t(b, 0, bit_size);
|
|
|
|
|
|
nir_ssa_def *one = nir_imm_floatN_t(b, 1, bit_size);
|
2017-01-20 15:24:30 -08:00
|
|
|
|
|
|
|
|
|
|
/* If we're on the left half-plane rotate the coordinates π/2 clock-wise
|
|
|
|
|
|
* for the y=0 discontinuity to end up aligned with the vertical
|
|
|
|
|
|
* discontinuity of atan(s/t) along t=0. This also makes sure that we
|
|
|
|
|
|
* don't attempt to divide by zero along the vertical line, which may give
|
|
|
|
|
|
* unspecified results on non-GLSL 4.1-capable hardware.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *flip = nir_fge(b, zero, x);
|
|
|
|
|
|
nir_ssa_def *s = nir_bcsel(b, flip, nir_fabs(b, x), y);
|
|
|
|
|
|
nir_ssa_def *t = nir_bcsel(b, flip, y, nir_fabs(b, x));
|
|
|
|
|
|
|
|
|
|
|
|
/* If the magnitude of the denominator exceeds some huge value, scale down
|
|
|
|
|
|
* the arguments in order to prevent the reciprocal operation from flushing
|
|
|
|
|
|
* its result to zero, which would cause precision problems, and for s
|
|
|
|
|
|
* infinite would cause us to return a NaN instead of the correct finite
|
|
|
|
|
|
* value.
|
|
|
|
|
|
*
|
|
|
|
|
|
* If fmin and fmax are respectively the smallest and largest positive
|
|
|
|
|
|
* normalized floating point values representable by the implementation,
|
|
|
|
|
|
* the constants below should be in agreement with:
|
|
|
|
|
|
*
|
|
|
|
|
|
* huge <= 1 / fmin
|
|
|
|
|
|
* scale <= 1 / fmin / fmax (for |t| >= huge)
|
|
|
|
|
|
*
|
|
|
|
|
|
* In addition scale should be a negative power of two in order to avoid
|
|
|
|
|
|
* loss of precision. The values chosen below should work for most usual
|
|
|
|
|
|
* floating point representations with at least the dynamic range of ATI's
|
|
|
|
|
|
* 24-bit representation.
|
|
|
|
|
|
*/
|
2018-04-18 10:07:54 +02:00
|
|
|
|
const double huge_val = bit_size >= 32 ? 1e18 : 16384;
|
|
|
|
|
|
nir_ssa_def *huge = nir_imm_floatN_t(b, huge_val, bit_size);
|
2017-01-20 15:24:30 -08:00
|
|
|
|
nir_ssa_def *scale = nir_bcsel(b, nir_fge(b, nir_fabs(b, t), huge),
|
2018-04-18 10:07:54 +02:00
|
|
|
|
nir_imm_floatN_t(b, 0.25, bit_size), one);
|
2017-01-20 15:24:30 -08:00
|
|
|
|
nir_ssa_def *rcp_scaled_t = nir_frcp(b, nir_fmul(b, t, scale));
|
|
|
|
|
|
nir_ssa_def *s_over_t = nir_fmul(b, nir_fmul(b, s, scale), rcp_scaled_t);
|
|
|
|
|
|
|
2017-01-23 23:36:46 -08:00
|
|
|
|
/* For |x| = |y| assume tan = 1 even if infinite (i.e. pretend momentarily
|
|
|
|
|
|
* that ∞/∞ = 1) in order to comply with the rather artificial rules
|
|
|
|
|
|
* inherited from IEEE 754-2008, namely:
|
|
|
|
|
|
*
|
|
|
|
|
|
* "atan2(±∞, −∞) is ±3π/4
|
|
|
|
|
|
* atan2(±∞, +∞) is ±π/4"
|
|
|
|
|
|
*
|
|
|
|
|
|
* Note that this is inconsistent with the rules for the neighborhood of
|
|
|
|
|
|
* zero that are based on iterated limits:
|
|
|
|
|
|
*
|
|
|
|
|
|
* "atan2(±0, −0) is ±π
|
|
|
|
|
|
* atan2(±0, +0) is ±0"
|
|
|
|
|
|
*
|
|
|
|
|
|
* but GLSL specifically allows implementations to deviate from IEEE rules
|
|
|
|
|
|
* at (0,0), so we take that license (i.e. pretend that 0/0 = 1 here as
|
|
|
|
|
|
* well).
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *tan = nir_bcsel(b, nir_feq(b, nir_fabs(b, x), nir_fabs(b, y)),
|
|
|
|
|
|
one, nir_fabs(b, s_over_t));
|
|
|
|
|
|
|
2017-01-20 15:24:30 -08:00
|
|
|
|
/* Calculate the arctangent and fix up the result if we had flipped the
|
|
|
|
|
|
* coordinate system.
|
|
|
|
|
|
*/
|
2018-04-18 10:07:54 +02:00
|
|
|
|
nir_ssa_def *arc =
|
|
|
|
|
|
nir_fadd(b, nir_fmul_imm(b, nir_b2f(b, flip, bit_size), M_PI_2f),
|
|
|
|
|
|
build_atan(b, tan));
|
2017-01-20 15:24:30 -08:00
|
|
|
|
|
|
|
|
|
|
/* Rather convoluted calculation of the sign of the result. When x < 0 we
|
|
|
|
|
|
* cannot use fsign because we need to be able to distinguish between
|
|
|
|
|
|
* negative and positive zero. We don't use bitwise arithmetic tricks for
|
|
|
|
|
|
* consistency with the GLSL front-end. When x >= 0 rcp_scaled_t will
|
|
|
|
|
|
* always be non-negative so this won't be able to distinguish between
|
|
|
|
|
|
* negative and positive zero, but we don't care because atan2 is
|
|
|
|
|
|
* continuous along the whole positive y = 0 half-line, so it won't affect
|
|
|
|
|
|
* the result significantly.
|
|
|
|
|
|
*/
|
|
|
|
|
|
return nir_bcsel(b, nir_flt(b, nir_fmin(b, y, rcp_scaled_t), zero),
|
|
|
|
|
|
nir_fneg(b, arc), arc);
|
2016-01-19 15:56:50 -08:00
|
|
|
|
}
|
|
|
|
|
|
|
2018-05-15 10:25:10 +02:00
|
|
|
|
static nir_ssa_def *
|
|
|
|
|
|
build_frexp16(nir_builder *b, nir_ssa_def *x, nir_ssa_def **exponent)
|
|
|
|
|
|
{
|
|
|
|
|
|
assert(x->bit_size == 16);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *abs_x = nir_fabs(b, x);
|
|
|
|
|
|
nir_ssa_def *zero = nir_imm_floatN_t(b, 0, 16);
|
|
|
|
|
|
|
|
|
|
|
|
/* Half-precision floating-point values are stored as
|
|
|
|
|
|
* 1 sign bit;
|
|
|
|
|
|
* 5 exponent bits;
|
|
|
|
|
|
* 10 mantissa bits.
|
|
|
|
|
|
*
|
|
|
|
|
|
* An exponent shift of 10 will shift the mantissa out, leaving only the
|
|
|
|
|
|
* exponent and sign bit (which itself may be zero, if the absolute value
|
|
|
|
|
|
* was taken before the bitcast and shift).
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *exponent_shift = nir_imm_int(b, 10);
|
|
|
|
|
|
nir_ssa_def *exponent_bias = nir_imm_intN_t(b, -14, 16);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *sign_mantissa_mask = nir_imm_intN_t(b, 0x83ffu, 16);
|
|
|
|
|
|
|
|
|
|
|
|
/* Exponent of floating-point values in the range [0.5, 1.0). */
|
|
|
|
|
|
nir_ssa_def *exponent_value = nir_imm_intN_t(b, 0x3800u, 16);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *is_not_zero = nir_fne(b, abs_x, zero);
|
|
|
|
|
|
|
|
|
|
|
|
/* Significand return must be of the same type as the input, but the
|
|
|
|
|
|
* exponent must be a 32-bit integer.
|
|
|
|
|
|
*/
|
|
|
|
|
|
*exponent =
|
|
|
|
|
|
nir_i2i32(b,
|
|
|
|
|
|
nir_iadd(b, nir_ushr(b, abs_x, exponent_shift),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_bias, zero)));
|
|
|
|
|
|
|
|
|
|
|
|
return nir_ior(b, nir_iand(b, x, sign_mantissa_mask),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_value, zero));
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-01-19 16:46:03 -08:00
|
|
|
|
static nir_ssa_def *
|
2018-03-08 17:07:46 +01:00
|
|
|
|
build_frexp32(nir_builder *b, nir_ssa_def *x, nir_ssa_def **exponent)
|
2016-01-19 16:46:03 -08:00
|
|
|
|
{
|
|
|
|
|
|
nir_ssa_def *abs_x = nir_fabs(b, x);
|
|
|
|
|
|
nir_ssa_def *zero = nir_imm_float(b, 0.0f);
|
|
|
|
|
|
|
|
|
|
|
|
/* Single-precision floating-point values are stored as
|
|
|
|
|
|
* 1 sign bit;
|
|
|
|
|
|
* 8 exponent bits;
|
|
|
|
|
|
* 23 mantissa bits.
|
|
|
|
|
|
*
|
|
|
|
|
|
* An exponent shift of 23 will shift the mantissa out, leaving only the
|
|
|
|
|
|
* exponent and sign bit (which itself may be zero, if the absolute value
|
|
|
|
|
|
* was taken before the bitcast and shift.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *exponent_shift = nir_imm_int(b, 23);
|
|
|
|
|
|
nir_ssa_def *exponent_bias = nir_imm_int(b, -126);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *sign_mantissa_mask = nir_imm_int(b, 0x807fffffu);
|
|
|
|
|
|
|
|
|
|
|
|
/* Exponent of floating-point values in the range [0.5, 1.0). */
|
|
|
|
|
|
nir_ssa_def *exponent_value = nir_imm_int(b, 0x3f000000u);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *is_not_zero = nir_fne(b, abs_x, zero);
|
|
|
|
|
|
|
|
|
|
|
|
*exponent =
|
|
|
|
|
|
nir_iadd(b, nir_ushr(b, abs_x, exponent_shift),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_bias, zero));
|
|
|
|
|
|
|
|
|
|
|
|
return nir_ior(b, nir_iand(b, x, sign_mantissa_mask),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_value, zero));
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-03-08 17:07:46 +01:00
|
|
|
|
static nir_ssa_def *
|
|
|
|
|
|
build_frexp64(nir_builder *b, nir_ssa_def *x, nir_ssa_def **exponent)
|
|
|
|
|
|
{
|
|
|
|
|
|
nir_ssa_def *abs_x = nir_fabs(b, x);
|
|
|
|
|
|
nir_ssa_def *zero = nir_imm_double(b, 0.0);
|
|
|
|
|
|
nir_ssa_def *zero32 = nir_imm_float(b, 0.0f);
|
|
|
|
|
|
|
|
|
|
|
|
/* Double-precision floating-point values are stored as
|
|
|
|
|
|
* 1 sign bit;
|
|
|
|
|
|
* 11 exponent bits;
|
|
|
|
|
|
* 52 mantissa bits.
|
|
|
|
|
|
*
|
|
|
|
|
|
* We only need to deal with the exponent so first we extract the upper 32
|
|
|
|
|
|
* bits using nir_unpack_64_2x32_split_y.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *upper_x = nir_unpack_64_2x32_split_y(b, x);
|
|
|
|
|
|
nir_ssa_def *abs_upper_x = nir_unpack_64_2x32_split_y(b, abs_x);
|
|
|
|
|
|
|
|
|
|
|
|
/* An exponent shift of 20 will shift the remaining mantissa bits out,
|
|
|
|
|
|
* leaving only the exponent and sign bit (which itself may be zero, if the
|
|
|
|
|
|
* absolute value was taken before the bitcast and shift.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_def *exponent_shift = nir_imm_int(b, 20);
|
|
|
|
|
|
nir_ssa_def *exponent_bias = nir_imm_int(b, -1022);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *sign_mantissa_mask = nir_imm_int(b, 0x800fffffu);
|
|
|
|
|
|
|
|
|
|
|
|
/* Exponent of floating-point values in the range [0.5, 1.0). */
|
|
|
|
|
|
nir_ssa_def *exponent_value = nir_imm_int(b, 0x3fe00000u);
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *is_not_zero = nir_fne(b, abs_x, zero);
|
|
|
|
|
|
|
|
|
|
|
|
*exponent =
|
|
|
|
|
|
nir_iadd(b, nir_ushr(b, abs_upper_x, exponent_shift),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_bias, zero32));
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *new_upper =
|
|
|
|
|
|
nir_ior(b, nir_iand(b, upper_x, sign_mantissa_mask),
|
|
|
|
|
|
nir_bcsel(b, is_not_zero, exponent_value, zero32));
|
|
|
|
|
|
|
|
|
|
|
|
nir_ssa_def *lower_x = nir_unpack_64_2x32_split_x(b, x);
|
|
|
|
|
|
|
|
|
|
|
|
return nir_pack_64_2x32_split(b, lower_x, new_upper);
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-03-25 15:15:45 -07:00
|
|
|
|
static nir_op
|
2017-09-05 15:46:58 -07:00
|
|
|
|
vtn_nir_alu_op_for_spirv_glsl_opcode(struct vtn_builder *b,
|
|
|
|
|
|
enum GLSLstd450 opcode)
|
2016-03-25 15:15:45 -07:00
|
|
|
|
{
|
|
|
|
|
|
switch (opcode) {
|
|
|
|
|
|
case GLSLstd450Round: return nir_op_fround_even;
|
|
|
|
|
|
case GLSLstd450RoundEven: return nir_op_fround_even;
|
|
|
|
|
|
case GLSLstd450Trunc: return nir_op_ftrunc;
|
|
|
|
|
|
case GLSLstd450FAbs: return nir_op_fabs;
|
|
|
|
|
|
case GLSLstd450SAbs: return nir_op_iabs;
|
|
|
|
|
|
case GLSLstd450FSign: return nir_op_fsign;
|
|
|
|
|
|
case GLSLstd450SSign: return nir_op_isign;
|
|
|
|
|
|
case GLSLstd450Floor: return nir_op_ffloor;
|
|
|
|
|
|
case GLSLstd450Ceil: return nir_op_fceil;
|
|
|
|
|
|
case GLSLstd450Fract: return nir_op_ffract;
|
|
|
|
|
|
case GLSLstd450Sin: return nir_op_fsin;
|
|
|
|
|
|
case GLSLstd450Cos: return nir_op_fcos;
|
|
|
|
|
|
case GLSLstd450Pow: return nir_op_fpow;
|
|
|
|
|
|
case GLSLstd450Exp2: return nir_op_fexp2;
|
|
|
|
|
|
case GLSLstd450Log2: return nir_op_flog2;
|
|
|
|
|
|
case GLSLstd450Sqrt: return nir_op_fsqrt;
|
|
|
|
|
|
case GLSLstd450InverseSqrt: return nir_op_frsq;
|
2017-06-08 11:50:55 +00:00
|
|
|
|
case GLSLstd450NMin: return nir_op_fmin;
|
2016-03-25 15:15:45 -07:00
|
|
|
|
case GLSLstd450FMin: return nir_op_fmin;
|
|
|
|
|
|
case GLSLstd450UMin: return nir_op_umin;
|
|
|
|
|
|
case GLSLstd450SMin: return nir_op_imin;
|
2017-06-08 11:50:55 +00:00
|
|
|
|
case GLSLstd450NMax: return nir_op_fmax;
|
2016-03-25 15:15:45 -07:00
|
|
|
|
case GLSLstd450FMax: return nir_op_fmax;
|
|
|
|
|
|
case GLSLstd450UMax: return nir_op_umax;
|
|
|
|
|
|
case GLSLstd450SMax: return nir_op_imax;
|
|
|
|
|
|
case GLSLstd450FMix: return nir_op_flrp;
|
|
|
|
|
|
case GLSLstd450Fma: return nir_op_ffma;
|
|
|
|
|
|
case GLSLstd450Ldexp: return nir_op_ldexp;
|
|
|
|
|
|
case GLSLstd450FindILsb: return nir_op_find_lsb;
|
|
|
|
|
|
case GLSLstd450FindSMsb: return nir_op_ifind_msb;
|
|
|
|
|
|
case GLSLstd450FindUMsb: return nir_op_ufind_msb;
|
|
|
|
|
|
|
|
|
|
|
|
/* Packing/Unpacking functions */
|
|
|
|
|
|
case GLSLstd450PackSnorm4x8: return nir_op_pack_snorm_4x8;
|
|
|
|
|
|
case GLSLstd450PackUnorm4x8: return nir_op_pack_unorm_4x8;
|
|
|
|
|
|
case GLSLstd450PackSnorm2x16: return nir_op_pack_snorm_2x16;
|
|
|
|
|
|
case GLSLstd450PackUnorm2x16: return nir_op_pack_unorm_2x16;
|
|
|
|
|
|
case GLSLstd450PackHalf2x16: return nir_op_pack_half_2x16;
|
2017-02-14 22:15:16 -08:00
|
|
|
|
case GLSLstd450PackDouble2x32: return nir_op_pack_64_2x32;
|
2016-03-25 15:15:45 -07:00
|
|
|
|
case GLSLstd450UnpackSnorm4x8: return nir_op_unpack_snorm_4x8;
|
|
|
|
|
|
case GLSLstd450UnpackUnorm4x8: return nir_op_unpack_unorm_4x8;
|
|
|
|
|
|
case GLSLstd450UnpackSnorm2x16: return nir_op_unpack_snorm_2x16;
|
|
|
|
|
|
case GLSLstd450UnpackUnorm2x16: return nir_op_unpack_unorm_2x16;
|
|
|
|
|
|
case GLSLstd450UnpackHalf2x16: return nir_op_unpack_half_2x16;
|
2017-02-14 22:15:16 -08:00
|
|
|
|
case GLSLstd450UnpackDouble2x32: return nir_op_unpack_64_2x32;
|
2016-03-25 15:15:45 -07:00
|
|
|
|
|
|
|
|
|
|
default:
|
2017-09-05 15:46:58 -07:00
|
|
|
|
vtn_fail("No NIR equivalent");
|
2016-03-25 15:15:45 -07:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-03-21 20:34:38 +01:00
|
|
|
|
#define NIR_IMM_FP(n, v) (nir_imm_floatN_t(n, v, src[0]->bit_size))
|
2017-06-08 11:03:42 +00:00
|
|
|
|
|
2015-05-04 15:17:56 -07:00
|
|
|
|
static void
|
2015-09-04 18:39:57 -07:00
|
|
|
|
handle_glsl450_alu(struct vtn_builder *b, enum GLSLstd450 entrypoint,
|
2015-05-04 15:17:56 -07:00
|
|
|
|
const uint32_t *w, unsigned count)
|
|
|
|
|
|
{
|
2015-12-28 21:09:19 -08:00
|
|
|
|
struct nir_builder *nb = &b->nb;
|
2016-01-20 11:36:26 -08:00
|
|
|
|
const struct glsl_type *dest_type =
|
|
|
|
|
|
vtn_value(b, w[1], vtn_value_type_type)->type->type;
|
|
|
|
|
|
|
2015-05-04 15:17:56 -07:00
|
|
|
|
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
|
2016-01-20 11:36:26 -08:00
|
|
|
|
val->ssa = vtn_create_ssa_value(b, dest_type);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
|
|
|
|
|
|
/* Collect the various SSA sources */
|
|
|
|
|
|
unsigned num_inputs = count - 5;
|
2016-03-25 15:15:45 -07:00
|
|
|
|
nir_ssa_def *src[3] = { NULL, };
|
2017-06-30 17:59:06 -07:00
|
|
|
|
for (unsigned i = 0; i < num_inputs; i++) {
|
|
|
|
|
|
/* These are handled specially below */
|
|
|
|
|
|
if (vtn_untyped_value(b, w[i + 5])->value_type == vtn_value_type_pointer)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
2015-08-31 12:48:04 -07:00
|
|
|
|
src[i] = vtn_ssa_value(b, w[i + 5])->def;
|
2017-06-30 17:59:06 -07:00
|
|
|
|
}
|
2015-05-04 15:17:56 -07:00
|
|
|
|
|
|
|
|
|
|
switch (entrypoint) {
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Radians:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_radians(nb, src[0]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Degrees:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_degrees(nb, src[0]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Tan:
|
2015-12-28 21:09:19 -08:00
|
|
|
|
val->ssa->def = nir_fdiv(nb, nir_fsin(nb, src[0]),
|
|
|
|
|
|
nir_fcos(nb, src[0]));
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
|
2016-01-06 15:24:38 -08:00
|
|
|
|
case GLSLstd450Modf: {
|
2016-01-27 14:20:47 -08:00
|
|
|
|
nir_ssa_def *sign = nir_fsign(nb, src[0]);
|
|
|
|
|
|
nir_ssa_def *abs = nir_fabs(nb, src[0]);
|
|
|
|
|
|
val->ssa->def = nir_fmul(nb, sign, nir_ffract(nb, abs));
|
2018-03-16 13:35:59 -07:00
|
|
|
|
nir_store_deref(nb, vtn_nir_deref(b, w[6]),
|
|
|
|
|
|
nir_fmul(nb, sign, nir_ffloor(nb, abs)), 0xf);
|
2016-01-06 15:24:38 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-01-21 14:56:34 -08:00
|
|
|
|
case GLSLstd450ModfStruct: {
|
2016-01-27 14:20:47 -08:00
|
|
|
|
nir_ssa_def *sign = nir_fsign(nb, src[0]);
|
|
|
|
|
|
nir_ssa_def *abs = nir_fabs(nb, src[0]);
|
2017-08-16 17:38:13 -07:00
|
|
|
|
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
2016-01-27 14:20:47 -08:00
|
|
|
|
val->ssa->elems[0]->def = nir_fmul(nb, sign, nir_ffract(nb, abs));
|
|
|
|
|
|
val->ssa->elems[1]->def = nir_fmul(nb, sign, nir_ffloor(nb, abs));
|
2016-01-21 14:56:34 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Step:
|
2015-12-28 21:09:19 -08:00
|
|
|
|
val->ssa->def = nir_sge(nb, src[1], src[0]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Length:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_fast_length(nb, src[0]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Distance:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_fast_distance(nb, src[0], src[1]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Normalize:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_fast_normalize(nb, src[0]);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Exp:
|
2015-12-28 21:04:30 -08:00
|
|
|
|
val->ssa->def = build_exp(nb, src[0]);
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Log:
|
2015-12-28 21:21:51 -08:00
|
|
|
|
val->ssa->def = build_log(nb, src[0]);
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450FClamp:
|
2017-06-08 11:50:55 +00:00
|
|
|
|
case GLSLstd450NClamp:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_fclamp(nb, src[0], src[1], src[2]);
|
2015-12-28 20:40:10 -08:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450UClamp:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_uclamp(nb, src[0], src[1], src[2]);
|
2015-12-28 20:40:10 -08:00
|
|
|
|
return;
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450SClamp:
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_iclamp(nb, src[0], src[1], src[2]);
|
2015-12-28 20:40:10 -08:00
|
|
|
|
return;
|
|
|
|
|
|
|
2015-12-28 23:39:14 -08:00
|
|
|
|
case GLSLstd450Cross: {
|
2018-07-12 15:02:27 +02:00
|
|
|
|
val->ssa->def = nir_cross3(nb, src[0], src[1]);
|
2015-12-28 23:39:14 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-12-28 23:52:10 -08:00
|
|
|
|
case GLSLstd450SmoothStep: {
|
2018-04-25 18:19:23 +02:00
|
|
|
|
val->ssa->def = nir_smoothstep(nb, src[0], src[1], src[2]);
|
2015-12-28 23:52:10 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-12-28 23:59:32 -08:00
|
|
|
|
case GLSLstd450FaceForward:
|
|
|
|
|
|
val->ssa->def =
|
|
|
|
|
|
nir_bcsel(nb, nir_flt(nb, nir_fdot(nb, src[2], src[1]),
|
2018-03-21 20:34:40 +01:00
|
|
|
|
NIR_IMM_FP(nb, 0.0)),
|
2015-12-28 23:59:32 -08:00
|
|
|
|
src[0], nir_fneg(nb, src[0]));
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2015-12-29 00:10:39 -08:00
|
|
|
|
case GLSLstd450Reflect:
|
|
|
|
|
|
/* I - 2 * dot(N, I) * N */
|
|
|
|
|
|
val->ssa->def =
|
2018-03-21 20:34:40 +01:00
|
|
|
|
nir_fsub(nb, src[0], nir_fmul(nb, NIR_IMM_FP(nb, 2.0),
|
2015-12-29 00:10:39 -08:00
|
|
|
|
nir_fmul(nb, nir_fdot(nb, src[0], src[1]),
|
|
|
|
|
|
src[1])));
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2015-12-29 00:28:42 -08:00
|
|
|
|
case GLSLstd450Refract: {
|
|
|
|
|
|
nir_ssa_def *I = src[0];
|
|
|
|
|
|
nir_ssa_def *N = src[1];
|
|
|
|
|
|
nir_ssa_def *eta = src[2];
|
|
|
|
|
|
nir_ssa_def *n_dot_i = nir_fdot(nb, N, I);
|
2018-03-21 20:34:40 +01:00
|
|
|
|
nir_ssa_def *one = NIR_IMM_FP(nb, 1.0);
|
|
|
|
|
|
nir_ssa_def *zero = NIR_IMM_FP(nb, 0.0);
|
|
|
|
|
|
/* According to the SPIR-V and GLSL specs, eta is always a float
|
|
|
|
|
|
* regardless of the type of the other operands. However in practice it
|
|
|
|
|
|
* seems that if you try to pass it a float then glslang will just
|
|
|
|
|
|
* promote it to a double and generate invalid SPIR-V. In order to
|
|
|
|
|
|
* support a hypothetical fixed version of glslang we’ll promote eta to
|
|
|
|
|
|
* double if the other operands are double also.
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (I->bit_size != eta->bit_size) {
|
|
|
|
|
|
nir_op conversion_op =
|
|
|
|
|
|
nir_type_conversion_op(nir_type_float | eta->bit_size,
|
|
|
|
|
|
nir_type_float | I->bit_size,
|
|
|
|
|
|
nir_rounding_mode_undef);
|
|
|
|
|
|
eta = nir_build_alu(nb, conversion_op, eta, NULL, NULL, NULL);
|
|
|
|
|
|
}
|
2015-12-29 00:28:42 -08:00
|
|
|
|
/* k = 1.0 - eta * eta * (1.0 - dot(N, I) * dot(N, I)) */
|
|
|
|
|
|
nir_ssa_def *k =
|
|
|
|
|
|
nir_fsub(nb, one, nir_fmul(nb, eta, nir_fmul(nb, eta,
|
|
|
|
|
|
nir_fsub(nb, one, nir_fmul(nb, n_dot_i, n_dot_i)))));
|
|
|
|
|
|
nir_ssa_def *result =
|
|
|
|
|
|
nir_fsub(nb, nir_fmul(nb, eta, I),
|
|
|
|
|
|
nir_fmul(nb, nir_fadd(nb, nir_fmul(nb, eta, n_dot_i),
|
|
|
|
|
|
nir_fsqrt(nb, k)), N));
|
|
|
|
|
|
/* XXX: bcsel, or if statement? */
|
|
|
|
|
|
val->ssa->def = nir_bcsel(nb, nir_flt(nb, k, zero), zero, result);
|
|
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-12-29 00:18:54 -08:00
|
|
|
|
case GLSLstd450Sinh:
|
|
|
|
|
|
/* 0.5 * (e^x - e^(-x)) */
|
|
|
|
|
|
val->ssa->def =
|
2018-04-18 10:14:11 +02:00
|
|
|
|
nir_fmul_imm(nb, nir_fsub(nb, build_exp(nb, src[0]),
|
|
|
|
|
|
build_exp(nb, nir_fneg(nb, src[0]))),
|
|
|
|
|
|
0.5f);
|
2015-12-29 00:18:54 -08:00
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
|
|
case GLSLstd450Cosh:
|
|
|
|
|
|
/* 0.5 * (e^x + e^(-x)) */
|
|
|
|
|
|
val->ssa->def =
|
2018-04-18 10:14:11 +02:00
|
|
|
|
nir_fmul_imm(nb, nir_fadd(nb, build_exp(nb, src[0]),
|
|
|
|
|
|
build_exp(nb, nir_fneg(nb, src[0]))),
|
|
|
|
|
|
0.5f);
|
2015-12-29 00:18:54 -08:00
|
|
|
|
return;
|
|
|
|
|
|
|
2016-12-09 09:34:50 -08:00
|
|
|
|
case GLSLstd450Tanh: {
|
|
|
|
|
|
/* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x)))
|
|
|
|
|
|
*
|
|
|
|
|
|
* With a little algebra this reduces to (e^2x - 1) / (e^2x + 1)
|
|
|
|
|
|
*
|
|
|
|
|
|
* We clamp x to (-inf, +10] to avoid precision problems. When x > 10,
|
|
|
|
|
|
* e^2x is so much larger than 1.0 that 1.0 gets flushed to zero in the
|
|
|
|
|
|
* computation e^2x +/- 1 so it can be ignored.
|
2018-04-18 10:14:11 +02:00
|
|
|
|
*
|
|
|
|
|
|
* For 16-bit precision we clamp x to (-inf, +4.2] since the maximum
|
|
|
|
|
|
* representable number is only 65,504 and e^(2*6) exceeds that. Also,
|
|
|
|
|
|
* if x > 4.2, tanh(x) will return 1.0 in fp16.
|
2016-12-09 09:34:50 -08:00
|
|
|
|
*/
|
2018-04-18 10:14:11 +02:00
|
|
|
|
const uint32_t bit_size = src[0]->bit_size;
|
|
|
|
|
|
const double clamped_x = bit_size > 16 ? 10.0 : 4.2;
|
|
|
|
|
|
nir_ssa_def *x = nir_fmin(nb, src[0],
|
|
|
|
|
|
nir_imm_floatN_t(nb, clamped_x, bit_size));
|
|
|
|
|
|
nir_ssa_def *exp2x = build_exp(nb, nir_fmul_imm(nb, x, 2.0));
|
|
|
|
|
|
val->ssa->def = nir_fdiv(nb, nir_fadd_imm(nb, exp2x, -1.0),
|
|
|
|
|
|
nir_fadd_imm(nb, exp2x, 1.0));
|
2015-12-29 00:18:54 -08:00
|
|
|
|
return;
|
2016-12-09 09:34:50 -08:00
|
|
|
|
}
|
2015-12-29 00:18:54 -08:00
|
|
|
|
|
2015-12-29 15:13:46 -08:00
|
|
|
|
case GLSLstd450Asinh:
|
|
|
|
|
|
val->ssa->def = nir_fmul(nb, nir_fsign(nb, src[0]),
|
|
|
|
|
|
build_log(nb, nir_fadd(nb, nir_fabs(nb, src[0]),
|
2018-04-18 10:14:11 +02:00
|
|
|
|
nir_fsqrt(nb, nir_fadd_imm(nb, nir_fmul(nb, src[0], src[0]),
|
|
|
|
|
|
1.0f)))));
|
2015-12-29 15:13:46 -08:00
|
|
|
|
return;
|
|
|
|
|
|
case GLSLstd450Acosh:
|
|
|
|
|
|
val->ssa->def = build_log(nb, nir_fadd(nb, src[0],
|
2018-04-18 10:14:11 +02:00
|
|
|
|
nir_fsqrt(nb, nir_fadd_imm(nb, nir_fmul(nb, src[0], src[0]),
|
|
|
|
|
|
-1.0f))));
|
2015-12-29 15:13:46 -08:00
|
|
|
|
return;
|
|
|
|
|
|
case GLSLstd450Atanh: {
|
2018-04-18 10:14:11 +02:00
|
|
|
|
nir_ssa_def *one = nir_imm_floatN_t(nb, 1.0, src[0]->bit_size);
|
|
|
|
|
|
val->ssa->def =
|
|
|
|
|
|
nir_fmul_imm(nb, build_log(nb, nir_fdiv(nb, nir_fadd(nb, src[0], one),
|
|
|
|
|
|
nir_fsub(nb, one, src[0]))),
|
|
|
|
|
|
0.5f);
|
2015-12-29 15:13:46 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Asin:
|
2016-01-28 18:59:00 -08:00
|
|
|
|
val->ssa->def = build_asin(nb, src[0], 0.086566724, -0.03102955);
|
2016-01-19 12:15:36 -08:00
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Acos:
|
2018-04-18 09:15:01 +02:00
|
|
|
|
val->ssa->def =
|
|
|
|
|
|
nir_fsub(nb, nir_imm_floatN_t(nb, M_PI_2f, src[0]->bit_size),
|
|
|
|
|
|
build_asin(nb, src[0], 0.08132463, -0.02363318));
|
2016-01-19 12:15:36 -08:00
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Atan:
|
2016-01-19 14:30:02 -08:00
|
|
|
|
val->ssa->def = build_atan(nb, src[0]);
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450Atan2:
|
2016-01-19 15:56:50 -08:00
|
|
|
|
val->ssa->def = build_atan2(nb, src[0], src[1]);
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2016-01-19 16:46:03 -08:00
|
|
|
|
case GLSLstd450Frexp: {
|
|
|
|
|
|
nir_ssa_def *exponent;
|
2018-03-08 17:07:46 +01:00
|
|
|
|
if (src[0]->bit_size == 64)
|
|
|
|
|
|
val->ssa->def = build_frexp64(nb, src[0], &exponent);
|
2018-05-15 10:25:10 +02:00
|
|
|
|
else if (src[0]->bit_size == 32)
|
2018-03-08 17:07:46 +01:00
|
|
|
|
val->ssa->def = build_frexp32(nb, src[0], &exponent);
|
2018-05-15 10:25:10 +02:00
|
|
|
|
else
|
|
|
|
|
|
val->ssa->def = build_frexp16(nb, src[0], &exponent);
|
2018-03-16 13:35:59 -07:00
|
|
|
|
nir_store_deref(nb, vtn_nir_deref(b, w[6]), exponent, 0xf);
|
2016-01-19 16:46:03 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-01-20 11:36:41 -08:00
|
|
|
|
case GLSLstd450FrexpStruct: {
|
2017-08-16 17:38:13 -07:00
|
|
|
|
vtn_assert(glsl_type_is_struct(val->ssa->type));
|
2018-03-08 17:07:46 +01:00
|
|
|
|
if (src[0]->bit_size == 64)
|
|
|
|
|
|
val->ssa->elems[0]->def = build_frexp64(nb, src[0],
|
|
|
|
|
|
&val->ssa->elems[1]->def);
|
2018-05-15 10:25:10 +02:00
|
|
|
|
else if (src[0]->bit_size == 32)
|
2018-03-08 17:07:46 +01:00
|
|
|
|
val->ssa->elems[0]->def = build_frexp32(nb, src[0],
|
|
|
|
|
|
&val->ssa->elems[1]->def);
|
2018-05-15 10:25:10 +02:00
|
|
|
|
else
|
|
|
|
|
|
val->ssa->elems[0]->def = build_frexp16(nb, src[0],
|
|
|
|
|
|
&val->ssa->elems[1]->def);
|
2016-01-20 11:36:41 -08:00
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-05-04 15:17:56 -07:00
|
|
|
|
default:
|
2016-03-25 15:15:45 -07:00
|
|
|
|
val->ssa->def =
|
2017-09-05 15:46:58 -07:00
|
|
|
|
nir_build_alu(&b->nb,
|
|
|
|
|
|
vtn_nir_alu_op_for_spirv_glsl_opcode(b, entrypoint),
|
2016-03-25 15:15:45 -07:00
|
|
|
|
src[0], src[1], src[2], NULL);
|
|
|
|
|
|
return;
|
2015-05-04 15:17:56 -07:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-09-13 21:10:13 -07:00
|
|
|
|
static void
|
|
|
|
|
|
handle_glsl450_interpolation(struct vtn_builder *b, enum GLSLstd450 opcode,
|
|
|
|
|
|
const uint32_t *w, unsigned count)
|
|
|
|
|
|
{
|
|
|
|
|
|
const struct glsl_type *dest_type =
|
|
|
|
|
|
vtn_value(b, w[1], vtn_value_type_type)->type->type;
|
|
|
|
|
|
|
|
|
|
|
|
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
|
|
|
|
|
|
val->ssa = vtn_create_ssa_value(b, dest_type);
|
|
|
|
|
|
|
|
|
|
|
|
nir_intrinsic_op op;
|
|
|
|
|
|
switch (opcode) {
|
|
|
|
|
|
case GLSLstd450InterpolateAtCentroid:
|
2018-03-16 13:35:59 -07:00
|
|
|
|
op = nir_intrinsic_interp_deref_at_centroid;
|
2016-09-13 21:10:13 -07:00
|
|
|
|
break;
|
|
|
|
|
|
case GLSLstd450InterpolateAtSample:
|
2018-03-16 13:35:59 -07:00
|
|
|
|
op = nir_intrinsic_interp_deref_at_sample;
|
2016-09-13 21:10:13 -07:00
|
|
|
|
break;
|
|
|
|
|
|
case GLSLstd450InterpolateAtOffset:
|
2018-03-16 13:35:59 -07:00
|
|
|
|
op = nir_intrinsic_interp_deref_at_offset;
|
2016-09-13 21:10:13 -07:00
|
|
|
|
break;
|
|
|
|
|
|
default:
|
2017-09-05 15:46:58 -07:00
|
|
|
|
vtn_fail("Invalid opcode");
|
2016-09-13 21:10:13 -07:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(b->nb.shader, op);
|
|
|
|
|
|
|
2018-03-16 13:35:59 -07:00
|
|
|
|
struct vtn_pointer *ptr =
|
|
|
|
|
|
vtn_value(b, w[5], vtn_value_type_pointer)->pointer;
|
2018-05-09 15:14:36 +02:00
|
|
|
|
nir_deref_instr *deref = vtn_pointer_to_deref(b, ptr);
|
|
|
|
|
|
|
|
|
|
|
|
/* If the value we are interpolating has an index into a vector then
|
|
|
|
|
|
* interpolate the vector and index the result of that instead. This is
|
|
|
|
|
|
* necessary because the index will get generated as a series of nir_bcsel
|
|
|
|
|
|
* instructions so it would no longer be an input variable.
|
|
|
|
|
|
*/
|
|
|
|
|
|
const bool vec_array_deref = deref->deref_type == nir_deref_type_array &&
|
|
|
|
|
|
glsl_type_is_vector(nir_deref_instr_parent(deref)->type);
|
|
|
|
|
|
|
|
|
|
|
|
nir_deref_instr *vec_deref = NULL;
|
|
|
|
|
|
if (vec_array_deref) {
|
|
|
|
|
|
vec_deref = deref;
|
|
|
|
|
|
deref = nir_deref_instr_parent(deref);
|
|
|
|
|
|
}
|
|
|
|
|
|
intrin->src[0] = nir_src_for_ssa(&deref->dest.ssa);
|
2016-09-13 21:10:13 -07:00
|
|
|
|
|
|
|
|
|
|
switch (opcode) {
|
|
|
|
|
|
case GLSLstd450InterpolateAtCentroid:
|
|
|
|
|
|
break;
|
|
|
|
|
|
case GLSLstd450InterpolateAtSample:
|
|
|
|
|
|
case GLSLstd450InterpolateAtOffset:
|
2018-03-16 13:35:59 -07:00
|
|
|
|
intrin->src[1] = nir_src_for_ssa(vtn_ssa_value(b, w[6])->def);
|
2016-09-13 21:10:13 -07:00
|
|
|
|
break;
|
|
|
|
|
|
default:
|
2017-09-05 15:46:58 -07:00
|
|
|
|
vtn_fail("Invalid opcode");
|
2016-09-13 21:10:13 -07:00
|
|
|
|
}
|
|
|
|
|
|
|
2018-05-09 15:14:36 +02:00
|
|
|
|
intrin->num_components = glsl_get_vector_elements(deref->type);
|
2016-09-13 21:10:13 -07:00
|
|
|
|
nir_ssa_dest_init(&intrin->instr, &intrin->dest,
|
2018-05-09 15:14:36 +02:00
|
|
|
|
glsl_get_vector_elements(deref->type),
|
|
|
|
|
|
glsl_get_bit_size(deref->type), NULL);
|
2016-09-13 21:10:13 -07:00
|
|
|
|
|
|
|
|
|
|
nir_builder_instr_insert(&b->nb, &intrin->instr);
|
2018-05-09 15:14:36 +02:00
|
|
|
|
|
|
|
|
|
|
if (vec_array_deref) {
|
|
|
|
|
|
assert(vec_deref);
|
2018-12-14 10:54:08 -06:00
|
|
|
|
if (nir_src_is_const(vec_deref->arr.index)) {
|
2018-05-09 15:14:36 +02:00
|
|
|
|
val->ssa->def = vtn_vector_extract(b, &intrin->dest.ssa,
|
2018-12-14 10:54:08 -06:00
|
|
|
|
nir_src_as_uint(vec_deref->arr.index));
|
2018-05-09 15:14:36 +02:00
|
|
|
|
} else {
|
|
|
|
|
|
val->ssa->def = vtn_vector_extract_dynamic(b, &intrin->dest.ssa,
|
|
|
|
|
|
vec_deref->arr.index.ssa);
|
|
|
|
|
|
}
|
|
|
|
|
|
} else {
|
|
|
|
|
|
val->ssa->def = &intrin->dest.ssa;
|
|
|
|
|
|
}
|
2016-09-13 21:10:13 -07:00
|
|
|
|
}
|
|
|
|
|
|
|
2015-05-04 15:17:56 -07:00
|
|
|
|
bool
|
2018-03-30 11:10:11 -06:00
|
|
|
|
vtn_handle_glsl450_instruction(struct vtn_builder *b, SpvOp ext_opcode,
|
2016-01-08 16:02:06 -08:00
|
|
|
|
const uint32_t *w, unsigned count)
|
2015-05-04 15:17:56 -07:00
|
|
|
|
{
|
2015-09-04 18:39:57 -07:00
|
|
|
|
switch ((enum GLSLstd450)ext_opcode) {
|
2016-01-08 16:02:06 -08:00
|
|
|
|
case GLSLstd450Determinant: {
|
|
|
|
|
|
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
|
|
|
|
|
|
val->ssa = rzalloc(b, struct vtn_ssa_value);
|
|
|
|
|
|
val->ssa->type = vtn_value(b, w[1], vtn_value_type_type)->type->type;
|
|
|
|
|
|
val->ssa->def = build_mat_det(b, vtn_ssa_value(b, w[5]));
|
|
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
case GLSLstd450MatrixInverse: {
|
|
|
|
|
|
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
|
|
|
|
|
|
val->ssa = matrix_inverse(b, vtn_ssa_value(b, w[5]));
|
|
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2015-09-04 18:39:57 -07:00
|
|
|
|
case GLSLstd450InterpolateAtCentroid:
|
|
|
|
|
|
case GLSLstd450InterpolateAtSample:
|
|
|
|
|
|
case GLSLstd450InterpolateAtOffset:
|
2016-09-13 21:10:13 -07:00
|
|
|
|
handle_glsl450_interpolation(b, ext_opcode, w, count);
|
|
|
|
|
|
break;
|
2015-05-04 15:17:56 -07:00
|
|
|
|
|
|
|
|
|
|
default:
|
2016-01-08 16:02:06 -08:00
|
|
|
|
handle_glsl450_alu(b, (enum GLSLstd450)ext_opcode, w, count);
|
2015-05-04 15:17:56 -07:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
|
}
|