2018-12-20 15:54:06 -08:00
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/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* @file iris_disk_cache.c
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*
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* Functions for interacting with the on-disk shader cache.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <assert.h>
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#include <string.h>
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#include "compiler/nir/nir.h"
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2019-09-18 14:32:00 -05:00
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#include "util/blob.h"
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2018-12-20 15:54:06 -08:00
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#include "util/build_id.h"
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#include "util/disk_cache.h"
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#include "util/mesa-sha1.h"
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2024-02-07 22:09:14 -08:00
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#include "intel/compiler/brw_compiler.h"
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2025-01-15 11:18:24 -08:00
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#ifdef INTEL_USE_ELK
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2024-02-07 17:49:41 -08:00
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#include "intel/compiler/elk/elk_compiler.h"
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2025-01-15 11:18:24 -08:00
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#endif
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2018-12-20 15:54:06 -08:00
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#include "iris_context.h"
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2018-12-20 15:54:06 -08:00
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static bool debug = false;
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/**
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* Compute a disk cache key for the given uncompiled shader and NOS key.
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*/
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static void
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iris_disk_cache_compute_key(struct disk_cache *cache,
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const struct iris_uncompiled_shader *ish,
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const void *orig_prog_key,
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uint32_t prog_key_size,
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cache_key cache_key)
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{
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/* Create a copy of the program key with program_string_id zeroed out.
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* It's essentially random data which we don't want to include in our
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* hashing and comparisons. We'll set a proper value on a cache hit.
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*/
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union brw_any_prog_key prog_key;
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memcpy(&prog_key, orig_prog_key, prog_key_size);
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2019-02-21 17:20:39 -06:00
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prog_key.base.program_string_id = 0;
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2018-12-20 15:54:06 -08:00
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2019-05-28 15:34:52 -07:00
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uint8_t data[sizeof(prog_key) + sizeof(ish->nir_sha1)];
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uint32_t data_size = prog_key_size + sizeof(ish->nir_sha1);
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2018-12-20 15:54:06 -08:00
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2019-05-28 15:34:52 -07:00
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memcpy(data, ish->nir_sha1, sizeof(ish->nir_sha1));
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memcpy(data + sizeof(ish->nir_sha1), &prog_key, prog_key_size);
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2018-12-20 15:54:06 -08:00
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disk_cache_compute_key(cache, data, data_size, cache_key);
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}
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/**
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* Store the given compiled shader in the disk cache.
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*
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* This should only be called on newly compiled shaders. No checking is
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* done to prevent repeated stores of the same shader.
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*/
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void
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iris_disk_cache_store(struct disk_cache *cache,
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const struct iris_uncompiled_shader *ish,
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const struct iris_compiled_shader *shader,
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const void *prog_key,
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uint32_t prog_key_size)
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{
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#ifdef ENABLE_SHADER_CACHE
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if (!cache)
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return;
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gl_shader_stage stage = ish->nir->info.stage;
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2024-02-07 17:49:41 -08:00
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const struct brw_stage_prog_data *brw = shader->brw_prog_data;
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2025-01-15 11:18:24 -08:00
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#ifdef INTEL_USE_ELK
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2024-02-07 17:49:41 -08:00
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const struct elk_stage_prog_data *elk = shader->elk_prog_data;
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assert((brw == NULL) != (elk == NULL));
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2025-01-15 11:18:24 -08:00
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#else
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assert(brw);
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#endif
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2018-12-20 15:54:06 -08:00
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cache_key cache_key;
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iris_disk_cache_compute_key(cache, ish, prog_key, prog_key_size, cache_key);
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if (debug) {
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char sha1[41];
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_mesa_sha1_format(sha1, cache_key);
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fprintf(stderr, "[mesa disk cache] storing %s\n", sha1);
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}
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struct blob blob;
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blob_init(&blob);
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/* We write the following data to the cache blob:
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*
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* 1. Prog data (must come first because it has the assembly size)
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2023-09-11 15:01:53 -07:00
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* - Zero out pointer values in prog data, so cache entries will be
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* consistent.
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2018-12-20 15:54:06 -08:00
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* 2. Assembly code
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* 3. Number of entries in the system value array
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* 4. System value array
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2020-08-11 10:30:42 -05:00
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* 5. Size (in bytes) of kernel inputs
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2020-08-11 19:43:17 -05:00
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* 6. Shader relocations
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* 7. Legacy param array (only used for compute workgroup ID)
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* 8. Binding table
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2018-12-20 15:54:06 -08:00
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*/
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2024-02-07 17:49:41 -08:00
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if (brw) {
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size_t prog_data_s = brw_prog_data_size(stage);
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union brw_any_prog_data serializable;
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assert(prog_data_s <= sizeof(serializable));
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memcpy(&serializable, shader->brw_prog_data, prog_data_s);
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serializable.base.param = NULL;
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serializable.base.relocs = NULL;
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blob_write_bytes(&blob, &serializable, prog_data_s);
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} else {
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2025-01-15 11:18:24 -08:00
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#ifdef INTEL_USE_ELK
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2024-02-07 17:49:41 -08:00
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size_t prog_data_s = elk_prog_data_size(stage);
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union elk_any_prog_data serializable;
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assert(prog_data_s <= sizeof(serializable));
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memcpy(&serializable, shader->elk_prog_data, prog_data_s);
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serializable.base.param = NULL;
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serializable.base.relocs = NULL;
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blob_write_bytes(&blob, &serializable, prog_data_s);
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2025-01-15 11:18:24 -08:00
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#else
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2025-07-23 09:17:35 +02:00
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UNREACHABLE("no elk support");
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2025-01-15 11:18:24 -08:00
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#endif
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2024-02-07 17:49:41 -08:00
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}
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2023-09-11 15:01:53 -07:00
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2024-02-06 11:05:33 -08:00
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blob_write_bytes(&blob, shader->map, shader->program_size);
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2020-08-11 10:04:28 -05:00
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blob_write_uint32(&blob, shader->num_system_values);
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2018-12-20 15:54:06 -08:00
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blob_write_bytes(&blob, shader->system_values,
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2024-01-30 11:29:26 -08:00
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shader->num_system_values * sizeof(uint32_t));
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2024-02-07 17:49:41 -08:00
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if (brw) {
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blob_write_bytes(&blob, brw->relocs,
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brw->num_relocs * sizeof(struct brw_shader_reloc));
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blob_write_bytes(&blob, brw->param,
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brw->nr_params * sizeof(uint32_t));
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} else {
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2025-01-15 11:18:24 -08:00
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#ifdef INTEL_USE_ELK
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2024-02-07 17:49:41 -08:00
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blob_write_bytes(&blob, elk->relocs,
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elk->num_relocs * sizeof(struct elk_shader_reloc));
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blob_write_bytes(&blob, elk->param,
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elk->nr_params * sizeof(uint32_t));
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2025-01-15 11:18:24 -08:00
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#else
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2025-07-23 09:17:35 +02:00
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UNREACHABLE("no elk support");
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2025-01-15 11:18:24 -08:00
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#endif
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2024-02-07 17:49:41 -08:00
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}
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2019-05-22 22:17:27 -07:00
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blob_write_bytes(&blob, &shader->bt, sizeof(shader->bt));
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2018-12-20 15:54:06 -08:00
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disk_cache_put(cache, cache_key, blob.data, blob.size, NULL);
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blob_finish(&blob);
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#endif
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}
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2020-08-11 16:12:55 -05:00
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static const enum iris_program_cache_id cache_id_for_stage[] = {
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[MESA_SHADER_VERTEX] = IRIS_CACHE_VS,
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[MESA_SHADER_TESS_CTRL] = IRIS_CACHE_TCS,
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[MESA_SHADER_TESS_EVAL] = IRIS_CACHE_TES,
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[MESA_SHADER_GEOMETRY] = IRIS_CACHE_GS,
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[MESA_SHADER_FRAGMENT] = IRIS_CACHE_FS,
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[MESA_SHADER_COMPUTE] = IRIS_CACHE_CS,
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};
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2018-12-20 15:54:06 -08:00
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/**
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* Search for a compiled shader in the disk cache. If found, upload it
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* to the in-memory program cache so we can use it.
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*/
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2021-06-02 14:30:08 -07:00
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bool
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2021-02-08 18:38:22 -08:00
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iris_disk_cache_retrieve(struct iris_screen *screen,
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struct u_upload_mgr *uploader,
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iris: Store a list of shader variants in the shader itself
We've traditionally stored shader variants in a per-context hash table,
based on a key with many per-stage fields. On older hardware supported
by i965, there were potentially quite a few variants, as many features
had to be emulated in shaders, including things like texture swizzling.
However, on the modern hardware targeted by iris, our NOS dependencies
are much smaller. We almost always guess the correct state when doing
the initial precompile, and so we have maybe 1-3 variants. iris NOS
keys are also dramatically smaller (4 to 24 bytes) than i965's.
Unlike the classic world, Gallium also provides a single kind of object
for API shaders---pipe_shader_state aka iris_uncompiled_shader. We can
simply store a list of shader variants there. This makes it possible
to access shader variants across contexts, rather than compiling them
separately for each context, which better matches how the APIs work.
To look up variants, we simply walk the list and memcmp the keys.
Since the list is almost always singular (and rarely ever long),
and the keys are tiny, this should be quite low overhead.
We continue storing internally generated shaders for BLORP and
passthrough TCS in the per-context hash table, as they don't have
an associated pipe_shader_state / iris_uncompiled_shader object.
(There can also be many BLORP shaders, and the blit keys are large,
so having a hash table rather than a list makes sense there.)
Because iris_uncompiled_shaders are shared across multiple contexts,
we do require locking when accessing this list. Fortunately, this
is a per-shader lock, rather than a global one. Additionally, since
we only append variants to the list, and generate the first one at
precompile time (while only one context has the uncompiled shader),
we can assume that it is safe to access that first entry without
locking the list. This means that we only have to lock when we
have multiple variants, which is relatively uncommon.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7668>
2020-11-16 13:17:08 -08:00
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struct iris_uncompiled_shader *ish,
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2021-06-02 14:30:08 -07:00
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struct iris_compiled_shader *shader,
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2018-12-20 15:54:06 -08:00
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const void *prog_key,
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uint32_t key_size)
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{
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#ifdef ENABLE_SHADER_CACHE
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struct disk_cache *cache = screen->disk_cache;
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gl_shader_stage stage = ish->nir->info.stage;
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if (!cache)
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2021-06-02 14:30:08 -07:00
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return false;
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2018-12-20 15:54:06 -08:00
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cache_key cache_key;
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iris_disk_cache_compute_key(cache, ish, prog_key, key_size, cache_key);
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if (debug) {
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char sha1[41];
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_mesa_sha1_format(sha1, cache_key);
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fprintf(stderr, "[mesa disk cache] retrieving %s: ", sha1);
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}
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size_t size;
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void *buffer = disk_cache_get(screen->disk_cache, cache_key, &size);
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if (debug)
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fprintf(stderr, "%s\n", buffer ? "found" : "missing");
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if (!buffer)
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2021-06-02 14:30:08 -07:00
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return false;
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2018-12-20 15:54:06 -08:00
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2025-01-15 11:18:24 -08:00
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const uint32_t prog_data_size =
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#ifdef INTEL_USE_ELK
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screen->elk ? elk_prog_data_size(stage) :
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#endif
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brw_prog_data_size(stage);
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2018-12-20 15:54:06 -08:00
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2024-02-07 17:49:41 -08:00
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void *prog_data = ralloc_size(NULL, prog_data_size);
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2018-12-20 15:54:06 -08:00
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const void *assembly;
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uint32_t num_system_values;
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uint32_t *system_values = NULL;
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uint32_t *so_decls = NULL;
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2024-02-07 17:49:41 -08:00
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struct brw_stage_prog_data *brw = screen->brw ? prog_data : NULL;
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2025-01-15 11:18:24 -08:00
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#ifdef INTEL_USE_ELK
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2024-02-07 17:49:41 -08:00
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struct elk_stage_prog_data *elk = screen->elk ? prog_data : NULL;
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assert((brw == NULL) != (elk == NULL));
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2025-01-15 11:18:24 -08:00
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#else
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assert(brw);
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#endif
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2024-02-07 17:49:41 -08:00
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2018-12-20 15:54:06 -08:00
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struct blob_reader blob;
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blob_reader_init(&blob, buffer, size);
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blob_copy_bytes(&blob, prog_data, prog_data_size);
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2025-01-15 11:18:24 -08:00
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const unsigned program_size =
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#ifdef INTEL_USE_ELK
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elk ? elk->program_size :
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#endif
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brw->program_size;
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assembly = blob_read_bytes(&blob, program_size);
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2018-12-20 15:54:06 -08:00
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num_system_values = blob_read_uint32(&blob);
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if (num_system_values) {
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system_values =
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2024-01-30 11:29:26 -08:00
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ralloc_array(NULL, uint32_t, num_system_values);
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2018-12-20 15:54:06 -08:00
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blob_copy_bytes(&blob, system_values,
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2024-01-30 11:29:26 -08:00
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num_system_values * sizeof(uint32_t));
|
2018-12-20 15:54:06 -08:00
|
|
|
}
|
|
|
|
|
|
2024-02-07 17:49:41 -08:00
|
|
|
if (brw) {
|
|
|
|
|
brw->relocs = NULL;
|
|
|
|
|
if (brw->num_relocs) {
|
|
|
|
|
struct brw_shader_reloc *relocs =
|
|
|
|
|
ralloc_array(NULL, struct brw_shader_reloc, brw->num_relocs);
|
|
|
|
|
blob_copy_bytes(&blob, relocs,
|
|
|
|
|
brw->num_relocs * sizeof(struct brw_shader_reloc));
|
|
|
|
|
brw->relocs = relocs;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
brw->param = NULL;
|
|
|
|
|
if (brw->nr_params) {
|
|
|
|
|
brw->param = ralloc_array(NULL, uint32_t, brw->nr_params);
|
|
|
|
|
blob_copy_bytes(&blob, brw->param, brw->nr_params * sizeof(uint32_t));
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2025-01-15 11:18:24 -08:00
|
|
|
#ifdef INTEL_USE_ELK
|
2024-02-07 17:49:41 -08:00
|
|
|
elk->relocs = NULL;
|
|
|
|
|
if (elk->num_relocs) {
|
|
|
|
|
struct elk_shader_reloc *relocs =
|
|
|
|
|
ralloc_array(NULL, struct elk_shader_reloc, elk->num_relocs);
|
|
|
|
|
blob_copy_bytes(&blob, relocs,
|
|
|
|
|
elk->num_relocs * sizeof(struct elk_shader_reloc));
|
|
|
|
|
elk->relocs = relocs;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
elk->param = NULL;
|
|
|
|
|
if (elk->nr_params) {
|
|
|
|
|
elk->param = ralloc_array(NULL, uint32_t, elk->nr_params);
|
|
|
|
|
blob_copy_bytes(&blob, elk->param,
|
|
|
|
|
elk->nr_params * sizeof(uint32_t));
|
|
|
|
|
}
|
2025-01-15 11:18:24 -08:00
|
|
|
#else
|
2025-07-23 09:17:35 +02:00
|
|
|
UNREACHABLE("no elk support");
|
2025-01-15 11:18:24 -08:00
|
|
|
#endif
|
2018-12-20 15:54:06 -08:00
|
|
|
}
|
|
|
|
|
|
2019-05-22 22:17:27 -07:00
|
|
|
struct iris_binding_table bt;
|
|
|
|
|
blob_copy_bytes(&blob, &bt, sizeof(bt));
|
|
|
|
|
|
2018-12-20 15:54:06 -08:00
|
|
|
if (stage == MESA_SHADER_VERTEX ||
|
|
|
|
|
stage == MESA_SHADER_TESS_EVAL ||
|
|
|
|
|
stage == MESA_SHADER_GEOMETRY) {
|
2024-02-06 11:05:33 -08:00
|
|
|
struct intel_vue_map *vue_map =
|
2025-01-15 11:18:24 -08:00
|
|
|
#ifdef INTEL_USE_ELK
|
|
|
|
|
screen->elk ? &elk_vue_prog_data(prog_data)->vue_map :
|
|
|
|
|
#endif
|
|
|
|
|
&brw_vue_prog_data(prog_data)->vue_map;
|
2024-02-06 11:05:33 -08:00
|
|
|
so_decls = screen->vtbl.create_so_decl_list(&ish->stream_output, vue_map);
|
2018-12-20 15:54:06 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* System values and uniforms are stored in constant buffer 0, the
|
|
|
|
|
* user-facing UBOs are indexed by one. So if any constant buffer is
|
|
|
|
|
* needed, the constant buffer 0 will be needed, so account for it.
|
|
|
|
|
*/
|
|
|
|
|
unsigned num_cbufs = ish->nir->info.num_ubos;
|
2019-06-14 14:03:28 +02:00
|
|
|
|
|
|
|
|
if (num_cbufs || ish->nir->num_uniforms)
|
|
|
|
|
num_cbufs++;
|
|
|
|
|
|
2025-03-13 17:11:06 +01:00
|
|
|
if (num_system_values)
|
2018-12-20 15:54:06 -08:00
|
|
|
num_cbufs++;
|
|
|
|
|
|
2024-02-07 17:49:41 -08:00
|
|
|
if (brw)
|
|
|
|
|
iris_apply_brw_prog_data(shader, brw);
|
|
|
|
|
else
|
2025-01-15 11:18:24 -08:00
|
|
|
#ifdef INTEL_USE_ELK
|
2024-02-07 17:49:41 -08:00
|
|
|
iris_apply_elk_prog_data(shader, elk);
|
2025-01-15 11:18:24 -08:00
|
|
|
#else
|
2025-07-23 09:17:35 +02:00
|
|
|
UNREACHABLE("no elk support");
|
2025-01-15 11:18:24 -08:00
|
|
|
#endif
|
2024-02-06 11:05:33 -08:00
|
|
|
|
2024-02-07 23:13:31 -08:00
|
|
|
iris_finalize_program(shader, so_decls, system_values,
|
2025-03-13 17:11:06 +01:00
|
|
|
num_system_values, num_cbufs,
|
2021-06-28 11:51:10 -07:00
|
|
|
&bt);
|
|
|
|
|
|
2020-08-11 16:12:55 -05:00
|
|
|
assert(stage < ARRAY_SIZE(cache_id_for_stage));
|
|
|
|
|
enum iris_program_cache_id cache_id = cache_id_for_stage[stage];
|
|
|
|
|
|
2021-06-02 14:30:08 -07:00
|
|
|
/* Upload our newly read shader to the in-memory program cache. */
|
|
|
|
|
iris_upload_shader(screen, ish, shader, NULL, uploader,
|
2021-06-28 11:51:10 -07:00
|
|
|
cache_id, key_size, prog_key, assembly);
|
2019-06-04 22:02:24 -07:00
|
|
|
|
|
|
|
|
free(buffer);
|
|
|
|
|
|
2021-06-02 14:30:08 -07:00
|
|
|
return true;
|
2018-12-20 15:54:06 -08:00
|
|
|
#else
|
2021-06-02 14:30:08 -07:00
|
|
|
return false;
|
2018-12-20 15:54:06 -08:00
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-20 15:54:06 -08:00
|
|
|
/**
|
|
|
|
|
* Initialize the on-disk shader cache.
|
|
|
|
|
*/
|
|
|
|
|
void
|
|
|
|
|
iris_disk_cache_init(struct iris_screen *screen)
|
|
|
|
|
{
|
|
|
|
|
#ifdef ENABLE_SHADER_CACHE
|
2021-10-13 11:21:41 +02:00
|
|
|
if (INTEL_DEBUG(DEBUG_DISK_CACHE_DISABLE_MASK))
|
2018-12-20 15:54:06 -08:00
|
|
|
return;
|
|
|
|
|
|
2022-09-21 22:39:53 -07:00
|
|
|
/* array length = strlen("iris_") + sha + nul char */
|
|
|
|
|
char renderer[5 + 40 + 1] = {0};
|
2024-02-07 17:49:41 -08:00
|
|
|
|
|
|
|
|
if (screen->brw) {
|
|
|
|
|
char device_info_sha[41];
|
|
|
|
|
brw_device_sha1(device_info_sha, screen->devinfo);
|
|
|
|
|
memcpy(renderer, "iris_", 5);
|
|
|
|
|
memcpy(renderer + 5, device_info_sha, 40);
|
|
|
|
|
} else {
|
|
|
|
|
/* For Gfx8, just use PCI ID. */
|
|
|
|
|
ASSERTED int len = snprintf(renderer, sizeof(renderer),
|
|
|
|
|
"iris_%04x", screen->devinfo->pci_device_id);
|
|
|
|
|
assert(len < ARRAY_SIZE(renderer) - 1);
|
|
|
|
|
}
|
2018-12-20 15:54:06 -08:00
|
|
|
|
|
|
|
|
const struct build_id_note *note =
|
|
|
|
|
build_id_find_nhdr_for_addr(iris_disk_cache_init);
|
|
|
|
|
assert(note && build_id_length(note) == 20); /* sha1 */
|
|
|
|
|
|
|
|
|
|
const uint8_t *id_sha1 = build_id_data(note);
|
|
|
|
|
assert(id_sha1);
|
|
|
|
|
|
|
|
|
|
char timestamp[41];
|
|
|
|
|
_mesa_sha1_format(timestamp, id_sha1);
|
|
|
|
|
|
2025-01-15 11:18:24 -08:00
|
|
|
const uint64_t driver_flags =
|
|
|
|
|
#ifdef INTEL_USE_ELK
|
|
|
|
|
screen->elk ? elk_get_compiler_config_value(screen->elk) :
|
|
|
|
|
#endif
|
|
|
|
|
brw_get_compiler_config_value(screen->brw);
|
|
|
|
|
|
2018-12-20 15:54:06 -08:00
|
|
|
screen->disk_cache = disk_cache_create(renderer, timestamp, driver_flags);
|
|
|
|
|
#endif
|
|
|
|
|
}
|