2020-04-06 17:14:12 +01:00
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/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "helpers.h"
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using namespace aco;
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BEGIN_TEST(to_hw_instr.swap_subdword)
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2020-05-26 21:56:18 +01:00
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PhysReg v0_lo{256};
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PhysReg v0_hi{256};
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PhysReg v0_b1{256};
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PhysReg v0_b3{256};
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PhysReg v1_lo{257};
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PhysReg v1_hi{257};
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PhysReg v1_b1{257};
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PhysReg v1_b3{257};
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PhysReg v2_lo{258};
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PhysReg v3_lo{259};
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v0_hi.reg_b += 2;
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v1_hi.reg_b += 2;
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v0_b1.reg_b += 1;
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v1_b1.reg_b += 1;
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v0_b3.reg_b += 3;
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v1_b3.reg_b += 3;
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for (unsigned i = GFX6; i <= GFX7; i++) {
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if (!setup_cs(NULL, (chip_class)i))
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continue;
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//~gfx[67]>> p_unit_test 0
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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bld.pseudo(aco_opcode::p_unit_test, Operand(0u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v1_lo, v2b),
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Operand(v1_lo, v2b), Operand(v0_lo, v2b));
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//~gfx[67]! p_unit_test 1
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[1][16:32] = v_lshlrev_b32 16, %0:v[1][0:16]
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//~gfx[67]! v1: %0:v[1] = v_alignbyte_b32 %0:v[0][0:16], %0:v[1][16:32], 2
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v1: %0:v[0] = v_mov_b32 %0:v[1]
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bld.pseudo(aco_opcode::p_unit_test, Operand(1u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v1),
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Operand(v1_lo, v2b), Operand(v0_lo, v2b));
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//~gfx[67]! p_unit_test 2
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[1][16:32] = v_lshlrev_b32 16, %0:v[1][0:16]
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//~gfx[67]! v1: %0:v[1] = v_alignbyte_b32 %0:v[0][0:16], %0:v[1][16:32], 2
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v1: %0:v[0] = v_mov_b32 %0:v[1]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[2][0:16]
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bld.pseudo(aco_opcode::p_unit_test, Operand(2u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v6b), Operand(v1_lo, v2b),
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Operand(v0_lo, v2b), Operand(v2_lo, v2b));
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//~gfx[67]! p_unit_test 3
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[1][16:32] = v_lshlrev_b32 16, %0:v[1][0:16]
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//~gfx[67]! v1: %0:v[1] = v_alignbyte_b32 %0:v[0][0:16], %0:v[1][16:32], 2
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v1: %0:v[0] = v_mov_b32 %0:v[1]
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2020-10-15 19:47:12 +02:00
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//~gfx[67]! v2b: %0:v[1][16:32] = v_lshlrev_b32 16, %0:v[2][0:16]
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//~gfx[67]! v1: %0:v[1] = v_alignbyte_b32 %0:v[3][0:16], %0:v[1][16:32], 2
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2020-05-26 21:56:18 +01:00
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bld.pseudo(aco_opcode::p_unit_test, Operand(3u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v2),
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Operand(v1_lo, v2b), Operand(v0_lo, v2b),
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Operand(v2_lo, v2b), Operand(v3_lo, v2b));
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//~gfx[67]! p_unit_test 4
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[1][16:32] = v_lshlrev_b32 16, %0:v[1][0:16]
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//~gfx[67]! v1: %0:v[1] = v_alignbyte_b32 %0:v[2][0:16], %0:v[1][16:32], 2
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//~gfx[67]! v2b: %0:v[0][16:32] = v_lshlrev_b32 16, %0:v[0][0:16]
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//~gfx[67]! v1: %0:v[0] = v_alignbyte_b32 %0:v[3][0:16], %0:v[0][16:32], 2
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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bld.pseudo(aco_opcode::p_unit_test, Operand(4u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v2),
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Operand(v1_lo, v2b), Operand(v2_lo, v2b),
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Operand(v0_lo, v2b), Operand(v3_lo, v2b));
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//~gfx[67]! p_unit_test 5
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//~gfx[67]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16]
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//~gfx[67]! v2b: %0:v[0][0:16] = v_lshrrev_b32 16, %0:v[1][16:32]
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bld.pseudo(aco_opcode::p_unit_test, Operand(5u));
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bld.pseudo(aco_opcode::p_split_vector,
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Definition(v1_lo, v2b), Definition(v0_lo, v2b),
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Operand(v0_lo, v1));
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//~gfx[67]! p_unit_test 6
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//~gfx[67]! v2b: %0:v[2][0:16] = v_mov_b32 %0:v[1][0:16]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16]
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//~gfx[67]! v2b: %0:v[0][0:16] = v_lshrrev_b32 16, %0:v[1][16:32]
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bld.pseudo(aco_opcode::p_unit_test, Operand(6u));
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bld.pseudo(aco_opcode::p_split_vector,
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Definition(v1_lo, v2b), Definition(v0_lo, v2b),
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Definition(v2_lo, v2b), Operand(v0_lo, v6b));
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//~gfx[67]! p_unit_test 7
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//~gfx[67]! v2b: %0:v[2][0:16] = v_mov_b32 %0:v[1][0:16]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16]
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//~gfx[67]! v2b: %0:v[0][0:16] = v_lshrrev_b32 16, %0:v[1][16:32]
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//~gfx[67]! v2b: %0:v[3][0:16] = v_lshrrev_b32 16, %0:v[2][16:32]
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bld.pseudo(aco_opcode::p_unit_test, Operand(7u));
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bld.pseudo(aco_opcode::p_split_vector,
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Definition(v1_lo, v2b), Definition(v0_lo, v2b),
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Definition(v2_lo, v2b), Definition(v3_lo, v2b),
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Operand(v0_lo, v2));
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//~gfx[67]! p_unit_test 8
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//~gfx[67]! v2b: %0:v[2][0:16] = v_lshrrev_b32 16, %0:v[0][16:32]
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//~gfx[67]! v2b: %0:v[3][0:16] = v_lshrrev_b32 16, %0:v[1][16:32]
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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bld.pseudo(aco_opcode::p_unit_test, Operand(8u));
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bld.pseudo(aco_opcode::p_split_vector,
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Definition(v1_lo, v2b), Definition(v2_lo, v2b),
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Definition(v0_lo, v2b), Definition(v3_lo, v2b),
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Operand(v0_lo, v2));
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//~gfx[67]! p_unit_test 9
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
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//~gfx[67]! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
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bld.pseudo(aco_opcode::p_unit_test, Operand(9u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v1b), Definition(v1_lo, v1b),
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Operand(v1_lo, v1b), Operand(v0_lo, v1b));
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//~gfx[67]! p_unit_test 10
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v1b: %0:v[1][24:32] = v_lshlrev_b32 24, %0:v[1][0:8]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_alignbyte_b32 %0:v[0][0:8], %0:v[1][24:32], 3
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v2b: %0:v[0][0:16] = v_mov_b32 %0:v[1][0:16]
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bld.pseudo(aco_opcode::p_unit_test, Operand(10u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v2b),
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Operand(v1_lo, v1b), Operand(v0_lo, v1b));
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//~gfx[67]! p_unit_test 11
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v1b: %0:v[1][24:32] = v_lshlrev_b32 24, %0:v[1][0:8]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_alignbyte_b32 %0:v[0][0:8], %0:v[1][24:32], 3
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v2b: %0:v[0][0:16] = v_mov_b32 %0:v[1][0:16]
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[0][16:32] = v_lshlrev_b32 16, %0:v[0][0:16]
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//~gfx[67]! v3b: %0:v[0][0:24] = v_alignbyte_b32 %0:v[2][0:8], %0:v[0][16:32], 2
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2020-05-26 21:56:18 +01:00
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bld.pseudo(aco_opcode::p_unit_test, Operand(11u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v3b), Operand(v1_lo, v1b),
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Operand(v0_lo, v1b), Operand(v2_lo, v1b));
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//~gfx[67]! p_unit_test 12
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v1b: %0:v[1][24:32] = v_lshlrev_b32 24, %0:v[1][0:8]
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//~gfx[67]! v2b: %0:v[1][0:16] = v_alignbyte_b32 %0:v[0][0:8], %0:v[1][24:32], 3
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! v2b: %0:v[0][0:16] = v_mov_b32 %0:v[1][0:16]
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v2b: %0:v[0][16:32] = v_lshlrev_b32 16, %0:v[0][0:16]
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//~gfx[67]! v3b: %0:v[0][0:24] = v_alignbyte_b32 %0:v[2][0:8], %0:v[0][16:32], 2
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//~gfx[67]! v3b: %0:v[0][8:32] = v_lshlrev_b32 8, %0:v[0][0:24]
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//~gfx[67]! v1: %0:v[0] = v_alignbyte_b32 %0:v[3][0:8], %0:v[0][8:32], 1
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2020-05-26 21:56:18 +01:00
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bld.pseudo(aco_opcode::p_unit_test, Operand(12u));
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bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v1),
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Operand(v1_lo, v1b), Operand(v0_lo, v1b),
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Operand(v2_lo, v1b), Operand(v3_lo, v1b));
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//~gfx[67]! p_unit_test 13
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2020-10-16 15:12:28 +02:00
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//~gfx[67]! v1b: %0:v[0][0:8] = v_and_b32 0xff, %0:v[0][0:8]
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//~gfx[67]! v2b: %0:v[0][0:16] = v_mul_u32_u24 0x101, %0:v[0][0:8]
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//~gfx[67]! v2b: %0:v[0][0:16] = v_and_b32 0xffff, %0:v[0][0:16]
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//~gfx[67]! v3b: %0:v[0][0:24] = v_cvt_pk_u16_u32 %0:v[0][0:16], %0:v[0][0:8]
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//~gfx[67]! v3b: %0:v[0][0:24] = v_and_b32 0xffffff, %0:v[0][0:24]
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2020-05-26 21:56:18 +01:00
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//~gfx[67]! s1: %0:m0 = s_mov_b32 0x1000001
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//~gfx[67]! v1: %0:v[0] = v_mul_lo_u32 %0:m0, %0:v[0][0:8]
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bld.pseudo(aco_opcode::p_unit_test, Operand(13u));
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Instruction* pseudo = bld.pseudo(aco_opcode::p_create_vector,
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Definition(v0_lo, v1),
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Operand(v0_lo, v1b), Operand(v0_lo, v1b),
|
|
|
|
|
Operand(v0_lo, v1b), Operand(v0_lo, v1b));
|
|
|
|
|
static_cast<Pseudo_instruction*>(pseudo)->scratch_sgpr = m0;
|
|
|
|
|
|
|
|
|
|
//~gfx[67]! p_unit_test 14
|
|
|
|
|
//~gfx[67]! v1b: %0:v[1][0:8] = v_mov_b32 %0:v[0][0:8]
|
|
|
|
|
//~gfx[67]! v1b: %0:v[0][0:8] = v_lshrrev_b32 8, %0:v[1][8:16]
|
|
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(14u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_split_vector,
|
|
|
|
|
Definition(v1_lo, v1b), Definition(v0_lo, v1b),
|
|
|
|
|
Operand(v0_lo, v2b));
|
|
|
|
|
|
|
|
|
|
//~gfx[67]! p_unit_test 15
|
|
|
|
|
//~gfx[67]! v1b: %0:v[1][0:8] = v_mov_b32 %0:v[0][0:8]
|
|
|
|
|
//~gfx[67]! v1b: %0:v[0][0:8] = v_lshrrev_b32 8, %0:v[1][8:16]
|
|
|
|
|
//~gfx[67]! v1b: %0:v[2][0:8] = v_lshrrev_b32 16, %0:v[1][16:24]
|
|
|
|
|
//~gfx[67]! v1b: %0:v[3][0:8] = v_lshrrev_b32 24, %0:v[1][24:32]
|
|
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(15u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_split_vector,
|
|
|
|
|
Definition(v1_lo, v1b), Definition(v0_lo, v1b),
|
|
|
|
|
Definition(v2_lo, v1b), Definition(v3_lo, v1b),
|
|
|
|
|
Operand(v0_lo, v1));
|
|
|
|
|
|
|
|
|
|
//~gfx[67]! s_endpgm
|
|
|
|
|
|
|
|
|
|
finish_to_hw_instr_test();
|
|
|
|
|
}
|
|
|
|
|
|
2020-04-06 17:14:12 +01:00
|
|
|
for (unsigned i = GFX8; i <= GFX9; i++) {
|
|
|
|
|
if (!setup_cs(NULL, (chip_class)i))
|
|
|
|
|
continue;
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]>> p_unit_test 0
|
2020-10-15 19:47:12 +02:00
|
|
|
//~gfx[89]! v1: %0:v[0] = v_alignbyte_b32 %0:v[0][0:16], %0:v[0][16:32], 2
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(0u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v2b), Definition(v0_hi, v2b),
|
|
|
|
|
Operand(v0_hi, v2b), Operand(v0_lo, v2b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 1
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(1u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1), Definition(v1_lo, v2b),
|
|
|
|
|
Operand(v1_lo, v1), Operand(v0_lo, v2b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 2
|
|
|
|
|
//~gfx[89]! v2b: %0:v[0][16:32] = v_mov_b32 %0:v[1][16:32] dst_preserve
|
|
|
|
|
//~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][0:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v2b: %0:v[0][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(2u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1), Definition(v1_lo, v2b), Definition(v1_hi, v2b),
|
|
|
|
|
Operand(v1_lo, v1), Operand(v0_lo, v2b), Operand(v0_lo, v2b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 3
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][16:24] = v_mov_b32 %0:v[0][16:24] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(3u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1), Definition(v1_b3, v1b),
|
|
|
|
|
Operand(v1_lo, v1), Operand(v0_b3, v1b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 4
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v1b: %0:v[1][8:16] = v_mov_b32 %0:v[0][8:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(4u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1), Definition(v1_lo, v1b),
|
|
|
|
|
Operand(v1_lo, v1), Operand(v0_lo, v1b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 5
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx9! v1: %0:v[1], v1: %0:v[0] = v_swap_b32 %0:v[0], %0:v[1]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v1b: %0:v[0][8:16] = v_mov_b32 %0:v[1][8:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[0][24:32] = v_mov_b32 %0:v[1][24:32] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(5u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1b), Definition(v0_hi, v1b), Definition(v1_lo, v1),
|
|
|
|
|
Operand(v1_lo, v1b), Operand(v1_hi, v1b), Operand(v0_lo, v1));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 6
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
|
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(6u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v2b), Definition(v0_hi, v2b), Definition(v1_lo, v1),
|
|
|
|
|
Operand(v1_lo, v2b), Operand(v1_hi, v2b), Operand(v0_lo, v1));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 7
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[0], %0:v[1]
|
|
|
|
|
//~gfx9! v1: %0:v[1], v1: %0:v[0] = v_swap_b32 %0:v[0], %0:v[1]
|
2020-10-15 19:47:12 +02:00
|
|
|
//~gfx[89]! v1: %0:v[0] = v_alignbyte_b32 %0:v[0][0:16], %0:v[0][16:32], 2
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(7u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v2b), Definition(v0_hi, v2b), Definition(v1_lo, v1),
|
|
|
|
|
Operand(v1_hi, v2b), Operand(v1_lo, v2b), Operand(v0_lo, v1));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 8
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[0][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(8u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v3b), Definition(v1_lo, v3b),
|
|
|
|
|
Operand(v1_lo, v3b), Operand(v0_lo, v3b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 9
|
2020-04-06 17:14:12 +01:00
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
|
|
|
|
|
//~gfx9! v1: %0:v[0], v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! v1b: %0:v[1][24:32] = v_mov_b32 %0:v[0][24:32] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(9u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v3b), Definition(v1_lo, v3b), Definition(v0_b3, v1b),
|
|
|
|
|
Operand(v1_lo, v3b), Operand(v0_lo, v3b), Operand(v1_b3, v1b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 10
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[0][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[0][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
|
|
|
|
|
//~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(10u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_b1, v2b), Definition(v1_b1, v2b),
|
|
|
|
|
Operand(v1_b1, v2b), Operand(v0_b1, v2b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! p_unit_test 11
|
|
|
|
|
//~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][16:32] dst_preserve
|
|
|
|
|
//~gfx[89]! v1: %0:v[0] = v_mov_b32 42
|
2020-04-06 17:14:12 +01:00
|
|
|
bld.pseudo(aco_opcode::p_unit_test, Operand(11u));
|
|
|
|
|
bld.pseudo(aco_opcode::p_parallelcopy,
|
|
|
|
|
Definition(v0_lo, v1), Definition(v1_lo, v2b),
|
|
|
|
|
Operand(42u), Operand(v0_hi, v2b));
|
|
|
|
|
|
2020-05-26 21:56:18 +01:00
|
|
|
//~gfx[89]! s_endpgm
|
2020-04-06 17:14:12 +01:00
|
|
|
|
|
|
|
|
finish_to_hw_instr_test();
|
|
|
|
|
}
|
|
|
|
|
END_TEST
|
2020-10-13 13:32:38 +01:00
|
|
|
|
|
|
|
|
BEGIN_TEST(to_hw_instr.subdword_constant)
|
|
|
|
|
PhysReg v0_lo{256};
|
|
|
|
|
PhysReg v0_hi{256};
|
|
|
|
|
PhysReg v0_b1{256};
|
|
|
|
|
PhysReg v1_hi{257};
|
|
|
|
|
v0_hi.reg_b += 2;
|
|
|
|
|
v0_b1.reg_b += 1;
|
|
|
|
|
v1_hi.reg_b += 2;
|
|
|
|
|
|
|
|
|
|
for (unsigned i = GFX9; i <= GFX10; i++) {
|
|
|
|
|
if (!setup_cs(NULL, (chip_class)i))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* 16-bit pack */
|
|
|
|
|
//>> p_unit_test 0
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//! v1: %_:v[0] = v_pack_b32_f16 0.5, hi(%_:v[1][16:32])
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bld.pseudo(aco_opcode::p_unit_test, Operand(0u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x3800), Operand(v1_hi, v2b));
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//! p_unit_test 1
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2020-10-15 19:47:12 +02:00
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//~gfx9! v2b: %0:v[0][16:32] = v_and_b32 0xffff0000, %0:v[1][16:32]
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//~gfx9! v1: %0:v[0] = v_or_b32 0x4205, %0:v[0]
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2020-10-13 13:32:38 +01:00
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//~gfx10! v1: %_:v[0] = v_pack_b32_f16 0x4205, hi(%_:v[1][16:32])
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bld.pseudo(aco_opcode::p_unit_test, Operand(1u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x4205), Operand(v1_hi, v2b));
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//TODO: optimize this with GFX10. do_pack_2x16() isn't used in this case
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//! p_unit_test 2
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//~gfx9! v2b: %_:v[0][16:32] = v_mov_b32 %_:v[0][0:16] dst_preserve
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//~gfx9! v1: %_:v[0] = v_and_b32 0xffff0000, %_:v[0]
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//~gfx9! v1: %_:v[0] = v_or_b32 0x4205, %_:v[0]
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//~gfx10! v2b: %_:v[0][16:32] = v_mov_b32 %_:v[0][0:16] dst_preserve
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//~gfx10! v2b: %_:v[0][0:16] = v_pack_b32_f16 0x4205, hi(%_:v[0][16:32])
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bld.pseudo(aco_opcode::p_unit_test, Operand(2u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x4205), Operand(v0_lo, v2b));
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//! p_unit_test 3
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//! v1: %_:v[0] = v_mov_b32 0x3c003800
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bld.pseudo(aco_opcode::p_unit_test, Operand(3u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x3800), Operand((uint16_t)0x3c00));
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//! p_unit_test 4
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//! v1: %_:v[0] = v_mov_b32 0x43064205
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bld.pseudo(aco_opcode::p_unit_test, Operand(4u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x4205), Operand((uint16_t)0x4306));
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//! p_unit_test 5
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//! v1: %_:v[0] = v_mov_b32 0x38004205
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bld.pseudo(aco_opcode::p_unit_test, Operand(5u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Definition(v0_hi, v2b),
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Operand((uint16_t)0x4205), Operand((uint16_t)0x3800));
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/* 16-bit copy */
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//! p_unit_test 6
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//! v2b: %_:v[0][0:16] = v_add_f16 0.5, 0 dst_preserve
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bld.pseudo(aco_opcode::p_unit_test, Operand(6u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Operand((uint16_t)0x3800));
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//! p_unit_test 7
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//~gfx9! v1: %_:v[0] = v_and_b32 0xffff0000, %_:v[0]
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//~gfx9! v1: %_:v[0] = v_or_b32 0x4205, %_:v[0]
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//~gfx10! v2b: %_:v[0][0:16] = v_pack_b32_f16 0x4205, hi(%_:v[0][16:32])
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bld.pseudo(aco_opcode::p_unit_test, Operand(7u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v2b), Operand((uint16_t)0x4205));
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//! p_unit_test 8
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//~gfx9! v1: %_:v[0] = v_and_b32 0xffff, %_:v[0]
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//~gfx9! v1: %_:v[0] = v_or_b32 0x42050000, %_:v[0]
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//~gfx10! v2b: %_:v[0][16:32] = v_pack_b32_f16 %_:v[0][0:16], 0x4205
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bld.pseudo(aco_opcode::p_unit_test, Operand(8u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_hi, v2b), Operand((uint16_t)0x4205));
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//! p_unit_test 9
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//! v1b: %_:v[0][8:16] = v_mov_b32 0 dst_preserve
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//! v1b: %_:v[0][16:24] = v_mov_b32 56 dst_preserve
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bld.pseudo(aco_opcode::p_unit_test, Operand(9u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_b1, v2b), Operand((uint16_t)0x3800));
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//! p_unit_test 10
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//! v1b: %_:v[0][8:16] = v_mov_b32 5 dst_preserve
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//! v1b: %_:v[0][16:24] = v_mul_u32_u24 2, 33 dst_preserve
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bld.pseudo(aco_opcode::p_unit_test, Operand(10u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_b1, v2b), Operand((uint16_t)0x4205));
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/* 8-bit copy */
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//! p_unit_test 11
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//! v1b: %_:v[0][0:8] = v_mul_u32_u24 2, 33 dst_preserve
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bld.pseudo(aco_opcode::p_unit_test, Operand(11u));
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bld.pseudo(aco_opcode::p_parallelcopy,
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Definition(v0_lo, v1b), Operand((uint8_t)0x42));
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//! s_endpgm
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finish_to_hw_instr_test();
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}
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END_TEST
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