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92 lines
3 KiB
C
92 lines
3 KiB
C
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/*
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* Copyright (c) 2020 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_nir_rt.h"
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#include "brw_nir_rt_builder.h"
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static void
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lower_rt_intrinsics_impl(nir_function_impl *impl,
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const struct gen_device_info *devinfo)
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{
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nir_builder build;
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nir_builder_init(&build, impl);
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nir_builder *b = &build;
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b->cursor = nir_before_block(nir_start_block(b->impl));
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struct brw_nir_rt_globals_defs globals;
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brw_nir_rt_load_globals(b, &globals);
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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b->cursor = nir_after_instr(&intrin->instr);
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nir_ssa_def *sysval = NULL;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ray_base_mem_addr_intel:
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sysval = globals.base_mem_addr;
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break;
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case nir_intrinsic_load_ray_hw_stack_size_intel:
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sysval = nir_imul_imm(b, globals.hw_stack_size, 64);
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break;
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case nir_intrinsic_load_ray_sw_stack_size_intel:
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sysval = nir_imul_imm(b, globals.sw_stack_size, 64);
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break;
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case nir_intrinsic_load_ray_num_dss_rt_stacks_intel:
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sysval = globals.num_dss_rt_stacks;
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break;
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default:
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continue;
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}
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if (sysval) {
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
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nir_src_for_ssa(sysval));
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nir_instr_remove(&intrin->instr);
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}
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}
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}
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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void
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brw_nir_lower_rt_intrinsics(nir_shader *nir,
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const struct gen_device_info *devinfo)
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{
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nir_foreach_function(function, nir) {
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if (function->impl)
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lower_rt_intrinsics_impl(function->impl, devinfo);
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}
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}
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