2012-05-10 16:10:15 -07:00
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/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_fs.h"
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2012-10-03 13:03:12 -07:00
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#include "brw_cfg.h"
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2012-05-10 16:10:15 -07:00
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/** @file brw_fs_cse.cpp
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*
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* Support for local common subexpression elimination.
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*
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* See Muchnik's Advanced Compiler Design and Implementation, section
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* 13.1 (p378).
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*/
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namespace {
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struct aeb_entry : public exec_node {
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/** The instruction that generates the expression value. */
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fs_inst *generator;
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/** The temporary where the value is stored. */
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fs_reg tmp;
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};
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}
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static bool
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is_expression(const fs_inst *const inst)
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{
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switch (inst->opcode) {
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case BRW_OPCODE_SEL:
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case BRW_OPCODE_NOT:
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case BRW_OPCODE_AND:
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case BRW_OPCODE_OR:
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case BRW_OPCODE_XOR:
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case BRW_OPCODE_SHR:
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case BRW_OPCODE_SHL:
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case BRW_OPCODE_ASR:
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case BRW_OPCODE_ADD:
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case BRW_OPCODE_MUL:
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case BRW_OPCODE_FRC:
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case BRW_OPCODE_RNDU:
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case BRW_OPCODE_RNDD:
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case BRW_OPCODE_RNDE:
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case BRW_OPCODE_RNDZ:
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case BRW_OPCODE_LINE:
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case BRW_OPCODE_PLN:
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case BRW_OPCODE_MAD:
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2012-12-02 00:08:15 -08:00
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case BRW_OPCODE_LRP:
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2013-02-15 19:49:32 -08:00
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case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
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2013-03-15 14:43:28 -07:00
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case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
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2013-03-18 10:16:42 -07:00
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case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
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2012-05-10 16:10:15 -07:00
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case FS_OPCODE_CINTERP:
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case FS_OPCODE_LINTERP:
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return true;
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default:
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return false;
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}
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}
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static bool
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operands_match(fs_reg *xs, fs_reg *ys)
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{
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return xs[0].equals(ys[0]) && xs[1].equals(ys[1]) && xs[2].equals(ys[2]);
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}
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bool
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2012-10-03 13:16:09 -07:00
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fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
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2012-05-10 16:10:15 -07:00
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{
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bool progress = false;
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void *mem_ctx = ralloc_context(this->mem_ctx);
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2013-02-19 16:20:10 -08:00
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int ip = block->start_ip;
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2012-10-03 13:17:58 -07:00
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for (fs_inst *inst = (fs_inst *)block->start;
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2012-05-10 16:10:15 -07:00
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inst != block->end->next;
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inst = (fs_inst *) inst->next) {
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/* Skip some cases. */
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2013-08-05 17:12:12 -07:00
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if (is_expression(inst) &&
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!inst->predicate &&
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!inst->is_partial_write() &&
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2013-09-26 13:38:11 -07:00
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!inst->conditional_mod &&
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inst->dst.file != HW_REG)
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2012-05-10 16:10:15 -07:00
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{
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bool found = false;
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aeb_entry *entry;
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foreach_list(entry_node, aeb) {
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entry = (aeb_entry *) entry_node;
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/* Match current instruction's expression against those in AEB. */
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if (inst->opcode == entry->generator->opcode &&
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inst->saturate == entry->generator->saturate &&
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2013-02-15 21:55:30 -08:00
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inst->dst.type == entry->generator->dst.type &&
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operands_match(entry->generator->src, inst->src)) {
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2012-05-10 16:10:15 -07:00
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found = true;
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progress = true;
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break;
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}
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}
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if (!found) {
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/* Our first sighting of this expression. Create an entry. */
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aeb_entry *entry = ralloc(mem_ctx, aeb_entry);
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entry->tmp = reg_undef;
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entry->generator = inst;
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aeb->push_tail(entry);
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} else {
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/* This is at least our second sighting of this expression.
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* If we don't have a temporary already, make one.
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*/
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bool no_existing_temp = entry->tmp.file == BAD_FILE;
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if (no_existing_temp) {
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2013-03-18 11:30:57 -07:00
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int written = entry->generator->regs_written;
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2013-03-15 14:43:28 -07:00
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fs_reg orig_dst = entry->generator->dst;
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fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written),
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orig_dst.type);
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entry->tmp = tmp;
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entry->generator->dst = tmp;
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for (int i = 0; i < written; i++) {
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fs_inst *copy = MOV(orig_dst, tmp);
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copy->force_writemask_all =
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entry->generator->force_writemask_all;
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entry->generator->insert_after(copy);
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orig_dst.reg_offset++;
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tmp.reg_offset++;
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}
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2012-05-10 16:10:15 -07:00
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}
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/* dest <- temp */
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2013-03-18 11:30:57 -07:00
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int written = inst->regs_written;
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assert(written == entry->generator->regs_written);
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2013-02-15 19:49:32 -08:00
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assert(inst->dst.type == entry->tmp.type);
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2013-03-15 14:43:28 -07:00
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fs_reg dst = inst->dst;
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fs_reg tmp = entry->tmp;
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fs_inst *copy = NULL;
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for (int i = 0; i < written; i++) {
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copy = MOV(dst, tmp);
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copy->force_writemask_all = inst->force_writemask_all;
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inst->insert_before(copy);
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dst.reg_offset++;
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tmp.reg_offset++;
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}
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inst->remove();
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2012-05-10 16:10:15 -07:00
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/* Appending an instruction may have changed our bblock end. */
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if (inst == block->end) {
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block->end = copy;
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}
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/* Continue iteration with copy->next */
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inst = copy;
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}
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}
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foreach_list_safe(entry_node, aeb) {
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aeb_entry *entry = (aeb_entry *)entry_node;
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for (int i = 0; i < 3; i++) {
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2013-02-19 16:20:10 -08:00
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fs_reg *src_reg = &entry->generator->src[i];
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/* Kill all AEB entries that use the destination we just
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* overwrote.
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*/
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2012-07-06 15:06:59 -07:00
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if (inst->overwrites_reg(entry->generator->src[i])) {
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2012-05-10 16:10:15 -07:00
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entry->remove();
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ralloc_free(entry);
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break;
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}
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2013-02-19 16:20:10 -08:00
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/* Kill any AEB entries using registers that don't get reused any
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* more -- a sure sign they'll fail operands_match().
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*/
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2013-04-30 15:00:40 -07:00
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if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
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2013-02-19 16:20:10 -08:00
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entry->remove();
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ralloc_free(entry);
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break;
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}
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2012-05-10 16:10:15 -07:00
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}
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}
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2013-02-19 16:20:10 -08:00
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ip++;
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2012-05-10 16:10:15 -07:00
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}
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ralloc_free(mem_ctx);
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if (progress)
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2013-08-06 02:17:24 -07:00
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invalidate_live_intervals();
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2012-05-10 16:10:15 -07:00
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return progress;
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}
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bool
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fs_visitor::opt_cse()
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{
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bool progress = false;
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2013-02-19 16:20:10 -08:00
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calculate_live_intervals();
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2012-10-03 13:16:09 -07:00
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cfg_t cfg(this);
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2012-05-10 16:10:15 -07:00
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for (int b = 0; b < cfg.num_blocks; b++) {
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2012-10-03 13:16:09 -07:00
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bblock_t *block = cfg.blocks[b];
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2012-05-10 16:10:15 -07:00
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exec_list aeb;
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progress = opt_cse_local(block, &aeb) || progress;
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}
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return progress;
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}
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