2016-12-13 14:39:51 +11:00
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/*
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* Copyright © 2015 Thomas Helland
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_constant_expressions.h"
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#include "nir_loop_analyze.h"
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typedef enum {
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undefined,
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invariant,
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not_invariant,
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basic_induction
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} nir_loop_variable_type;
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2019-06-21 09:18:16 -05:00
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typedef struct nir_basic_induction_var {
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nir_alu_instr *alu; /* The def of the alu-operation */
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nir_ssa_def *def_outside_loop; /* The phi-src outside the loop */
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} nir_basic_induction_var;
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2016-12-13 14:39:51 +11:00
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typedef struct {
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/* A link for the work list */
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struct list_head process_link;
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bool in_loop;
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/* The ssa_def associated with this info */
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nir_ssa_def *def;
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/* The type of this ssa_def */
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nir_loop_variable_type type;
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/* If this is of type basic_induction */
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struct nir_basic_induction_var *ind;
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2018-11-26 10:14:28 +11:00
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/* True if variable is in an if branch */
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bool in_if_branch;
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/* True if variable is in a nested loop */
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bool in_nested_loop;
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2016-12-13 14:39:51 +11:00
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} nir_loop_variable;
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typedef struct {
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/* The loop we store information for */
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nir_loop *loop;
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/* Loop_variable for all ssa_defs in function */
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nir_loop_variable *loop_vars;
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/* A list of the loop_vars to analyze */
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struct list_head process_list;
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nir_variable_mode indirect_mask;
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} loop_info_state;
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static nir_loop_variable *
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get_loop_var(nir_ssa_def *value, loop_info_state *state)
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{
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return &(state->loop_vars[value->index]);
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}
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typedef struct {
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loop_info_state *state;
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2018-11-26 10:14:28 +11:00
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bool in_if_branch;
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bool in_nested_loop;
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2016-12-13 14:39:51 +11:00
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} init_loop_state;
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static bool
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init_loop_def(nir_ssa_def *def, void *void_init_loop_state)
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{
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init_loop_state *loop_init_state = void_init_loop_state;
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nir_loop_variable *var = get_loop_var(def, loop_init_state->state);
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2018-11-26 10:14:28 +11:00
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if (loop_init_state->in_nested_loop) {
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var->in_nested_loop = true;
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} else if (loop_init_state->in_if_branch) {
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var->in_if_branch = true;
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2016-12-13 14:39:51 +11:00
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} else {
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/* Add to the tail of the list. That way we start at the beginning of
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* the defs in the loop instead of the end when walking the list. This
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* means less recursive calls. Only add defs that are not in nested
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* loops or conditional blocks.
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*/
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list_addtail(&var->process_link, &loop_init_state->state->process_list);
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}
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var->in_loop = true;
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return true;
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}
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2019-03-03 09:24:12 -06:00
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/** Calculate an estimated cost in number of instructions
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*
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* We do this so that we don't unroll loops which will later get massively
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* inflated due to int64 or fp64 lowering. The estimates provided here don't
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* have to be massively accurate; they just have to be good enough that loop
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* unrolling doesn't cause things to blow up too much.
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*/
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static unsigned
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instr_cost(nir_instr *instr, const nir_shader_compiler_options *options)
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{
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if (instr->type == nir_instr_type_intrinsic ||
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instr->type == nir_instr_type_tex)
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return 1;
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if (instr->type != nir_instr_type_alu)
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return 0;
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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const nir_op_info *info = &nir_op_infos[alu->op];
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/* Assume everything 16 or 32-bit is cheap.
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*
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* There are no 64-bit ops that don't have a 64-bit thing as their
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* destination or first source.
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*/
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if (nir_dest_bit_size(alu->dest.dest) < 64 &&
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nir_src_bit_size(alu->src[0].src) < 64)
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return 1;
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bool is_fp64 = nir_dest_bit_size(alu->dest.dest) == 64 &&
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nir_alu_type_get_base_type(info->output_type) == nir_type_float;
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for (unsigned i = 0; i < info->num_inputs; i++) {
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if (nir_src_bit_size(alu->src[i].src) == 64 &&
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nir_alu_type_get_base_type(info->input_types[i]) == nir_type_float)
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is_fp64 = true;
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}
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if (is_fp64) {
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/* If it's something lowered normally, it's expensive. */
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unsigned cost = 1;
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if (options->lower_doubles_options &
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nir_lower_doubles_op_to_options_mask(alu->op))
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cost *= 20;
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/* If it's full software, it's even more expensive */
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if (options->lower_doubles_options & nir_lower_fp64_full_software)
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cost *= 100;
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return cost;
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} else {
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if (options->lower_int64_options &
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nir_lower_int64_op_to_options_mask(alu->op)) {
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/* These require a doing the division algorithm. */
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if (alu->op == nir_op_idiv || alu->op == nir_op_udiv ||
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alu->op == nir_op_imod || alu->op == nir_op_umod ||
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alu->op == nir_op_irem)
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return 100;
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/* Other int64 lowering isn't usually all that expensive */
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return 5;
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}
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return 1;
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}
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}
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2016-12-13 14:39:51 +11:00
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static bool
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init_loop_block(nir_block *block, loop_info_state *state,
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2019-03-03 09:24:12 -06:00
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bool in_if_branch, bool in_nested_loop,
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const nir_shader_compiler_options *options)
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2016-12-13 14:39:51 +11:00
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{
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2018-11-26 10:14:28 +11:00
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init_loop_state init_state = {.in_if_branch = in_if_branch,
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.in_nested_loop = in_nested_loop,
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2016-12-13 14:39:51 +11:00
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.state = state };
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nir_foreach_instr(instr, block) {
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2019-03-03 09:24:12 -06:00
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state->loop->info->instr_cost += instr_cost(instr, options);
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2016-12-13 14:39:51 +11:00
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nir_foreach_ssa_def(instr, init_loop_def, &init_state);
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}
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return true;
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}
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static inline bool
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is_var_alu(nir_loop_variable *var)
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{
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return var->def->parent_instr->type == nir_instr_type_alu;
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}
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static inline bool
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is_var_constant(nir_loop_variable *var)
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{
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return var->def->parent_instr->type == nir_instr_type_load_const;
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}
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static inline bool
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is_var_phi(nir_loop_variable *var)
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{
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return var->def->parent_instr->type == nir_instr_type_phi;
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}
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static inline bool
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mark_invariant(nir_ssa_def *def, loop_info_state *state)
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{
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nir_loop_variable *var = get_loop_var(def, state);
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if (var->type == invariant)
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return true;
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if (!var->in_loop) {
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var->type = invariant;
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return true;
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}
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if (var->type == not_invariant)
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return false;
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if (is_var_alu(var)) {
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nir_alu_instr *alu = nir_instr_as_alu(def->parent_instr);
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
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if (!mark_invariant(alu->src[i].src.ssa, state)) {
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var->type = not_invariant;
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return false;
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}
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}
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var->type = invariant;
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return true;
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}
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/* Phis shouldn't be invariant except if one operand is invariant, and the
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* other is the phi itself. These should be removed by opt_remove_phis.
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* load_consts are already set to invariant and constant during init,
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* and so should return earlier. Remaining op_codes are set undefined.
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*/
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var->type = not_invariant;
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return false;
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}
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static void
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compute_invariance_information(loop_info_state *state)
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{
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/* An expression is invariant in a loop L if:
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* (base cases)
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* – it’s a constant
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* – it’s a variable use, all of whose single defs are outside of L
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* (inductive cases)
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* – it’s a pure computation all of whose args are loop invariant
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* – it’s a variable use whose single reaching def, and the
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* rhs of that def is loop-invariant
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*/
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list_for_each_entry_safe(nir_loop_variable, var, &state->process_list,
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process_link) {
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2018-11-26 10:14:28 +11:00
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assert(!var->in_if_branch && !var->in_nested_loop);
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2016-12-13 14:39:51 +11:00
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if (mark_invariant(var->def, state))
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list_del(&var->process_link);
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}
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}
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2019-06-20 16:13:39 -05:00
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/* If all of the instruction sources point to identical ALU instructions (as
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* per nir_instrs_equal), return one of the ALU instructions. Otherwise,
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* return NULL.
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*/
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static nir_alu_instr *
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phi_instr_as_alu(nir_phi_instr *phi)
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{
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nir_alu_instr *first = NULL;
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nir_foreach_phi_src(src, phi) {
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assert(src->src.is_ssa);
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|
if (src->src.ssa->parent_instr->type != nir_instr_type_alu)
|
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
|
|
nir_alu_instr *alu = nir_instr_as_alu(src->src.ssa->parent_instr);
|
|
|
|
|
|
if (first == NULL) {
|
|
|
|
|
|
first = alu;
|
|
|
|
|
|
} else {
|
|
|
|
|
|
if (!nir_instrs_equal(&first->instr, &alu->instr))
|
|
|
|
|
|
return NULL;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return first;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
static bool
|
|
|
|
|
|
alu_src_has_identity_swizzle(nir_alu_instr *alu, unsigned src_idx)
|
|
|
|
|
|
{
|
|
|
|
|
|
assert(nir_op_infos[alu->op].input_sizes[src_idx] == 0);
|
|
|
|
|
|
assert(alu->dest.dest.is_ssa);
|
|
|
|
|
|
for (unsigned i = 0; i < alu->dest.dest.ssa.num_components; i++) {
|
|
|
|
|
|
if (alu->src[src_idx].swizzle[i] != i)
|
|
|
|
|
|
return false;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
static bool
|
|
|
|
|
|
compute_induction_information(loop_info_state *state)
|
|
|
|
|
|
{
|
|
|
|
|
|
bool found_induction_var = false;
|
|
|
|
|
|
list_for_each_entry_safe(nir_loop_variable, var, &state->process_list,
|
|
|
|
|
|
process_link) {
|
|
|
|
|
|
|
|
|
|
|
|
/* It can't be an induction variable if it is invariant. Invariants and
|
|
|
|
|
|
* things in nested loops or conditionals should have been removed from
|
|
|
|
|
|
* the list by compute_invariance_information().
|
|
|
|
|
|
*/
|
2018-11-26 10:14:28 +11:00
|
|
|
|
assert(!var->in_if_branch && !var->in_nested_loop &&
|
|
|
|
|
|
var->type != invariant);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2017-02-27 17:21:42 -08:00
|
|
|
|
/* We are only interested in checking phis for the basic induction
|
2016-12-13 14:39:51 +11:00
|
|
|
|
* variable case as its simple to detect. All basic induction variables
|
|
|
|
|
|
* have a phi node
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (!is_var_phi(var))
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
nir_phi_instr *phi = nir_instr_as_phi(var->def->parent_instr);
|
|
|
|
|
|
nir_basic_induction_var *biv = rzalloc(state, nir_basic_induction_var);
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_loop_variable *alu_src_var = NULL;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
nir_foreach_phi_src(src, phi) {
|
|
|
|
|
|
nir_loop_variable *src_var = get_loop_var(src->src.ssa, state);
|
|
|
|
|
|
|
2018-11-26 12:04:35 +11:00
|
|
|
|
/* If one of the sources is in an if branch or nested loop then don't
|
|
|
|
|
|
* attempt to go any further.
|
2016-12-13 14:39:51 +11:00
|
|
|
|
*/
|
2018-11-26 10:14:28 +11:00
|
|
|
|
if (src_var->in_if_branch || src_var->in_nested_loop)
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
|
|
|
|
|
|
nir: detect more induction variables
This allows loop analysis to detect inductions variables that
are incremented in both branches of an if rather than in a main
loop block. For example:
loop {
block block_1:
/* preds: block_0 block_7 */
vec1 32 ssa_8 = phi block_0: ssa_4, block_7: ssa_20
vec1 32 ssa_9 = phi block_0: ssa_0, block_7: ssa_4
vec1 32 ssa_10 = phi block_0: ssa_1, block_7: ssa_4
vec1 32 ssa_11 = phi block_0: ssa_2, block_7: ssa_21
vec1 32 ssa_12 = phi block_0: ssa_3, block_7: ssa_22
vec4 32 ssa_13 = vec4 ssa_12, ssa_11, ssa_10, ssa_9
vec1 32 ssa_14 = ige ssa_8, ssa_5
/* succs: block_2 block_3 */
if ssa_14 {
block block_2:
/* preds: block_1 */
break
/* succs: block_8 */
} else {
block block_3:
/* preds: block_1 */
/* succs: block_4 */
}
block block_4:
/* preds: block_3 */
vec1 32 ssa_15 = ilt ssa_6, ssa_8
/* succs: block_5 block_6 */
if ssa_15 {
block block_5:
/* preds: block_4 */
vec1 32 ssa_16 = iadd ssa_8, ssa_7
vec1 32 ssa_17 = load_const (0x3f800000 /* 1.000000*/)
/* succs: block_7 */
} else {
block block_6:
/* preds: block_4 */
vec1 32 ssa_18 = iadd ssa_8, ssa_7
vec1 32 ssa_19 = load_const (0x3f800000 /* 1.000000*/)
/* succs: block_7 */
}
block block_7:
/* preds: block_5 block_6 */
vec1 32 ssa_20 = phi block_5: ssa_16, block_6: ssa_18
vec1 32 ssa_21 = phi block_5: ssa_17, block_6: ssa_4
vec1 32 ssa_22 = phi block_5: ssa_4, block_6: ssa_19
/* succs: block_1 */
}
Unfortunatly GCM could move the addition out of the if for us
(making this patch unrequired) but we still cannot enable the GCM
pass without regressions.
This unrolls a loop in Rise of The Tomb Raider.
vkpipeline-db results (VEGA):
Totals from affected shaders:
SGPRS: 88 -> 96 (9.09 %)
VGPRS: 56 -> 52 (-7.14 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 2168 -> 4560 (110.33 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 4 -> 4 (0.00 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32211
2018-11-26 12:05:00 +11:00
|
|
|
|
/* Detect inductions variables that are incremented in both branches
|
|
|
|
|
|
* of an unnested if rather than in a loop block.
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (is_var_phi(src_var)) {
|
|
|
|
|
|
nir_phi_instr *src_phi =
|
|
|
|
|
|
nir_instr_as_phi(src_var->def->parent_instr);
|
2019-06-20 16:13:39 -05:00
|
|
|
|
nir_alu_instr *src_phi_alu = phi_instr_as_alu(src_phi);
|
|
|
|
|
|
if (src_phi_alu) {
|
|
|
|
|
|
src_var = get_loop_var(&src_phi_alu->dest.dest.ssa, state);
|
|
|
|
|
|
if (!src_var->in_if_branch)
|
nir: detect more induction variables
This allows loop analysis to detect inductions variables that
are incremented in both branches of an if rather than in a main
loop block. For example:
loop {
block block_1:
/* preds: block_0 block_7 */
vec1 32 ssa_8 = phi block_0: ssa_4, block_7: ssa_20
vec1 32 ssa_9 = phi block_0: ssa_0, block_7: ssa_4
vec1 32 ssa_10 = phi block_0: ssa_1, block_7: ssa_4
vec1 32 ssa_11 = phi block_0: ssa_2, block_7: ssa_21
vec1 32 ssa_12 = phi block_0: ssa_3, block_7: ssa_22
vec4 32 ssa_13 = vec4 ssa_12, ssa_11, ssa_10, ssa_9
vec1 32 ssa_14 = ige ssa_8, ssa_5
/* succs: block_2 block_3 */
if ssa_14 {
block block_2:
/* preds: block_1 */
break
/* succs: block_8 */
} else {
block block_3:
/* preds: block_1 */
/* succs: block_4 */
}
block block_4:
/* preds: block_3 */
vec1 32 ssa_15 = ilt ssa_6, ssa_8
/* succs: block_5 block_6 */
if ssa_15 {
block block_5:
/* preds: block_4 */
vec1 32 ssa_16 = iadd ssa_8, ssa_7
vec1 32 ssa_17 = load_const (0x3f800000 /* 1.000000*/)
/* succs: block_7 */
} else {
block block_6:
/* preds: block_4 */
vec1 32 ssa_18 = iadd ssa_8, ssa_7
vec1 32 ssa_19 = load_const (0x3f800000 /* 1.000000*/)
/* succs: block_7 */
}
block block_7:
/* preds: block_5 block_6 */
vec1 32 ssa_20 = phi block_5: ssa_16, block_6: ssa_18
vec1 32 ssa_21 = phi block_5: ssa_17, block_6: ssa_4
vec1 32 ssa_22 = phi block_5: ssa_4, block_6: ssa_19
/* succs: block_1 */
}
Unfortunatly GCM could move the addition out of the if for us
(making this patch unrequired) but we still cannot enable the GCM
pass without regressions.
This unrolls a loop in Rise of The Tomb Raider.
vkpipeline-db results (VEGA):
Totals from affected shaders:
SGPRS: 88 -> 96 (9.09 %)
VGPRS: 56 -> 52 (-7.14 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 2168 -> 4560 (110.33 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 4 -> 4 (0.00 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32211
2018-11-26 12:05:00 +11:00
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!src_var->in_loop && !biv->def_outside_loop) {
|
|
|
|
|
|
biv->def_outside_loop = src_var->def;
|
|
|
|
|
|
} else if (is_var_alu(src_var) && !biv->alu) {
|
|
|
|
|
|
alu_src_var = src_var;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
nir_alu_instr *alu = nir_instr_as_alu(src_var->def->parent_instr);
|
|
|
|
|
|
|
|
|
|
|
|
if (nir_op_infos[alu->op].num_inputs == 2) {
|
|
|
|
|
|
for (unsigned i = 0; i < 2; i++) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
/* Is one of the operands const, and the other the phi. The
|
|
|
|
|
|
* phi source can't be swizzled in any way.
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (nir_src_is_const(alu->src[i].src) &&
|
|
|
|
|
|
alu->src[1-i].src.ssa == &phi->dest.ssa &&
|
|
|
|
|
|
alu_src_has_identity_swizzle(alu, 1 - i))
|
|
|
|
|
|
biv->alu = alu;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
2019-06-21 09:18:16 -05:00
|
|
|
|
|
|
|
|
|
|
if (!biv->alu)
|
|
|
|
|
|
break;
|
|
|
|
|
|
} else {
|
|
|
|
|
|
biv->alu = NULL;
|
|
|
|
|
|
break;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (biv->alu && biv->def_outside_loop &&
|
|
|
|
|
|
biv->def_outside_loop->parent_instr->type == nir_instr_type_load_const) {
|
|
|
|
|
|
alu_src_var->type = basic_induction;
|
|
|
|
|
|
alu_src_var->ind = biv;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
var->type = basic_induction;
|
|
|
|
|
|
var->ind = biv;
|
|
|
|
|
|
|
|
|
|
|
|
found_induction_var = true;
|
|
|
|
|
|
} else {
|
|
|
|
|
|
ralloc_free(biv);
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
return found_induction_var;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
|
initialize_ssa_def(nir_ssa_def *def, void *void_state)
|
|
|
|
|
|
{
|
|
|
|
|
|
loop_info_state *state = void_state;
|
|
|
|
|
|
nir_loop_variable *var = get_loop_var(def, state);
|
|
|
|
|
|
|
|
|
|
|
|
var->in_loop = false;
|
|
|
|
|
|
var->def = def;
|
|
|
|
|
|
|
|
|
|
|
|
if (def->parent_instr->type == nir_instr_type_load_const) {
|
|
|
|
|
|
var->type = invariant;
|
|
|
|
|
|
} else {
|
|
|
|
|
|
var->type = undefined;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
|
find_loop_terminators(loop_info_state *state)
|
|
|
|
|
|
{
|
|
|
|
|
|
bool success = false;
|
|
|
|
|
|
foreach_list_typed_safe(nir_cf_node, node, node, &state->loop->body) {
|
|
|
|
|
|
if (node->type == nir_cf_node_if) {
|
|
|
|
|
|
nir_if *nif = nir_cf_node_as_if(node);
|
|
|
|
|
|
|
|
|
|
|
|
nir_block *break_blk = NULL;
|
|
|
|
|
|
nir_block *continue_from_blk = NULL;
|
|
|
|
|
|
bool continue_from_then = true;
|
|
|
|
|
|
|
|
|
|
|
|
nir_block *last_then = nir_if_last_then_block(nif);
|
|
|
|
|
|
nir_block *last_else = nir_if_last_else_block(nif);
|
2018-06-01 15:37:27 +10:00
|
|
|
|
if (nir_block_ends_in_break(last_then)) {
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break_blk = last_then;
|
|
|
|
|
|
continue_from_blk = last_else;
|
|
|
|
|
|
continue_from_then = false;
|
2018-06-01 15:37:27 +10:00
|
|
|
|
} else if (nir_block_ends_in_break(last_else)) {
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break_blk = last_else;
|
|
|
|
|
|
continue_from_blk = last_then;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* If there is a break then we should find a terminator. If we can
|
|
|
|
|
|
* not find a loop terminator, but there is a break-statement then
|
|
|
|
|
|
* we should return false so that we do not try to find trip-count
|
|
|
|
|
|
*/
|
2018-07-07 12:09:26 +10:00
|
|
|
|
if (!nir_is_trivial_loop_if(nif, break_blk)) {
|
|
|
|
|
|
state->loop->info->complex_loop = true;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
return false;
|
2018-07-07 12:09:26 +10:00
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
/* Continue if the if contained no jumps at all */
|
|
|
|
|
|
if (!break_blk)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
2018-07-07 12:09:26 +10:00
|
|
|
|
if (nif->condition.ssa->parent_instr->type == nir_instr_type_phi) {
|
|
|
|
|
|
state->loop->info->complex_loop = true;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
return false;
|
2018-07-07 12:09:26 +10:00
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
nir_loop_terminator *terminator =
|
|
|
|
|
|
rzalloc(state->loop->info, nir_loop_terminator);
|
|
|
|
|
|
|
2018-06-04 16:26:46 +10:00
|
|
|
|
list_addtail(&terminator->loop_terminator_link,
|
|
|
|
|
|
&state->loop->info->loop_terminator_list);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
terminator->nif = nif;
|
|
|
|
|
|
terminator->break_block = break_blk;
|
|
|
|
|
|
terminator->continue_from_block = continue_from_blk;
|
|
|
|
|
|
terminator->continue_from_then = continue_from_then;
|
|
|
|
|
|
terminator->conditional_instr = nif->condition.ssa->parent_instr;
|
|
|
|
|
|
|
|
|
|
|
|
success = true;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return success;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-11-15 21:28:31 +11:00
|
|
|
|
/* This function looks for an array access within a loop that uses an
|
|
|
|
|
|
* induction variable for the array index. If found it returns the size of the
|
|
|
|
|
|
* array, otherwise 0 is returned. If we find an induction var we pass it back
|
|
|
|
|
|
* to the caller via array_index_out.
|
|
|
|
|
|
*/
|
|
|
|
|
|
static unsigned
|
|
|
|
|
|
find_array_access_via_induction(loop_info_state *state,
|
|
|
|
|
|
nir_deref_instr *deref,
|
|
|
|
|
|
nir_loop_variable **array_index_out)
|
|
|
|
|
|
{
|
|
|
|
|
|
for (nir_deref_instr *d = deref; d; d = nir_deref_instr_parent(d)) {
|
|
|
|
|
|
if (d->deref_type != nir_deref_type_array)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
assert(d->arr.index.is_ssa);
|
|
|
|
|
|
nir_loop_variable *array_index = get_loop_var(d->arr.index.ssa, state);
|
|
|
|
|
|
|
|
|
|
|
|
if (array_index->type != basic_induction)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
if (array_index_out)
|
|
|
|
|
|
*array_index_out = array_index;
|
|
|
|
|
|
|
|
|
|
|
|
nir_deref_instr *parent = nir_deref_instr_parent(d);
|
2019-03-21 20:37:12 -07:00
|
|
|
|
if (glsl_type_is_array_or_matrix(parent->type)) {
|
|
|
|
|
|
return glsl_get_length(parent->type);
|
|
|
|
|
|
} else {
|
|
|
|
|
|
assert(glsl_type_is_vector(parent->type));
|
|
|
|
|
|
return glsl_get_vector_elements(parent->type);
|
|
|
|
|
|
}
|
2018-11-15 21:28:31 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-11-15 23:23:09 +11:00
|
|
|
|
static bool
|
|
|
|
|
|
guess_loop_limit(loop_info_state *state, nir_const_value *limit_val,
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar basic_ind)
|
2018-11-15 23:23:09 +11:00
|
|
|
|
{
|
|
|
|
|
|
unsigned min_array_size = 0;
|
|
|
|
|
|
|
|
|
|
|
|
nir_foreach_block_in_cf_node(block, &state->loop->cf_node) {
|
|
|
|
|
|
nir_foreach_instr(instr, block) {
|
|
|
|
|
|
if (instr->type != nir_instr_type_intrinsic)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
|
|
|
|
|
|
|
|
|
|
|
|
/* Check for arrays variably-indexed by a loop induction variable. */
|
|
|
|
|
|
if (intrin->intrinsic == nir_intrinsic_load_deref ||
|
|
|
|
|
|
intrin->intrinsic == nir_intrinsic_store_deref ||
|
|
|
|
|
|
intrin->intrinsic == nir_intrinsic_copy_deref) {
|
|
|
|
|
|
|
|
|
|
|
|
nir_loop_variable *array_idx = NULL;
|
|
|
|
|
|
unsigned array_size =
|
|
|
|
|
|
find_array_access_via_induction(state,
|
|
|
|
|
|
nir_src_as_deref(intrin->src[0]),
|
|
|
|
|
|
&array_idx);
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (array_idx && basic_ind.def == array_idx->def &&
|
2018-11-15 23:23:09 +11:00
|
|
|
|
(min_array_size == 0 || min_array_size > array_size)) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
/* Array indices are scalars */
|
|
|
|
|
|
assert(basic_ind.def->num_components == 1);
|
2018-11-15 23:23:09 +11:00
|
|
|
|
min_array_size = array_size;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
if (intrin->intrinsic != nir_intrinsic_copy_deref)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
array_size =
|
|
|
|
|
|
find_array_access_via_induction(state,
|
|
|
|
|
|
nir_src_as_deref(intrin->src[1]),
|
|
|
|
|
|
&array_idx);
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (array_idx && basic_ind.def == array_idx->def &&
|
2018-11-15 23:23:09 +11:00
|
|
|
|
(min_array_size == 0 || min_array_size > array_size)) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
/* Array indices are scalars */
|
|
|
|
|
|
assert(basic_ind.def->num_components == 1);
|
2018-11-15 23:23:09 +11:00
|
|
|
|
min_array_size = array_size;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
if (min_array_size) {
|
2019-06-20 16:26:19 -05:00
|
|
|
|
*limit_val = nir_const_value_for_uint(min_array_size,
|
2019-06-21 09:18:16 -05:00
|
|
|
|
basic_ind.def->bit_size);
|
2018-11-15 23:23:09 +11:00
|
|
|
|
return true;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-11-20 13:45:58 +11:00
|
|
|
|
static bool
|
2019-06-21 09:18:16 -05:00
|
|
|
|
try_find_limit_of_alu(nir_ssa_scalar limit, nir_const_value *limit_val,
|
2018-11-20 13:45:58 +11:00
|
|
|
|
nir_loop_terminator *terminator, loop_info_state *state)
|
|
|
|
|
|
{
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_alu(limit))
|
2018-11-20 13:45:58 +11:00
|
|
|
|
return false;
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_op limit_op = nir_ssa_scalar_alu_op(limit);
|
|
|
|
|
|
if (limit_op == nir_op_imin || limit_op == nir_op_fmin) {
|
|
|
|
|
|
for (unsigned i = 0; i < 2; i++) {
|
|
|
|
|
|
nir_ssa_scalar src = nir_ssa_scalar_chase_alu_src(limit, i);
|
|
|
|
|
|
if (nir_ssa_scalar_is_const(src)) {
|
|
|
|
|
|
*limit_val = nir_ssa_scalar_as_const_value(src);
|
|
|
|
|
|
terminator->exact_trip_count_unknown = true;
|
|
|
|
|
|
return true;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
2018-11-20 13:45:58 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-20 16:26:19 -05:00
|
|
|
|
static nir_const_value
|
|
|
|
|
|
eval_const_unop(nir_op op, unsigned bit_size, nir_const_value src0)
|
|
|
|
|
|
{
|
|
|
|
|
|
assert(nir_op_infos[op].num_inputs == 1);
|
|
|
|
|
|
nir_const_value dest;
|
|
|
|
|
|
nir_const_value *src[1] = { &src0 };
|
|
|
|
|
|
nir_eval_const_opcode(op, &dest, 1, bit_size, src);
|
|
|
|
|
|
return dest;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static nir_const_value
|
|
|
|
|
|
eval_const_binop(nir_op op, unsigned bit_size,
|
|
|
|
|
|
nir_const_value src0, nir_const_value src1)
|
|
|
|
|
|
{
|
|
|
|
|
|
assert(nir_op_infos[op].num_inputs == 2);
|
|
|
|
|
|
nir_const_value dest;
|
|
|
|
|
|
nir_const_value *src[2] = { &src0, &src1 };
|
|
|
|
|
|
nir_eval_const_opcode(op, &dest, 1, bit_size, src);
|
|
|
|
|
|
return dest;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
static int32_t
|
2019-06-20 16:26:19 -05:00
|
|
|
|
get_iteration(nir_op cond_op, nir_const_value initial, nir_const_value step,
|
|
|
|
|
|
nir_const_value limit, unsigned bit_size)
|
2016-12-13 14:39:51 +11:00
|
|
|
|
{
|
2019-06-20 16:26:19 -05:00
|
|
|
|
nir_const_value span, iter;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
switch (cond_op) {
|
2018-10-19 11:14:47 -05:00
|
|
|
|
case nir_op_ige:
|
|
|
|
|
|
case nir_op_ilt:
|
|
|
|
|
|
case nir_op_ieq:
|
2019-06-20 16:26:19 -05:00
|
|
|
|
case nir_op_ine:
|
|
|
|
|
|
span = eval_const_binop(nir_op_isub, bit_size, limit, initial);
|
|
|
|
|
|
iter = eval_const_binop(nir_op_idiv, bit_size, span, step);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
2019-06-20 16:26:19 -05:00
|
|
|
|
|
2018-10-19 11:14:47 -05:00
|
|
|
|
case nir_op_uge:
|
2019-06-20 16:26:19 -05:00
|
|
|
|
case nir_op_ult:
|
|
|
|
|
|
span = eval_const_binop(nir_op_isub, bit_size, limit, initial);
|
|
|
|
|
|
iter = eval_const_binop(nir_op_udiv, bit_size, span, step);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
2019-06-20 16:26:19 -05:00
|
|
|
|
|
2018-10-19 11:14:47 -05:00
|
|
|
|
case nir_op_fge:
|
|
|
|
|
|
case nir_op_flt:
|
|
|
|
|
|
case nir_op_feq:
|
2019-06-20 16:26:19 -05:00
|
|
|
|
case nir_op_fne:
|
|
|
|
|
|
span = eval_const_binop(nir_op_fsub, bit_size, limit, initial);
|
|
|
|
|
|
iter = eval_const_binop(nir_op_fdiv, bit_size, span, step);
|
|
|
|
|
|
iter = eval_const_unop(nir_op_f2i64, bit_size, iter);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
2019-06-20 16:26:19 -05:00
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
default:
|
|
|
|
|
|
return -1;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-20 16:26:19 -05:00
|
|
|
|
uint64_t iter_u64 = nir_const_value_as_uint(iter, bit_size);
|
|
|
|
|
|
return iter_u64 > INT_MAX ? -1 : (int)iter_u64;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
2019-08-20 18:48:33 +03:00
|
|
|
|
static bool
|
|
|
|
|
|
will_break_on_first_iteration(nir_const_value step,
|
|
|
|
|
|
nir_alu_type induction_base_type,
|
|
|
|
|
|
unsigned trip_offset,
|
|
|
|
|
|
nir_op cond_op, unsigned bit_size,
|
|
|
|
|
|
nir_const_value initial,
|
|
|
|
|
|
nir_const_value limit,
|
|
|
|
|
|
bool limit_rhs, bool invert_cond)
|
|
|
|
|
|
{
|
|
|
|
|
|
if (trip_offset == 1) {
|
|
|
|
|
|
nir_op add_op;
|
|
|
|
|
|
switch (induction_base_type) {
|
|
|
|
|
|
case nir_type_float:
|
|
|
|
|
|
add_op = nir_op_fadd;
|
|
|
|
|
|
break;
|
|
|
|
|
|
case nir_type_int:
|
|
|
|
|
|
case nir_type_uint:
|
|
|
|
|
|
add_op = nir_op_iadd;
|
|
|
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
|
|
|
unreachable("Unhandled induction variable base type!");
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
initial = eval_const_binop(add_op, bit_size, initial, step);
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
nir_const_value *src[2];
|
|
|
|
|
|
src[limit_rhs ? 0 : 1] = &initial;
|
|
|
|
|
|
src[limit_rhs ? 1 : 0] = &limit;
|
|
|
|
|
|
|
|
|
|
|
|
/* Evaluate the loop exit condition */
|
|
|
|
|
|
nir_const_value result;
|
|
|
|
|
|
nir_eval_const_opcode(cond_op, &result, 1, bit_size, src);
|
|
|
|
|
|
|
|
|
|
|
|
return invert_cond ? !result.b : result.b;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
static bool
|
2019-06-24 20:27:26 -05:00
|
|
|
|
test_iterations(int32_t iter_int, nir_const_value step,
|
|
|
|
|
|
nir_const_value limit, nir_op cond_op, unsigned bit_size,
|
2016-12-13 14:39:51 +11:00
|
|
|
|
nir_alu_type induction_base_type,
|
2019-06-24 20:27:26 -05:00
|
|
|
|
nir_const_value initial, bool limit_rhs, bool invert_cond)
|
2016-12-13 14:39:51 +11:00
|
|
|
|
{
|
|
|
|
|
|
assert(nir_op_infos[cond_op].num_inputs == 2);
|
|
|
|
|
|
|
2019-06-20 16:26:19 -05:00
|
|
|
|
nir_const_value iter_src;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
nir_op mul_op;
|
|
|
|
|
|
nir_op add_op;
|
|
|
|
|
|
switch (induction_base_type) {
|
|
|
|
|
|
case nir_type_float:
|
2019-06-20 16:26:19 -05:00
|
|
|
|
iter_src = nir_const_value_for_float(iter_int, bit_size);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
mul_op = nir_op_fmul;
|
|
|
|
|
|
add_op = nir_op_fadd;
|
|
|
|
|
|
break;
|
|
|
|
|
|
case nir_type_int:
|
|
|
|
|
|
case nir_type_uint:
|
2019-06-20 16:26:19 -05:00
|
|
|
|
iter_src = nir_const_value_for_int(iter_int, bit_size);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
mul_op = nir_op_imul;
|
|
|
|
|
|
add_op = nir_op_iadd;
|
|
|
|
|
|
break;
|
|
|
|
|
|
default:
|
|
|
|
|
|
unreachable("Unhandled induction variable base type!");
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Multiple the iteration count we are testing by the number of times we
|
|
|
|
|
|
* step the induction variable each iteration.
|
|
|
|
|
|
*/
|
2019-06-20 16:29:30 -05:00
|
|
|
|
nir_const_value mul_result =
|
2019-06-24 20:27:26 -05:00
|
|
|
|
eval_const_binop(mul_op, bit_size, iter_src, step);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
/* Add the initial value to the accumulated induction variable total */
|
2019-06-20 16:29:30 -05:00
|
|
|
|
nir_const_value add_result =
|
2019-06-24 20:27:26 -05:00
|
|
|
|
eval_const_binop(add_op, bit_size, mul_result, initial);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-03-27 00:59:03 +01:00
|
|
|
|
nir_const_value *src[2];
|
|
|
|
|
|
src[limit_rhs ? 0 : 1] = &add_result;
|
2019-06-24 20:27:26 -05:00
|
|
|
|
src[limit_rhs ? 1 : 0] = &limit;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
/* Evaluate the loop exit condition */
|
2019-03-27 00:59:03 +01:00
|
|
|
|
nir_const_value result;
|
|
|
|
|
|
nir_eval_const_opcode(cond_op, &result, 1, bit_size, src);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-03-27 00:59:03 +01:00
|
|
|
|
return invert_cond ? !result.b : result.b;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
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static int
|
2019-06-24 20:27:26 -05:00
|
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calculate_iterations(nir_const_value initial, nir_const_value step,
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nir_const_value limit, nir_alu_instr *alu,
|
2019-06-21 09:18:16 -05:00
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nir_ssa_scalar cond, nir_op alu_op, bool limit_rhs,
|
2018-12-06 15:56:55 +11:00
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bool invert_cond)
|
2016-12-13 14:39:51 +11:00
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{
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/* nir_op_isub should have been lowered away by this point */
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|
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assert(alu->op != nir_op_isub);
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/* Make sure the alu type for our induction variable is compatible with the
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* conditional alus input type. If its not something has gone really wrong.
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*/
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nir_alu_type induction_base_type =
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nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type);
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if (induction_base_type == nir_type_int || induction_base_type == nir_type_uint) {
|
2018-12-06 15:56:55 +11:00
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assert(nir_alu_type_get_base_type(nir_op_infos[alu_op].input_types[1]) == nir_type_int ||
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nir_alu_type_get_base_type(nir_op_infos[alu_op].input_types[1]) == nir_type_uint);
|
2016-12-13 14:39:51 +11:00
|
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|
|
} else {
|
2018-12-06 15:56:55 +11:00
|
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|
assert(nir_alu_type_get_base_type(nir_op_infos[alu_op].input_types[0]) ==
|
2016-12-13 14:39:51 +11:00
|
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|
induction_base_type);
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|
}
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/* Check for nsupported alu operations */
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if (alu->op != nir_op_iadd && alu->op != nir_op_fadd)
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return -1;
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|
/* do-while loops can increment the starting value before the condition is
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* checked. e.g.
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*
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* do {
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* ndx++;
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* } while (ndx < 3);
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*
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* Here we check if the induction variable is used directly by the loop
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* condition and if so we assume we need to step the initial value.
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*/
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unsigned trip_offset = 0;
|
2019-06-21 09:18:16 -05:00
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nir_alu_instr *cond_alu = nir_instr_as_alu(cond.def->parent_instr);
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if (cond_alu->src[0].src.ssa == &alu->dest.dest.ssa ||
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cond_alu->src[1].src.ssa == &alu->dest.dest.ssa) {
|
2016-12-13 14:39:51 +11:00
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|
trip_offset = 1;
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}
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|
2019-06-20 16:26:19 -05:00
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assert(nir_src_bit_size(alu->src[0].src) ==
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nir_src_bit_size(alu->src[1].src));
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unsigned bit_size = nir_src_bit_size(alu->src[0].src);
|
2019-08-20 18:48:33 +03:00
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/* get_iteration works under assumption that iterator will be
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* incremented or decremented until it hits the limit,
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* however if the loop condition is false on the first iteration
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* get_iteration's assumption is broken. Handle such loops first.
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*/
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if (will_break_on_first_iteration(step, induction_base_type, trip_offset,
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alu_op, bit_size, initial,
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limit, limit_rhs, invert_cond)) {
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return 0;
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}
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|
2019-06-24 20:27:26 -05:00
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int iter_int = get_iteration(alu_op, initial, step, limit, bit_size);
|
2016-12-13 14:39:51 +11:00
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/* If iter_int is negative the loop is ill-formed or is the conditional is
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* unsigned with a huge iteration count so don't bother going any further.
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*/
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if (iter_int < 0)
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return -1;
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|
/* An explanation from the GLSL unrolling pass:
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|
*
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|
* Make sure that the calculated number of iterations satisfies the exit
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* condition. This is needed to catch off-by-one errors and some types of
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* ill-formed loops. For example, we need to detect that the following
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* loop does not have a maximum iteration count.
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*
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|
* for (float x = 0.0; x != 0.9; x += 0.2);
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|
*/
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|
for (int bias = -1; bias <= 1; bias++) {
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|
const int iter_bias = iter_int + bias;
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|
|
|
2018-12-06 15:56:55 +11:00
|
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|
if (test_iterations(iter_bias, step, limit, alu_op, bit_size,
|
2016-12-13 14:39:51 +11:00
|
|
|
|
induction_base_type, initial,
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|
|
|
limit_rhs, invert_cond)) {
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|
return iter_bias > 0 ? iter_bias - trip_offset : iter_bias;
|
|
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|
}
|
|
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|
}
|
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|
return -1;
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|
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|
|
|
}
|
|
|
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|
|
|
2018-12-06 11:17:45 +11:00
|
|
|
|
static nir_op
|
2019-06-21 09:18:16 -05:00
|
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|
|
inverse_comparison(nir_op alu_op)
|
2018-12-06 11:17:45 +11:00
|
|
|
|
{
|
2019-06-21 09:18:16 -05:00
|
|
|
|
switch (alu_op) {
|
2018-12-06 11:17:45 +11:00
|
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|
|
case nir_op_fge:
|
|
|
|
|
|
return nir_op_flt;
|
|
|
|
|
|
case nir_op_ige:
|
|
|
|
|
|
return nir_op_ilt;
|
|
|
|
|
|
case nir_op_uge:
|
|
|
|
|
|
return nir_op_ult;
|
|
|
|
|
|
case nir_op_flt:
|
|
|
|
|
|
return nir_op_fge;
|
|
|
|
|
|
case nir_op_ilt:
|
|
|
|
|
|
return nir_op_ige;
|
|
|
|
|
|
case nir_op_ult:
|
|
|
|
|
|
return nir_op_uge;
|
|
|
|
|
|
case nir_op_feq:
|
|
|
|
|
|
return nir_op_fne;
|
|
|
|
|
|
case nir_op_ieq:
|
|
|
|
|
|
return nir_op_ine;
|
|
|
|
|
|
case nir_op_fne:
|
|
|
|
|
|
return nir_op_feq;
|
|
|
|
|
|
case nir_op_ine:
|
|
|
|
|
|
return nir_op_ieq;
|
|
|
|
|
|
default:
|
|
|
|
|
|
unreachable("Unsuported comparison!");
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
static bool
|
2019-06-21 09:18:16 -05:00
|
|
|
|
is_supported_terminator_condition(nir_ssa_scalar cond)
|
2018-12-06 11:12:12 +11:00
|
|
|
|
{
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_alu(cond))
|
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
|
|
nir_alu_instr *alu = nir_instr_as_alu(cond.def->parent_instr);
|
2018-12-06 11:12:12 +11:00
|
|
|
|
return nir_alu_instr_is_comparison(alu) &&
|
|
|
|
|
|
nir_op_infos[alu->op].num_inputs == 2;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-12-06 13:29:05 +11:00
|
|
|
|
static bool
|
2019-06-21 09:18:16 -05:00
|
|
|
|
get_induction_and_limit_vars(nir_ssa_scalar cond,
|
|
|
|
|
|
nir_ssa_scalar *ind,
|
|
|
|
|
|
nir_ssa_scalar *limit,
|
2019-06-24 17:33:02 -05:00
|
|
|
|
bool *limit_rhs,
|
2018-12-06 13:29:05 +11:00
|
|
|
|
loop_info_state *state)
|
|
|
|
|
|
{
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar rhs, lhs;
|
|
|
|
|
|
lhs = nir_ssa_scalar_chase_alu_src(cond, 0);
|
|
|
|
|
|
rhs = nir_ssa_scalar_chase_alu_src(cond, 1);
|
2019-06-24 17:33:02 -05:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (get_loop_var(lhs.def, state)->type == basic_induction) {
|
2019-06-24 17:33:02 -05:00
|
|
|
|
*ind = lhs;
|
|
|
|
|
|
*limit = rhs;
|
|
|
|
|
|
*limit_rhs = true;
|
|
|
|
|
|
return true;
|
2019-06-21 09:18:16 -05:00
|
|
|
|
} else if (get_loop_var(rhs.def, state)->type == basic_induction) {
|
2019-06-24 17:33:02 -05:00
|
|
|
|
*ind = rhs;
|
|
|
|
|
|
*limit = lhs;
|
|
|
|
|
|
*limit_rhs = false;
|
|
|
|
|
|
return true;
|
|
|
|
|
|
} else {
|
|
|
|
|
|
return false;
|
2018-12-06 13:29:05 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-24 17:33:02 -05:00
|
|
|
|
static bool
|
2019-06-21 09:18:16 -05:00
|
|
|
|
try_find_trip_count_vars_in_iand(nir_ssa_scalar *cond,
|
|
|
|
|
|
nir_ssa_scalar *ind,
|
|
|
|
|
|
nir_ssa_scalar *limit,
|
2018-12-06 16:00:40 +11:00
|
|
|
|
bool *limit_rhs,
|
|
|
|
|
|
loop_info_state *state)
|
|
|
|
|
|
{
|
2019-06-21 09:18:16 -05:00
|
|
|
|
const nir_op alu_op = nir_ssa_scalar_alu_op(*cond);
|
|
|
|
|
|
assert(alu_op == nir_op_ieq || alu_op == nir_op_inot);
|
2018-12-06 16:00:40 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar iand = nir_ssa_scalar_chase_alu_src(*cond, 0);
|
2018-12-06 16:00:40 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (alu_op == nir_op_ieq) {
|
|
|
|
|
|
nir_ssa_scalar zero = nir_ssa_scalar_chase_alu_src(*cond, 1);
|
2018-12-06 16:00:40 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_alu(iand) || !nir_ssa_scalar_is_const(zero)) {
|
2018-12-06 16:00:40 +11:00
|
|
|
|
/* Maybe we had it the wrong way, flip things around */
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar tmp = zero;
|
|
|
|
|
|
zero = iand;
|
|
|
|
|
|
iand = tmp;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
|
|
|
|
|
|
/* If we still didn't find what we need then return */
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_const(zero))
|
2019-06-24 17:33:02 -05:00
|
|
|
|
return false;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* If the loop is not breaking on (x && y) == 0 then return */
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (nir_ssa_scalar_as_uint(zero) != 0)
|
2019-06-24 17:33:02 -05:00
|
|
|
|
return false;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_alu(iand))
|
2019-06-24 17:33:02 -05:00
|
|
|
|
return false;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (nir_ssa_scalar_alu_op(iand) != nir_op_iand)
|
2019-06-24 17:33:02 -05:00
|
|
|
|
return false;
|
2019-06-24 16:21:07 -05:00
|
|
|
|
|
2018-12-06 16:00:40 +11:00
|
|
|
|
/* Check if iand src is a terminator condition and try get induction var
|
|
|
|
|
|
* and trip limit var.
|
|
|
|
|
|
*/
|
2019-06-24 17:33:02 -05:00
|
|
|
|
bool found_induction_var = false;
|
|
|
|
|
|
for (unsigned i = 0; i < 2; i++) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar src = nir_ssa_scalar_chase_alu_src(iand, i);
|
|
|
|
|
|
if (is_supported_terminator_condition(src) &&
|
|
|
|
|
|
get_induction_and_limit_vars(src, ind, limit, limit_rhs, state)) {
|
|
|
|
|
|
*cond = src;
|
|
|
|
|
|
found_induction_var = true;
|
|
|
|
|
|
|
|
|
|
|
|
/* If we've found one with a constant limit, stop. */
|
|
|
|
|
|
if (nir_ssa_scalar_is_const(*limit))
|
|
|
|
|
|
return true;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
2019-06-24 17:33:02 -05:00
|
|
|
|
|
|
|
|
|
|
return found_induction_var;
|
2018-12-06 16:00:40 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
/* Run through each of the terminators of the loop and try to infer a possible
|
|
|
|
|
|
* trip-count. We need to check them all, and set the lowest trip-count as the
|
|
|
|
|
|
* trip-count of our loop. If one of the terminators has an undecidable
|
|
|
|
|
|
* trip-count we can not safely assume anything about the duration of the
|
|
|
|
|
|
* loop.
|
|
|
|
|
|
*/
|
|
|
|
|
|
static void
|
|
|
|
|
|
find_trip_count(loop_info_state *state)
|
|
|
|
|
|
{
|
|
|
|
|
|
bool trip_count_known = true;
|
2018-11-15 23:23:09 +11:00
|
|
|
|
bool guessed_trip_count = false;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
nir_loop_terminator *limiting_terminator = NULL;
|
2018-11-20 11:35:37 +11:00
|
|
|
|
int max_trip_count = -1;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
|
|
|
|
|
list_for_each_entry(nir_loop_terminator, terminator,
|
|
|
|
|
|
&state->loop->info->loop_terminator_list,
|
|
|
|
|
|
loop_terminator_link) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
assert(terminator->nif->condition.is_ssa);
|
|
|
|
|
|
nir_ssa_scalar cond = { terminator->nif->condition.ssa, 0 };
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!nir_ssa_scalar_is_alu(cond)) {
|
2016-12-13 14:39:51 +11:00
|
|
|
|
/* If we get here the loop is dead and will get cleaned up by the
|
|
|
|
|
|
* nir_opt_dead_cf pass.
|
|
|
|
|
|
*/
|
|
|
|
|
|
trip_count_known = false;
|
|
|
|
|
|
continue;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_op alu_op = nir_ssa_scalar_alu_op(cond);
|
2018-12-06 15:56:55 +11:00
|
|
|
|
|
2018-12-06 16:00:40 +11:00
|
|
|
|
bool limit_rhs;
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_ssa_scalar basic_ind = { NULL, 0 };
|
|
|
|
|
|
nir_ssa_scalar limit;
|
|
|
|
|
|
if ((alu_op == nir_op_inot || alu_op == nir_op_ieq) &&
|
|
|
|
|
|
try_find_trip_count_vars_in_iand(&cond, &basic_ind, &limit,
|
2019-06-24 17:33:02 -05:00
|
|
|
|
&limit_rhs, state)) {
|
2019-06-21 09:18:16 -05:00
|
|
|
|
|
2018-12-06 16:00:40 +11:00
|
|
|
|
/* The loop is exiting on (x && y) == 0 so we need to get the
|
|
|
|
|
|
* inverse of x or y (i.e. which ever contained the induction var) in
|
|
|
|
|
|
* order to compute the trip count.
|
|
|
|
|
|
*/
|
2019-06-21 09:18:16 -05:00
|
|
|
|
alu_op = inverse_comparison(nir_ssa_scalar_alu_op(cond));
|
2019-06-24 17:33:02 -05:00
|
|
|
|
trip_count_known = false;
|
|
|
|
|
|
terminator->exact_trip_count_unknown = true;
|
2018-12-06 11:12:12 +11:00
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!basic_ind.def) {
|
|
|
|
|
|
if (is_supported_terminator_condition(cond)) {
|
|
|
|
|
|
get_induction_and_limit_vars(cond, &basic_ind,
|
2019-06-24 17:33:02 -05:00
|
|
|
|
&limit, &limit_rhs, state);
|
2018-12-06 16:00:40 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
2018-12-06 11:12:12 +11:00
|
|
|
|
|
|
|
|
|
|
/* The comparison has to have a basic induction variable for us to be
|
|
|
|
|
|
* able to find trip counts.
|
|
|
|
|
|
*/
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (!basic_ind.def) {
|
2018-12-06 11:12:12 +11:00
|
|
|
|
trip_count_known = false;
|
|
|
|
|
|
continue;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-12-06 16:00:40 +11:00
|
|
|
|
terminator->induction_rhs = !limit_rhs;
|
|
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
/* Attempt to find a constant limit for the loop */
|
|
|
|
|
|
nir_const_value limit_val;
|
2019-06-21 09:18:16 -05:00
|
|
|
|
if (nir_ssa_scalar_is_const(limit)) {
|
|
|
|
|
|
limit_val = nir_ssa_scalar_as_const_value(limit);
|
2018-12-06 11:12:12 +11:00
|
|
|
|
} else {
|
|
|
|
|
|
trip_count_known = false;
|
2018-11-15 23:23:09 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
if (!try_find_limit_of_alu(limit, &limit_val, terminator, state)) {
|
|
|
|
|
|
/* Guess loop limit based on array access */
|
|
|
|
|
|
if (!guess_loop_limit(state, &limit_val, basic_ind)) {
|
|
|
|
|
|
continue;
|
2018-11-20 13:45:58 +11:00
|
|
|
|
}
|
2018-11-15 23:23:09 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
guessed_trip_count = true;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
/* We have determined that we have the following constants:
|
|
|
|
|
|
* (With the typical int i = 0; i < x; i++; as an example)
|
|
|
|
|
|
* - Upper limit.
|
|
|
|
|
|
* - Starting value
|
|
|
|
|
|
* - Step / iteration size
|
|
|
|
|
|
* Thats all thats needed to calculate the trip-count
|
|
|
|
|
|
*/
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
nir_basic_induction_var *ind_var =
|
|
|
|
|
|
get_loop_var(basic_ind.def, state)->ind;
|
|
|
|
|
|
|
|
|
|
|
|
/* The basic induction var might be a vector but, because we guarantee
|
|
|
|
|
|
* earlier that the phi source has a scalar swizzle, we can take the
|
|
|
|
|
|
* component from basic_ind.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_ssa_scalar initial_s = { ind_var->def_outside_loop, basic_ind.comp };
|
|
|
|
|
|
nir_ssa_scalar alu_s = { &ind_var->alu->dest.dest.ssa, basic_ind.comp };
|
|
|
|
|
|
|
|
|
|
|
|
nir_const_value initial_val = nir_ssa_scalar_as_const_value(initial_s);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-06-21 09:18:16 -05:00
|
|
|
|
/* We are guaranteed by earlier code that at least one of these sources
|
|
|
|
|
|
* is a constant but we don't know which.
|
|
|
|
|
|
*/
|
|
|
|
|
|
nir_const_value step_val;
|
|
|
|
|
|
memset(&step_val, 0, sizeof(step_val));
|
|
|
|
|
|
UNUSED bool found_step_value = false;
|
|
|
|
|
|
assert(nir_op_infos[ind_var->alu->op].num_inputs == 2);
|
|
|
|
|
|
for (unsigned i = 0; i < 2; i++) {
|
|
|
|
|
|
nir_ssa_scalar alu_src = nir_ssa_scalar_chase_alu_src(alu_s, i);
|
|
|
|
|
|
if (nir_ssa_scalar_is_const(alu_src)) {
|
|
|
|
|
|
found_step_value = true;
|
|
|
|
|
|
step_val = nir_ssa_scalar_as_const_value(alu_src);
|
|
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
assert(found_step_value);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2019-06-24 20:27:26 -05:00
|
|
|
|
int iterations = calculate_iterations(initial_val, step_val, limit_val,
|
2019-06-21 09:18:16 -05:00
|
|
|
|
ind_var->alu, cond,
|
2018-12-06 15:56:55 +11:00
|
|
|
|
alu_op, limit_rhs,
|
2018-12-06 11:12:12 +11:00
|
|
|
|
terminator->continue_from_then);
|
2018-11-15 23:23:09 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
/* Where we not able to calculate the iteration count */
|
|
|
|
|
|
if (iterations == -1) {
|
|
|
|
|
|
trip_count_known = false;
|
|
|
|
|
|
guessed_trip_count = false;
|
|
|
|
|
|
continue;
|
|
|
|
|
|
}
|
2018-11-15 23:23:09 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
if (guessed_trip_count) {
|
|
|
|
|
|
guessed_trip_count = false;
|
|
|
|
|
|
if (state->loop->info->guessed_trip_count == 0 ||
|
|
|
|
|
|
state->loop->info->guessed_trip_count > iterations)
|
|
|
|
|
|
state->loop->info->guessed_trip_count = iterations;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
continue;
|
|
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
|
2018-12-06 11:12:12 +11:00
|
|
|
|
/* If this is the first run or we have found a smaller amount of
|
|
|
|
|
|
* iterations than previously (we have identified a more limiting
|
|
|
|
|
|
* terminator) set the trip count and limiting terminator.
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (max_trip_count == -1 || iterations < max_trip_count) {
|
|
|
|
|
|
max_trip_count = iterations;
|
|
|
|
|
|
limiting_terminator = terminator;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-11-20 11:35:37 +11:00
|
|
|
|
state->loop->info->exact_trip_count_known = trip_count_known;
|
|
|
|
|
|
if (max_trip_count > -1)
|
|
|
|
|
|
state->loop->info->max_trip_count = max_trip_count;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
state->loop->info->limiting_terminator = limiting_terminator;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-03-26 15:21:36 -07:00
|
|
|
|
static bool
|
2018-11-15 20:40:08 +11:00
|
|
|
|
force_unroll_array_access(loop_info_state *state, nir_deref_instr *deref)
|
2018-03-26 15:21:36 -07:00
|
|
|
|
{
|
2018-11-15 21:28:31 +11:00
|
|
|
|
unsigned array_size = find_array_access_via_induction(state, deref, NULL);
|
|
|
|
|
|
if (array_size) {
|
|
|
|
|
|
if (array_size == state->loop->info->max_trip_count)
|
2018-03-26 15:21:36 -07:00
|
|
|
|
return true;
|
|
|
|
|
|
|
2018-11-15 20:40:08 +11:00
|
|
|
|
if (deref->mode & state->indirect_mask)
|
2018-03-26 15:21:36 -07:00
|
|
|
|
return true;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
static bool
|
2018-11-15 20:40:08 +11:00
|
|
|
|
force_unroll_heuristics(loop_info_state *state, nir_block *block)
|
2016-12-13 14:39:51 +11:00
|
|
|
|
{
|
|
|
|
|
|
nir_foreach_instr(instr, block) {
|
|
|
|
|
|
if (instr->type != nir_instr_type_intrinsic)
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
|
|
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
|
|
|
|
|
|
|
|
|
|
|
|
/* Check for arrays variably-indexed by a loop induction variable.
|
|
|
|
|
|
* Unrolling the loop may convert that access into constant-indexing.
|
|
|
|
|
|
*/
|
2018-03-26 15:21:36 -07:00
|
|
|
|
if (intrin->intrinsic == nir_intrinsic_load_deref ||
|
|
|
|
|
|
intrin->intrinsic == nir_intrinsic_store_deref ||
|
|
|
|
|
|
intrin->intrinsic == nir_intrinsic_copy_deref) {
|
2018-11-15 20:40:08 +11:00
|
|
|
|
if (force_unroll_array_access(state,
|
2018-03-26 15:21:36 -07:00
|
|
|
|
nir_src_as_deref(intrin->src[0])))
|
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
|
|
if (intrin->intrinsic == nir_intrinsic_copy_deref &&
|
2018-11-15 20:40:08 +11:00
|
|
|
|
force_unroll_array_access(state,
|
2018-03-26 15:21:36 -07:00
|
|
|
|
nir_src_as_deref(intrin->src[1])))
|
|
|
|
|
|
return true;
|
|
|
|
|
|
}
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
|
get_loop_info(loop_info_state *state, nir_function_impl *impl)
|
|
|
|
|
|
{
|
2019-03-03 09:24:12 -06:00
|
|
|
|
nir_shader *shader = impl->function->shader;
|
|
|
|
|
|
const nir_shader_compiler_options *options = shader->options;
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
/* Initialize all variables to "outside_loop". This also marks defs
|
2017-02-27 17:21:42 -08:00
|
|
|
|
* invariant and constant if they are nir_instr_type_load_consts
|
2016-12-13 14:39:51 +11:00
|
|
|
|
*/
|
|
|
|
|
|
nir_foreach_block(block, impl) {
|
|
|
|
|
|
nir_foreach_instr(instr, block)
|
|
|
|
|
|
nir_foreach_ssa_def(instr, initialize_ssa_def, state);
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Add all entries in the outermost part of the loop to the processing list
|
|
|
|
|
|
* Mark the entries in conditionals or in nested loops accordingly
|
|
|
|
|
|
*/
|
|
|
|
|
|
foreach_list_typed_safe(nir_cf_node, node, node, &state->loop->body) {
|
|
|
|
|
|
switch (node->type) {
|
|
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_block:
|
2019-03-03 09:24:12 -06:00
|
|
|
|
init_loop_block(nir_cf_node_as_block(node), state,
|
|
|
|
|
|
false, false, options);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_if:
|
|
|
|
|
|
nir_foreach_block_in_cf_node(block, node)
|
2019-03-03 09:24:12 -06:00
|
|
|
|
init_loop_block(block, state, true, false, options);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_loop:
|
|
|
|
|
|
nir_foreach_block_in_cf_node(block, node) {
|
2019-03-03 09:24:12 -06:00
|
|
|
|
init_loop_block(block, state, false, true, options);
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_function:
|
|
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Try to find all simple terminators of the loop. If we can't find any,
|
|
|
|
|
|
* or we find possible terminators that have side effects then bail.
|
|
|
|
|
|
*/
|
|
|
|
|
|
if (!find_loop_terminators(state)) {
|
|
|
|
|
|
list_for_each_entry_safe(nir_loop_terminator, terminator,
|
|
|
|
|
|
&state->loop->info->loop_terminator_list,
|
|
|
|
|
|
loop_terminator_link) {
|
|
|
|
|
|
list_del(&terminator->loop_terminator_link);
|
|
|
|
|
|
ralloc_free(terminator);
|
|
|
|
|
|
}
|
|
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
2018-07-07 12:02:08 +10:00
|
|
|
|
/* Induction analysis needs invariance information so get that first */
|
|
|
|
|
|
compute_invariance_information(state);
|
|
|
|
|
|
|
|
|
|
|
|
/* We have invariance information so try to find induction variables */
|
|
|
|
|
|
if (!compute_induction_information(state))
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
2016-12-13 14:39:51 +11:00
|
|
|
|
/* Run through each of the terminators and try to compute a trip-count */
|
|
|
|
|
|
find_trip_count(state);
|
|
|
|
|
|
|
2018-11-15 20:40:08 +11:00
|
|
|
|
nir_foreach_block_in_cf_node(block, &state->loop->cf_node) {
|
|
|
|
|
|
if (force_unroll_heuristics(state, block)) {
|
|
|
|
|
|
state->loop->info->force_unroll = true;
|
|
|
|
|
|
break;
|
2016-12-13 14:39:51 +11:00
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static loop_info_state *
|
|
|
|
|
|
initialize_loop_info_state(nir_loop *loop, void *mem_ctx,
|
|
|
|
|
|
nir_function_impl *impl)
|
|
|
|
|
|
{
|
|
|
|
|
|
loop_info_state *state = rzalloc(mem_ctx, loop_info_state);
|
|
|
|
|
|
state->loop_vars = rzalloc_array(mem_ctx, nir_loop_variable,
|
|
|
|
|
|
impl->ssa_alloc);
|
|
|
|
|
|
state->loop = loop;
|
|
|
|
|
|
|
|
|
|
|
|
list_inithead(&state->process_list);
|
|
|
|
|
|
|
|
|
|
|
|
if (loop->info)
|
|
|
|
|
|
ralloc_free(loop->info);
|
|
|
|
|
|
|
|
|
|
|
|
loop->info = rzalloc(loop, nir_loop_info);
|
|
|
|
|
|
|
|
|
|
|
|
list_inithead(&loop->info->loop_terminator_list);
|
|
|
|
|
|
|
|
|
|
|
|
return state;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
|
process_loops(nir_cf_node *cf_node, nir_variable_mode indirect_mask)
|
|
|
|
|
|
{
|
|
|
|
|
|
switch (cf_node->type) {
|
|
|
|
|
|
case nir_cf_node_block:
|
|
|
|
|
|
return;
|
|
|
|
|
|
case nir_cf_node_if: {
|
|
|
|
|
|
nir_if *if_stmt = nir_cf_node_as_if(cf_node);
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list)
|
|
|
|
|
|
process_loops(nested_node, indirect_mask);
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list)
|
|
|
|
|
|
process_loops(nested_node, indirect_mask);
|
|
|
|
|
|
return;
|
|
|
|
|
|
}
|
|
|
|
|
|
case nir_cf_node_loop: {
|
|
|
|
|
|
nir_loop *loop = nir_cf_node_as_loop(cf_node);
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, nested_node, node, &loop->body)
|
|
|
|
|
|
process_loops(nested_node, indirect_mask);
|
|
|
|
|
|
break;
|
|
|
|
|
|
}
|
|
|
|
|
|
default:
|
|
|
|
|
|
unreachable("unknown cf node type");
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
nir_loop *loop = nir_cf_node_as_loop(cf_node);
|
|
|
|
|
|
nir_function_impl *impl = nir_cf_node_get_function(cf_node);
|
|
|
|
|
|
void *mem_ctx = ralloc_context(NULL);
|
|
|
|
|
|
|
|
|
|
|
|
loop_info_state *state = initialize_loop_info_state(loop, mem_ctx, impl);
|
|
|
|
|
|
state->indirect_mask = indirect_mask;
|
|
|
|
|
|
|
|
|
|
|
|
get_loop_info(state, impl);
|
|
|
|
|
|
|
|
|
|
|
|
ralloc_free(mem_ctx);
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
|
nir_loop_analyze_impl(nir_function_impl *impl,
|
|
|
|
|
|
nir_variable_mode indirect_mask)
|
|
|
|
|
|
{
|
|
|
|
|
|
nir_index_ssa_defs(impl);
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, node, node, &impl->body)
|
|
|
|
|
|
process_loops(node, indirect_mask);
|
|
|
|
|
|
}
|