2019-11-04 17:27:18 -05:00
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/*
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2024-01-08 22:19:00 -04:00
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* Copyright 2024 Valve Corporation
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* Copyright 2019 Collabora, Ltd.
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* SPDX-License-Identifier: MIT
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2019-11-04 17:27:18 -05:00
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/*
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2024-01-08 22:19:00 -04:00
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* Lowers SSBOs to global memory. SSBO base addresses are passed via
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* load_ssbo_address. Run nir_lower_robust_access first for bounds checks.
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2019-11-04 17:27:18 -05:00
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*/
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2023-08-12 16:17:15 -04:00
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static nir_def *
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2024-01-08 22:19:00 -04:00
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calc_address(nir_builder *b, nir_intrinsic_instr *intr)
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2019-11-04 17:27:18 -05:00
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{
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2024-01-08 22:19:00 -04:00
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unsigned index_src = intr->intrinsic == nir_intrinsic_store_ssbo ? 1 : 0;
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nir_def *base = nir_load_ssbo_address(b, 1, 64, intr->src[index_src].ssa);
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2019-11-04 17:27:18 -05:00
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2024-01-08 22:19:00 -04:00
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return nir_iadd(b, base, nir_u2u64(b, nir_get_io_offset_src(intr)->ssa));
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2019-11-04 17:27:18 -05:00
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}
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static bool
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2024-01-08 22:19:00 -04:00
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pass(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data)
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2019-11-04 17:27:18 -05:00
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{
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2024-01-08 22:19:00 -04:00
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b->cursor = nir_before_instr(&intr->instr);
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2019-11-04 17:27:18 -05:00
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2024-01-08 22:19:00 -04:00
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nir_def *def = NULL;
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2019-11-04 17:27:18 -05:00
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switch (intr->intrinsic) {
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case nir_intrinsic_load_ssbo:
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2024-01-08 22:19:00 -04:00
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def = nir_build_load_global(b, intr->def.num_components,
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intr->def.bit_size, calc_address(b, intr),
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.align_mul = nir_intrinsic_align_mul(intr),
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.align_offset = nir_intrinsic_align_offset(intr));
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break;
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2019-11-04 17:27:18 -05:00
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case nir_intrinsic_store_ssbo:
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2024-01-08 22:19:00 -04:00
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nir_build_store_global(b, intr->src[0].ssa, calc_address(b, intr),
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.align_mul = nir_intrinsic_align_mul(intr),
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.align_offset = nir_intrinsic_align_offset(intr),
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.write_mask = nir_intrinsic_write_mask(intr));
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break;
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2023-05-12 10:54:05 -04:00
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case nir_intrinsic_ssbo_atomic:
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2024-01-08 22:19:00 -04:00
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def = nir_global_atomic(b, intr->def.bit_size, calc_address(b, intr),
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intr->src[2].ssa,
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.atomic_op = nir_intrinsic_atomic_op(intr));
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break;
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2023-05-12 10:54:05 -04:00
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case nir_intrinsic_ssbo_atomic_swap:
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2024-01-08 22:19:00 -04:00
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def = nir_global_atomic_swap(b, intr->def.bit_size, calc_address(b, intr),
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intr->src[2].ssa, intr->src[3].ssa,
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.atomic_op = nir_intrinsic_atomic_op(intr));
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break;
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2019-11-04 17:27:18 -05:00
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default:
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return false;
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}
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2024-01-08 22:19:00 -04:00
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if (def)
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nir_def_rewrite_uses(&intr->def, def);
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nir_instr_remove(&intr->instr);
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return true;
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2019-11-04 17:27:18 -05:00
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}
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bool
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nir_lower_ssbo(nir_shader *shader)
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{
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2024-01-08 22:19:00 -04:00
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return nir_shader_intrinsics_pass(shader, pass,
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nir_metadata_dominance |
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nir_metadata_block_index,
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NULL);
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2019-11-04 17:27:18 -05:00
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}
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