2024-12-06 20:02:38 -08:00
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/*
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2024-12-06 19:48:54 -08:00
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* Copyright © 2010-2020 Intel Corporation
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2024-12-06 20:02:38 -08:00
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* SPDX-License-Identifier: MIT
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*/
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#pragma once
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#include "brw_cfg.h"
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#include "brw_inst.h"
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#include "brw_ir_analysis.h"
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2024-12-06 19:48:54 -08:00
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#include "util/bitset.h"
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struct fs_visitor;
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namespace brw {
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/**
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* Register pressure analysis of a shader. Estimates how many registers
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* are live at any point of the program in GRF units.
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*/
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struct register_pressure {
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register_pressure(const fs_visitor *v);
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~register_pressure();
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analysis_dependency_class
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dependency_class() const
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{
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return (DEPENDENCY_INSTRUCTION_IDENTITY |
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DEPENDENCY_INSTRUCTION_DATA_FLOW |
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DEPENDENCY_VARIABLES);
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}
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bool
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validate(const fs_visitor *) const
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{
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/* FINISHME */
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return true;
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}
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unsigned *regs_live_at_ip;
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};
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class def_analysis {
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public:
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def_analysis(const fs_visitor *v);
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~def_analysis();
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brw_inst *
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get(const brw_reg ®) const
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{
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return reg.file == VGRF && reg.nr < def_count ?
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def_insts[reg.nr] : NULL;
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}
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bblock_t *
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get_block(const brw_reg ®) const
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{
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return reg.file == VGRF && reg.nr < def_count ?
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def_blocks[reg.nr] : NULL;
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}
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uint32_t
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get_use_count(const brw_reg ®) const
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{
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return reg.file == VGRF && reg.nr < def_count ?
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def_use_counts[reg.nr] : 0;
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}
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unsigned count() const { return def_count; }
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unsigned ssa_count() const;
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void print_stats(const fs_visitor *) const;
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analysis_dependency_class
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dependency_class() const
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{
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return DEPENDENCY_INSTRUCTION_IDENTITY |
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DEPENDENCY_INSTRUCTION_DATA_FLOW |
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DEPENDENCY_VARIABLES |
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DEPENDENCY_BLOCKS;
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}
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bool validate(const fs_visitor *) const;
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private:
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void mark_invalid(int);
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bool fully_defines(const fs_visitor *v, brw_inst *);
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void update_for_reads(const idom_tree &idom, bblock_t *block, brw_inst *);
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void update_for_write(const fs_visitor *v, bblock_t *block, brw_inst *);
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brw_inst **def_insts;
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bblock_t **def_blocks;
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uint32_t *def_use_counts;
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unsigned def_count;
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};
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class fs_live_variables {
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public:
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struct block_data {
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/**
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* Which variables are defined before being used in the block.
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*
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* Note that for our purposes, "defined" means unconditionally, completely
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* defined.
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*/
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BITSET_WORD *def;
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/**
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* Which variables are used before being defined in the block.
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*/
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BITSET_WORD *use;
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/** Which defs reach the entry point of the block. */
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BITSET_WORD *livein;
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/** Which defs reach the exit point of the block. */
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BITSET_WORD *liveout;
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/**
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* Variables such that the entry point of the block may be reached from any
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* of their definitions.
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*/
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BITSET_WORD *defin;
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/**
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* Variables such that the exit point of the block may be reached from any
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* of their definitions.
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*/
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BITSET_WORD *defout;
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BITSET_WORD flag_def[1];
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BITSET_WORD flag_use[1];
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BITSET_WORD flag_livein[1];
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BITSET_WORD flag_liveout[1];
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};
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fs_live_variables(const fs_visitor *s);
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~fs_live_variables();
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bool validate(const fs_visitor *s) const;
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analysis_dependency_class
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dependency_class() const
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{
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return (DEPENDENCY_INSTRUCTION_IDENTITY |
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DEPENDENCY_INSTRUCTION_DATA_FLOW |
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DEPENDENCY_VARIABLES);
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}
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bool vars_interfere(int a, int b) const;
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bool vgrfs_interfere(int a, int b) const;
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int var_from_reg(const brw_reg ®) const
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{
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return var_from_vgrf[reg.nr] + reg.offset / REG_SIZE;
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}
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/** Map from virtual GRF number to index in block_data arrays. */
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int *var_from_vgrf;
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/**
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* Map from any index in block_data to the virtual GRF containing it.
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*
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* For alloc.sizes of [1, 2, 3], vgrf_from_var would contain
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* [0, 1, 1, 2, 2, 2].
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*/
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int *vgrf_from_var;
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int num_vars;
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int num_vgrfs;
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int bitset_words;
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/** @{
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* Final computed live ranges for each var (each component of each virtual
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* GRF).
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*/
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int *start;
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int *end;
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/** @} */
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/** @{
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* Final computed live ranges for each VGRF.
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*/
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int *vgrf_start;
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int *vgrf_end;
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/** @} */
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/** Per-basic-block information on live variables */
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struct block_data *block_data;
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protected:
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void setup_def_use();
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void setup_one_read(struct block_data *bd, int ip, const brw_reg ®);
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void setup_one_write(struct block_data *bd, brw_inst *inst, int ip,
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const brw_reg ®);
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void compute_live_variables();
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void compute_start_end();
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const struct intel_device_info *devinfo;
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const cfg_t *cfg;
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void *mem_ctx;
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};
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/**
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* Various estimates of the performance of a shader based on static
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* analysis.
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*/
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struct performance {
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performance(const fs_visitor *v);
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~performance();
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analysis_dependency_class
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dependency_class() const
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{
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return (DEPENDENCY_INSTRUCTIONS |
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DEPENDENCY_BLOCKS);
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}
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bool
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validate(const fs_visitor *) const
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{
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return true;
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}
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/**
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* Array containing estimates of the runtime of each basic block of the
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* program in cycle units.
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*/
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unsigned *block_latency;
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/**
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* Estimate of the runtime of the whole program in cycle units assuming
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* uncontended execution.
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*/
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unsigned latency;
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/**
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* Estimate of the throughput of the whole program in
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* invocations-per-cycle units.
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*
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* Note that this might be lower than the ratio between the dispatch
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* width of the program and its latency estimate in cases where
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* performance doesn't scale without limits as a function of its thread
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* parallelism, e.g. due to the existence of a bottleneck in a shared
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* function.
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*/
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float throughput;
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private:
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performance(const performance &perf);
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performance &
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operator=(performance u);
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};
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2024-12-06 20:02:38 -08:00
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}
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