mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 18:40:09 +01:00
This avoids using the oldest BO in the BO cache and waiting for it to be idle before we turn around and render to it with the GPU. Thanks to Chris Wilson for pointing out how silly we were being.
214 lines
5 KiB
C
214 lines
5 KiB
C
/*
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* Copyright © 2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <assert.h>
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#include <errno.h>
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#include <drm.h>
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#include <i915_drm.h>
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#include "intel_bufmgr.h"
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#include "intel_bufmgr_priv.h"
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/** @file intel_bufmgr.c
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*
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* Convenience functions for buffer management methods.
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*/
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drm_intel_bo *
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drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment)
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{
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return bufmgr->bo_alloc(bufmgr, name, size, alignment);
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}
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drm_intel_bo *
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drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment)
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{
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return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment);
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}
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void
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drm_intel_bo_reference(drm_intel_bo *bo)
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{
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bo->bufmgr->bo_reference(bo);
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}
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void
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drm_intel_bo_unreference(drm_intel_bo *bo)
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{
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if (bo == NULL)
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return;
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bo->bufmgr->bo_unreference(bo);
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}
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int
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drm_intel_bo_map(drm_intel_bo *buf, int write_enable)
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{
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return buf->bufmgr->bo_map(buf, write_enable);
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}
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int
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drm_intel_bo_unmap(drm_intel_bo *buf)
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{
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return buf->bufmgr->bo_unmap(buf);
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}
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int
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drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
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unsigned long size, const void *data)
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{
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int ret;
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if (bo->bufmgr->bo_subdata)
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return bo->bufmgr->bo_subdata(bo, offset, size, data);
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if (size == 0 || data == NULL)
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return 0;
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ret = drm_intel_bo_map(bo, 1);
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if (ret)
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return ret;
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memcpy((unsigned char *)bo->virtual + offset, data, size);
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drm_intel_bo_unmap(bo);
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return 0;
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}
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int
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drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
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unsigned long size, void *data)
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{
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int ret;
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if (bo->bufmgr->bo_subdata)
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return bo->bufmgr->bo_get_subdata(bo, offset, size, data);
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if (size == 0 || data == NULL)
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return 0;
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ret = drm_intel_bo_map(bo, 0);
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if (ret)
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return ret;
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memcpy(data, (unsigned char *)bo->virtual + offset, size);
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drm_intel_bo_unmap(bo);
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return 0;
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}
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void
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drm_intel_bo_wait_rendering(drm_intel_bo *bo)
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{
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bo->bufmgr->bo_wait_rendering(bo);
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}
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void
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drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr)
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{
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bufmgr->destroy(bufmgr);
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}
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int
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drm_intel_bo_exec(drm_intel_bo *bo, int used,
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drm_clip_rect_t *cliprects, int num_cliprects,
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int DR4)
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{
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return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
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}
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void
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drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
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{
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bufmgr->debug = enable_debug;
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}
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int
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drm_intel_bufmgr_check_aperture_space(drm_intel_bo **bo_array, int count)
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{
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return bo_array[0]->bufmgr->check_aperture_space(bo_array, count);
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}
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int
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drm_intel_bo_flink(drm_intel_bo *bo, uint32_t *name)
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{
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if (bo->bufmgr->bo_flink)
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return bo->bufmgr->bo_flink(bo, name);
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return -ENODEV;
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}
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int
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drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
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drm_intel_bo *target_bo, uint32_t target_offset,
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uint32_t read_domains, uint32_t write_domain)
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{
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return bo->bufmgr->bo_emit_reloc(bo, offset,
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target_bo, target_offset,
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read_domains, write_domain);
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}
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int
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drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment)
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{
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if (bo->bufmgr->bo_pin)
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return bo->bufmgr->bo_pin(bo, alignment);
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return -ENODEV;
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}
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int
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drm_intel_bo_unpin(drm_intel_bo *bo)
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{
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if (bo->bufmgr->bo_unpin)
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return bo->bufmgr->bo_unpin(bo);
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return -ENODEV;
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}
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int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
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uint32_t stride)
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{
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if (bo->bufmgr->bo_set_tiling)
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return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride);
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*tiling_mode = I915_TILING_NONE;
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return 0;
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}
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int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
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uint32_t *swizzle_mode)
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{
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if (bo->bufmgr->bo_get_tiling)
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return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode);
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*tiling_mode = I915_TILING_NONE;
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*swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
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return 0;
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}
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