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98887140e3
Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is advised to turn it off.
But there is another HW issue in these parts (fused
down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
workaround. In this case the pool configuration changes depending upon
which subslice is disabled and the no. of eus in a pool is different,
So userspace need to know min no. of eus in a pool.
V2: use return value as the query results.
ret < 0 when error, ret = 0 when not support, and ret > 0 indicate
query results.(Chris)
V3: Correct V2 errors.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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|---|---|---|
| .. | ||
| amdgpu_drm.h | ||
| drm.h | ||
| drm_fourcc.h | ||
| drm_mode.h | ||
| drm_sarea.h | ||
| i915_drm.h | ||
| mach64_drm.h | ||
| mga_drm.h | ||
| nouveau_drm.h | ||
| qxl_drm.h | ||
| r128_drm.h | ||
| radeon_drm.h | ||
| savage_drm.h | ||
| sis_drm.h | ||
| tegra_drm.h | ||
| vc4_drm.h | ||
| via_drm.h | ||
| virtgpu_drm.h | ||
| vmwgfx_drm.h | ||