mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-24 14:50:11 +01:00
72caa48c82
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING.
248 lines
8.2 KiB
C
248 lines
8.2 KiB
C
/*
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* Copyright 2005 Stephane Marchesin.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NOUVEAU_DRV_H__
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#define __NOUVEAU_DRV_H__
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#define DRIVER_AUTHOR "Stephane Marchesin"
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#define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
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#define DRIVER_NAME "nouveau"
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#define DRIVER_DESC "nVidia Riva/TNT/GeForce"
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#define DRIVER_DATE "20060213"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 4
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#define NOUVEAU_FAMILY 0x0000FFFF
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#define NOUVEAU_FLAGS 0xFFFF0000
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#include "nouveau_drm.h"
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#include "nouveau_reg.h"
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struct mem_block {
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struct mem_block *next;
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struct mem_block *prev;
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uint64_t start;
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uint64_t size;
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DRMFILE filp; /* 0: free, -1: heap, other: real files */
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int flags;
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drm_local_map_t *map;
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};
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enum nouveau_flags {
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NV_NFORCE =0x10000000,
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NV_NFORCE2 =0x20000000
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};
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struct nouveau_object
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{
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struct nouveau_object *next;
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struct nouveau_object *prev;
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struct mem_block *instance;
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uint32_t ht_loc;
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uint32_t handle;
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int class;
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int engine;
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};
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struct nouveau_fifo
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{
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int used;
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/* owner of this fifo */
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DRMFILE filp;
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/* mapping of the fifo itself */
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drm_local_map_t *map;
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/* mapping of the regs controling the fifo */
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drm_local_map_t *regs;
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/* dma object for the command buffer itself */
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struct mem_block *cmdbuf_mem;
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struct nouveau_object *cmdbuf_obj;
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/* PGRAPH context, for cards that keep it in RAMIN */
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struct mem_block *ramin_grctx;
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/* objects belonging to this fifo */
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struct nouveau_object *objs;
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/* XXX dynamic alloc ? */
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uint32_t pgraph_ctx [340];
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};
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struct nouveau_config {
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struct {
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int location;
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int size;
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} cmdbuf;
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};
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typedef struct drm_nouveau_private {
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/* the card type, takes NV_* as values */
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int card_type;
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/* exact chipset, derived from NV_PMC_BOOT_0 */
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int chipset;
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int flags;
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drm_local_map_t *mmio;
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drm_local_map_t *fb;
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drm_local_map_t *ramin; /* NV40 onwards */
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//TODO: Remove me, I'm bogus :)
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int cur_fifo;
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struct nouveau_object *fb_obj;
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int cmdbuf_ch_size;
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struct mem_block* cmdbuf_alloc;
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int fifo_alloc_count;
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struct nouveau_fifo fifos[NV_MAX_FIFO_NUMBER];
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/* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
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uint32_t ramin_size;
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uint32_t ramht_offset;
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uint32_t ramht_size;
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uint32_t ramht_bits;
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uint32_t ramfc_offset;
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uint32_t ramfc_size;
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uint32_t ramro_offset;
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uint32_t ramro_size;
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/* base physical adresses */
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uint64_t fb_phys;
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uint64_t fb_available_size;
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uint64_t agp_phys;
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uint64_t agp_available_size;
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/* the mtrr covering the FB */
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int fb_mtrr;
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struct mem_block *agp_heap;
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struct mem_block *fb_heap;
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struct mem_block *fb_nomap_heap;
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struct mem_block *ramin_heap;
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/* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
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uint32_t ctx_table_size;
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struct mem_block *ctx_table;
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struct nouveau_config config;
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}
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drm_nouveau_private_t;
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/* nouveau_state.c */
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extern void nouveau_preclose(drm_device_t * dev, DRMFILE filp);
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extern int nouveau_load(struct drm_device *dev, unsigned long flags);
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extern int nouveau_firstopen(struct drm_device *dev);
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extern void nouveau_lastclose(struct drm_device *dev);
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extern int nouveau_unload(struct drm_device *dev);
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extern int nouveau_ioctl_getparam(DRM_IOCTL_ARGS);
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extern int nouveau_ioctl_setparam(DRM_IOCTL_ARGS);
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extern void nouveau_wait_for_idle(struct drm_device *dev);
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/* nouveau_mem.c */
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extern uint64_t nouveau_mem_fb_amount(struct drm_device *dev);
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extern void nouveau_mem_release(DRMFILE filp, struct mem_block *heap);
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extern int nouveau_ioctl_mem_alloc(DRM_IOCTL_ARGS);
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extern int nouveau_ioctl_mem_free(DRM_IOCTL_ARGS);
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extern struct mem_block* nouveau_mem_alloc(struct drm_device *dev, int alignment, uint64_t size, int flags, DRMFILE filp);
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extern void nouveau_mem_free(struct drm_device* dev, struct mem_block*);
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extern int nouveau_mem_init(struct drm_device *dev);
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extern void nouveau_mem_close(struct drm_device *dev);
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extern int nouveau_instmem_init(struct drm_device *dev,
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uint32_t offset);
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extern struct mem_block* nouveau_instmem_alloc(struct drm_device *dev,
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uint32_t size, uint32_t align);
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extern void nouveau_instmem_free(struct drm_device *dev,
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struct mem_block *block);
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extern uint32_t nouveau_instmem_r32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index);
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extern void nouveau_instmem_w32(drm_nouveau_private_t *dev_priv,
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struct mem_block *mem, int index,
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uint32_t val);
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/* nouveau_fifo.c */
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extern int nouveau_fifo_init(drm_device_t *dev);
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extern int nouveau_fifo_number(drm_device_t *dev);
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extern void nouveau_fifo_cleanup(drm_device_t *dev, DRMFILE filp);
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extern int nouveau_fifo_id_get(drm_device_t *dev, DRMFILE filp);
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extern void nouveau_fifo_free(drm_device_t *dev, int channel);
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/* nouveau_object.c */
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extern void nouveau_object_cleanup(drm_device_t *dev, DRMFILE filp);
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extern struct nouveau_object *
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nouveau_dma_object_create(drm_device_t *dev, int class,
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uint32_t offset, uint32_t size,
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int access, int target);
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extern int nouveau_ioctl_object_init(DRM_IOCTL_ARGS);
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extern int nouveau_ioctl_dma_object_init(DRM_IOCTL_ARGS);
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extern uint32_t nouveau_chip_instance_get(drm_device_t *dev, struct mem_block *mem);
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/* nouveau_irq.c */
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extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
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extern void nouveau_irq_preinstall(drm_device_t*);
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extern void nouveau_irq_postinstall(drm_device_t*);
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extern void nouveau_irq_uninstall(drm_device_t*);
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/* nv04_graph.c */
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extern void nouveau_nv04_context_switch(drm_device_t *dev);
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extern int nv04_graph_init(drm_device_t *dev);
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extern int nv04_graph_context_create(drm_device_t *dev, int channel);
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/* nv10_graph.c */
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extern void nouveau_nv10_context_switch(drm_device_t *dev);
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extern int nv10_graph_init(drm_device_t *dev);
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extern int nv10_graph_context_create(drm_device_t *dev, int channel);
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/* nv20_graph.c */
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extern void nouveau_nv20_context_switch(drm_device_t *dev);
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extern int nv20_graph_init(drm_device_t *dev);
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extern int nv20_graph_context_create(drm_device_t *dev, int channel);
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/* nv30_graph.c */
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extern int nv30_graph_init(drm_device_t *dev);
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extern int nv30_graph_context_create(drm_device_t *dev, int channel);
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/* nv40_graph.c */
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extern int nv40_graph_init(drm_device_t *dev);
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extern int nv40_graph_context_create(drm_device_t *dev, int channel);
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extern void nv40_graph_context_save_current(drm_device_t *dev);
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extern void nv40_graph_context_restore(drm_device_t *dev, int channel);
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extern long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg);
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#if defined(__powerpc__)
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#define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
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#define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
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#else
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#define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
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#define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
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#endif
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#define INSTANCE_WR(mem,ofs,val) nouveau_instmem_w32(dev_priv,(mem),(ofs),(val))
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#define INSTANCE_RD(mem,ofs) nouveau_instmem_r32(dev_priv,(mem),(ofs))
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#endif /* __NOUVEAU_DRV_H__ */
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