mesa-drm/intel
Michel Thierry 3350add5cc intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)
Gen8+ supports 48-bit virtual addresses, but some objects must always be
allocated inside the 32-bit address range.

In specific, any resource used with flat/heapless (0x00000000-0xfffff000)
General State Heap (GSH) or Instruction State Heap (ISH) must be in a
32-bit range, because the General State Offset and Instruction State Offset
are limited to 32-bits.

The i915 driver has been modified to provide a flag to set when the 4GB
limit is not necessary in a given bo (EXEC_OBJECT_SUPPORTS_48B_ADDRESS).
48-bit range will only be used when explicitly requested.

Callers to the existing drm_intel_bo_emit_reloc function should set the
use_48b_address_range flag beforehand, in order to use full ppgtt range.

v2: Make set/clear functions nops on pre-gen8 platforms, and use them
    internally in emit_reloc functions (Ben)
    s/48BADDRESS/48B_ADDRESS/ (Dave)
v3: Keep set/clear functions internal, no-one needs to use them directly.
v4: Don't set 48bit-support flag in emit reloc, check for ppgtt type
    before enabling set/clear function, print full offsets in debug
    statements, using port of lower_32_bits and upper_32_bits from linux
    kernel (Michał)

References: http://lists.freedesktop.org/archives/intel-gfx/2015-July/072612.html
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:31:19 -08:00
..
tests intel-decode: Fix gen6 HIER_DEPTH_BUFFER decoding 2013-04-04 09:59:20 +02:00
.gitignore intel: Add a regression test program for intel_decode.c. 2012-01-04 14:49:44 -08:00
Android.mk android: remove explicit include to libpciaccess 2015-03-26 20:37:10 +00:00
intel-symbol-check intel: add symbols test 2015-04-28 11:19:15 +01:00
intel_aub.h intel/aub: Sync the AUB defines with mesa's 2013-06-10 17:51:17 +01:00
intel_bufmgr.c intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag) 2015-12-14 11:31:19 -08:00
intel_bufmgr.h intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag) 2015-12-14 11:31:19 -08:00
intel_bufmgr_fake.c intel: add the missing <strings.h> include 2015-12-01 16:48:17 +00:00
intel_bufmgr_gem.c intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag) 2015-12-14 11:31:19 -08:00
intel_bufmgr_priv.h intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag) 2015-12-14 11:31:19 -08:00
intel_chipset.h intel: Cleanup SKL PCI ID definitions. 2015-11-03 11:19:13 -08:00
intel_debug.h intel: shared header for shader debugging 2011-08-01 14:44:58 -07:00
intel_decode.c intel: ignore missing-field-initializers warnings 2015-09-04 21:39:06 +01:00
libdrm_intel.pc.in intel: Update package name and description in libdrm_intel.pc 2013-08-30 12:10:50 -04:00
Makefile.am configure: request/set the compiler in C99 mode 2015-04-28 11:20:52 +01:00
Makefile.sources libdrm, freedreno, intel, nouveau, radeon: add Makefile.sources 2014-09-01 16:06:01 +01:00
mm.c drm: rename libdrm{,_macros}.h 2015-04-28 11:19:15 +01:00
mm.h drm: rename libdrm{,_macros}.h 2015-04-28 11:19:15 +01:00
test_decode.c Consistently check the fd value 2015-07-16 16:41:53 +01:00