mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-25 00:10:11 +01:00
still be forced at compile time by setting MACH64_USE_DMA to 0.
DMA test now uses already allocated pci pool memory for descriptor table
and allocates a temporary dma buffer from the pool. This should
probabaly be changed to use one of our mapped vertex/dma buffers.
Also, return error code if _dispatch_vertex causes a lockup, either with
DMA (wait for idle fails) or MMIO (wait for fifo times out).
|
||
|---|---|---|
| .. | ||
| ati_pcigart.h | ||
| Config.in | ||
| drm.h | ||
| drm_agpsupport.h | ||
| drm_auth.h | ||
| drm_bufs.h | ||
| drm_context.h | ||
| drm_dma.h | ||
| drm_drawable.h | ||
| drm_drv.h | ||
| drm_fops.h | ||
| drm_init.h | ||
| drm_ioctl.h | ||
| drm_lists.h | ||
| drm_lock.h | ||
| drm_memory.h | ||
| drm_proc.h | ||
| drm_scatter.h | ||
| drm_stub.h | ||
| drm_vm.h | ||
| drmP.h | ||
| gamma.h | ||
| gamma_dma.c | ||
| gamma_drm.h | ||
| gamma_drv.c | ||
| gamma_drv.h | ||
| i810.h | ||
| i810_dma.c | ||
| i810_drm.h | ||
| i810_drv.c | ||
| i810_drv.h | ||
| i830.h | ||
| i830_dma.c | ||
| i830_drm.h | ||
| i830_drv.c | ||
| i830_drv.h | ||
| mach64.h | ||
| mach64_dma.c | ||
| mach64_drm.h | ||
| mach64_drv.c | ||
| mach64_drv.h | ||
| mach64_state.c | ||
| Makefile.kernel | ||
| Makefile.linux | ||
| mga.h | ||
| mga_dma.c | ||
| mga_drm.h | ||
| mga_drv.c | ||
| mga_drv.h | ||
| mga_state.c | ||
| mga_ucode.h | ||
| mga_warp.c | ||
| picker.c | ||
| r128.h | ||
| r128_cce.c | ||
| r128_drm.h | ||
| r128_drv.c | ||
| r128_drv.h | ||
| r128_state.c | ||
| radeon.h | ||
| radeon_cp.c | ||
| radeon_drm.h | ||
| radeon_drv.c | ||
| radeon_drv.h | ||
| radeon_state.c | ||
| README.drm | ||
| sis.h | ||
| sis_drm.h | ||
| sis_drv.c | ||
| sis_drv.h | ||
| sis_ds.c | ||
| sis_ds.h | ||
| sis_mm.c | ||
| tdfx.h | ||
| tdfx_drv.c | ||
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************
The Direct Rendering Manager (drm) is a device-independent kernel-level
device driver that provides support for the XFree86 Direct Rendering
Infrastructure (DRI).
The DRM supports the Direct Rendering Infrastructure (DRI) in four major
ways:
1. The DRM provides synchronized access to the graphics hardware via
the use of an optimized two-tiered lock.
2. The DRM enforces the DRI security policy for access to the graphics
hardware by only allowing authenticated X11 clients access to
restricted regions of memory.
3. The DRM provides a generic DMA engine, complete with multiple
queues and the ability to detect the need for an OpenGL context
switch.
4. The DRM is extensible via the use of small device-specific modules
that rely extensively on the API exported by the DRM module.
Documentation on the DRI is available from:
http://precisioninsight.com/piinsights.html
For specific information about kernel-level support, see:
The Direct Rendering Manager, Kernel Support for the Direct Rendering
Infrastructure
http://precisioninsight.com/dr/drm.html
Hardware Locking for the Direct Rendering Infrastructure
http://precisioninsight.com/dr/locking.html
A Security Analysis of the Direct Rendering Infrastructure
http://precisioninsight.com/dr/security.html
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************