mesa-drm/intel
Eric Anholt 0ec768e67a intel: Add more intermediate sizes of cache buckets between powers of 2.
We had two cases recently where the rounding to powers of two hurt
badly: 4:2:0 YUV HD video frames would round up from 2.2MB to 4MB, and
Urban Terror was hitting aperture size limitations.  For UT, this is
because mipmap trees for power of two texture sizes will land right in
the middle between two cache buckets.

By giving a few more sizes between powers of two, Urban Terror on my
945 ends up consuming 207MB of GEM objects instead of 272MB, and HD
video decode on Ironlake goes from 99MB to 75MB.

cairo-perf-diff of the benchmarks for gl and xlib shows a 1.09x and
1.06x speedup and a 1.07x, 1.08x, and 1.11x slowdown.  From this, I
think this patch was really a no-op in terms of performance for these
CPU-bound workloads.
2010-06-10 08:56:56 -07:00
..
intel_bufmgr.c intel: Add support for kernel multi-ringbuffer API. 2010-06-06 15:50:38 -07:00
intel_bufmgr.h intel: Add support for kernel multi-ringbuffer API. 2010-06-06 15:50:38 -07:00
intel_bufmgr_fake.c intel_bufmgr_fake: fix compile warning. 2010-05-26 12:10:39 -07:00
intel_bufmgr_gem.c intel: Add more intermediate sizes of cache buckets between powers of 2. 2010-06-10 08:56:56 -07:00
intel_bufmgr_priv.h intel: Add support for kernel multi-ringbuffer API. 2010-06-06 15:50:38 -07:00
intel_chipset.h libdrm/intel: execbuf2 support 2010-03-02 10:10:50 -08:00
libdrm_intel.pc.in intel: Install the header file in the libdrm/ directory. 2010-03-17 12:49:10 -07:00
Makefile.am intel: Install the header file in the libdrm/ directory. 2010-03-17 12:49:10 -07:00
mm.c Move libdrm/ up one level 2009-11-17 11:15:06 -05:00
mm.h Move libdrm/ up one level 2009-11-17 11:15:06 -05:00