mesa-drm/amdgpu/amdgpu-symbols.txt
Arvind Yadav 43e8a3f86a amdgpu: Add amdgpu userqueue IOCTL functions
This patch adds new IOCTL functions to support
userqueue create, remove, signal and wait etc.

v2:(Marek)
 - Add csa support for SDMA queue.
 - Addressed's review comments.
 - Removed raw2/op2 ioctl.
 - Added syncobj_timeline_handles in amdgpu_userq_wait IOCTL.

v3:(Yogesh)
 - Rename timeline* objects as per UAPI review (Arvind).

v4: (Marek)
 - Drop AMDGPU_USERQ_BO_WRITE as this should not be a global option
   of the IOCTL, It should be option per buffer. Hence adding separate
   array for read and write BO handles. (Arun)

 - Modify num_fences to __u16, flags changed to __u16 and placed
   the num_fences next to flags for optimal padding and size. (Arun)

v5:(Marek/Pierre-Eric)
  - add more detail params description for signal and wait IOCTL calls.
  - Remove the unused structure fields in signal and wait structs.
  - Add separate array of read and write for BO handles. (Arun)

  - Removes the unused flags parameter from the
	amdgpu_create_userqueue IOCTL. (Arvind)

v6:(Pierre-Eric)
  - Remove unused headers. (Arvind)

  - Modify the function parameter names and struct
    field names as per the review comments. (Arun)

v7:(Marek)
  - Modify the structure field name and comments. (Arun)

  - Rename vm_timeline_syncobj and add comment for
    vm_timeline_point.
  - Remove GDS buffer support from MQD. (Arvind)

v8:(Pierre-Eric)
  - Modify the function parameter names.
  - Added new function in amdgpu-symbols.txt (Arvind)

v9:(Marek)
  - Use the drm signal/wait structure as the parameter. (Arun)

Cc: Deucher, Alexander <alexander.deucher@amd.com>
Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Sharma, Shashank <shashank.sharma@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
2025-04-10 10:03:07 -04:00

90 lines
2.2 KiB
Text

amdgpu_bo_alloc
amdgpu_bo_cpu_map
amdgpu_bo_cpu_unmap
amdgpu_bo_export
amdgpu_bo_free
amdgpu_bo_import
amdgpu_bo_inc_ref
amdgpu_bo_list_create_raw
amdgpu_bo_list_destroy_raw
amdgpu_bo_list_create
amdgpu_bo_list_destroy
amdgpu_bo_list_update
amdgpu_bo_query_info
amdgpu_bo_set_metadata
amdgpu_bo_va_op
amdgpu_bo_va_op_raw
amdgpu_bo_va_op_raw2
amdgpu_bo_wait_for_idle
amdgpu_create_bo_from_user_mem
amdgpu_cs_chunk_fence_info_to_data
amdgpu_cs_chunk_fence_to_dep
amdgpu_cs_create_semaphore
amdgpu_cs_create_syncobj
amdgpu_cs_create_syncobj2
amdgpu_cs_ctx_create
amdgpu_cs_ctx_create2
amdgpu_cs_ctx_free
amdgpu_cs_ctx_override_priority
amdgpu_cs_ctx_stable_pstate
amdgpu_cs_destroy_semaphore
amdgpu_cs_destroy_syncobj
amdgpu_cs_export_syncobj
amdgpu_cs_fence_to_handle
amdgpu_cs_import_syncobj
amdgpu_cs_query_fence_status
amdgpu_cs_query_reset_state
amdgpu_cs_query_reset_state2
amdgpu_query_sw_info
amdgpu_cs_signal_semaphore
amdgpu_cs_submit
amdgpu_cs_submit_raw
amdgpu_cs_submit_raw2
amdgpu_cs_syncobj_export_sync_file
amdgpu_cs_syncobj_export_sync_file2
amdgpu_cs_syncobj_import_sync_file
amdgpu_cs_syncobj_import_sync_file2
amdgpu_cs_syncobj_query
amdgpu_cs_syncobj_query2
amdgpu_cs_syncobj_reset
amdgpu_cs_syncobj_signal
amdgpu_cs_syncobj_timeline_signal
amdgpu_cs_syncobj_timeline_wait
amdgpu_cs_syncobj_transfer
amdgpu_cs_syncobj_wait
amdgpu_cs_wait_fences
amdgpu_cs_wait_semaphore
amdgpu_device_deinitialize
amdgpu_device_get_fd
amdgpu_device_initialize
amdgpu_device_initialize2
amdgpu_find_bo_by_cpu_mapping
amdgpu_get_marketing_name
amdgpu_query_buffer_size_alignment
amdgpu_query_crtc_from_id
amdgpu_query_firmware_version
amdgpu_query_gds_info
amdgpu_query_gpu_info
amdgpu_query_gpuvm_fault_info
amdgpu_query_heap_info
amdgpu_query_hw_ip_count
amdgpu_query_hw_ip_info
amdgpu_query_info
amdgpu_query_sensor_info
amdgpu_query_uq_fw_area_info
amdgpu_query_video_caps_info
amdgpu_read_mm_registers
amdgpu_va_manager_alloc
amdgpu_va_manager_init
amdgpu_va_manager_deinit
amdgpu_va_range_alloc
amdgpu_va_range_alloc2
amdgpu_va_range_free
amdgpu_va_get_start_addr
amdgpu_va_range_query
amdgpu_vm_reserve_vmid
amdgpu_vm_unreserve_vmid
amdgpu_create_userqueue
amdgpu_free_userqueue
amdgpu_userq_signal
amdgpu_userq_wait