mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 18:40:09 +01:00
9f0e6cad0e
architecture in place (Lacks actual DMA submission (The easy part,
really...)) so it's not done yet, but I promised people that done or
not, I'd do a check-in of this...
353 lines
9.8 KiB
C
353 lines
9.8 KiB
C
/* mach64_state.c -- State support for mach64 (Rage Pro) driver -*- linux-c -*-
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* Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com
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*
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* Copyright 2000 Gareth Hughes
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*/
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#define __NO_VERSION__
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#include "mach64.h"
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#include "drmP.h"
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#include "mach64_drv.h"
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#include "drm.h"
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/* ================================================================
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* CCE command dispatch functions
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*/
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static void mach64_print_dirty( const char *msg, unsigned int flags )
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{
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#if 0
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DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
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msg,
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flags,
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(flags & MACH64_UPLOAD_CORE) ? "core, " : "",
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(flags & MACH64_UPLOAD_CONTEXT) ? "context, " : "",
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(flags & MACH64_UPLOAD_SETUP) ? "setup, " : "",
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(flags & MACH64_UPLOAD_TEX0) ? "tex0, " : "",
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(flags & MACH64_UPLOAD_TEX1) ? "tex1, " : "",
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(flags & MACH64_UPLOAD_MASKS) ? "masks, " : "",
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(flags & MACH64_UPLOAD_WINDOW) ? "window, " : "",
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(flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
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(flags & MACH64_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
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#endif
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}
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static void mach64_dma_dispatch_clear( drm_device_t *dev,
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unsigned int flags,
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int cx, int cy, int cw, int ch,
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unsigned int clear_color,
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unsigned int clear_depth )
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
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drm_mach64_context_regs_t *ctx = &sarea_priv->context_state;
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int nbox = sarea_priv->nbox;
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drm_clip_rect_t *pbox = sarea_priv->boxes;
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u32 fb_bpp, depth_bpp;
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int i;
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DMALOCALS;
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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switch ( dev_priv->fb_bpp ) {
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case 16:
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fb_bpp = MACH64_DATATYPE_RGB565;
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break;
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case 32:
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fb_bpp = MACH64_DATATYPE_ARGB8888;
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break;
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default:
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return;
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}
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switch ( dev_priv->depth_bpp ) {
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case 16:
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depth_bpp = MACH64_DATATYPE_RGB565;
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break;
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case 24:
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case 32:
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depth_bpp = MACH64_DATATYPE_ARGB8888;
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break;
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default:
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return;
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}
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for ( i = 0 ; i < nbox ; i++ ) {
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int x = pbox[i].x1;
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int y = pbox[i].y1;
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int w = pbox[i].x2 - x;
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int h = pbox[i].y2 - y;
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DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n",
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pbox[i].x1, pbox[i].y1,
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pbox[i].x2, pbox[i].y2, flags );
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if ( flags & (MACH64_FRONT | MACH64_BACK) ) {
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/* Setup for color buffer clears
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*/
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DMAGETPTR( dev_priv, 14 );
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DMAOUTREG( MACH64_Z_CNTL, 0 );
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DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 );
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DMAOUTREG( MACH64_SC_LEFT_RIGHT, ctx->sc_left_right );
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DMAOUTREG( MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom );
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DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 );
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DMAOUTREG( MACH64_GUI_TRAJ_CNTL,
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(MACH64_DST_X_LEFT_TO_RIGHT |
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MACH64_DST_Y_TOP_TO_BOTTOM) );
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DMAOUTREG( MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
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(fb_bpp << 4) |
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(fb_bpp << 8) |
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(fb_bpp << 16) |
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(fb_bpp << 28)) );
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DMAOUTREG( MACH64_DP_FRGD_CLR, clear_color );
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/* FIXME: Use color mask from state info */
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/*DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff );*/
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DMAOUTREG( MACH64_DP_WRITE_MASK, ctx->dp_write_mask );
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DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
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MACH64_FRGD_MIX_S) );
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DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
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MACH64_FRGD_SRC_FRGD_CLR |
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MACH64_MONO_SRC_ONE) );
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DMAADVANCE( dev_priv );
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}
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if ( flags & MACH64_FRONT ) {
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DMAGETPTR( dev_priv, 3 );
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DMAOUTREG( MACH64_DST_OFF_PITCH,
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dev_priv->front_offset_pitch );
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DMAOUTREG( MACH64_DST_X_Y,
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(y << 16) | x );
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DMAOUTREG( MACH64_DST_WIDTH_HEIGHT,
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(h << 16) | w );
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DMAADVANCE( dev_priv );
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}
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if ( flags & MACH64_BACK ) {
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DMAGETPTR( dev_priv, 3 );
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DMAOUTREG( MACH64_DST_OFF_PITCH,
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dev_priv->back_offset_pitch );
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DMAOUTREG( MACH64_DST_X_Y,
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(y << 16) | x );
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DMAOUTREG( MACH64_DST_WIDTH_HEIGHT,
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(h << 16) | w );
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DMAADVANCE( dev_priv );
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}
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if ( flags & MACH64_DEPTH ) {
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/* Setup for depth buffer clear
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*/
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DMAGETPTR( dev_priv, 14 );
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DMAOUTREG( MACH64_Z_CNTL, 0 );
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DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 );
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DMAOUTREG( MACH64_SC_LEFT_RIGHT, ctx->sc_left_right );
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DMAOUTREG( MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom );
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DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 );
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DMAOUTREG( MACH64_GUI_TRAJ_CNTL,
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(MACH64_DST_X_LEFT_TO_RIGHT |
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MACH64_DST_Y_TOP_TO_BOTTOM) );
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DMAOUTREG( MACH64_DP_PIX_WIDTH, ((depth_bpp << 0) |
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(depth_bpp << 4) |
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(depth_bpp << 8) |
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(depth_bpp << 16) |
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(depth_bpp << 28)) );
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DMAOUTREG( MACH64_DP_FRGD_CLR, clear_depth );
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DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff );
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DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
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MACH64_FRGD_MIX_S) );
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DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
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MACH64_FRGD_SRC_FRGD_CLR |
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MACH64_MONO_SRC_ONE) );
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DMAOUTREG( MACH64_DST_OFF_PITCH,
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dev_priv->depth_offset_pitch );
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DMAOUTREG( MACH64_DST_X_Y,
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(y << 16) | x );
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DMAOUTREG( MACH64_DST_WIDTH_HEIGHT,
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(h << 16) | w );
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DMAADVANCE( dev_priv );
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}
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}
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}
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static void mach64_dma_dispatch_swap( drm_device_t *dev )
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{
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drm_mach64_private_t *dev_priv = dev->dev_private;
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drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
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int nbox = sarea_priv->nbox;
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drm_clip_rect_t *pbox = sarea_priv->boxes;
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u32 fb_bpp;
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int i;
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DMALOCALS;
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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switch ( dev_priv->fb_bpp ) {
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case 16:
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fb_bpp = MACH64_DATATYPE_RGB565;
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break;
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case 32:
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default:
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fb_bpp = MACH64_DATATYPE_ARGB8888;
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break;
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}
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DMAGETPTR( dev_priv, 12 );
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DMAOUTREG( MACH64_Z_CNTL, 0 );
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DMAOUTREG( MACH64_SCALE_3D_CNTL, 0 );
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DMAOUTREG( MACH64_SC_LEFT_RIGHT, 0 | ( 8191 << 16 ) ); /* no scissor */
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DMAOUTREG( MACH64_SC_TOP_BOTTOM, 0 | ( 16383 << 16 ) );
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DMAOUTREG( MACH64_CLR_CMP_CNTL, 0 );
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DMAOUTREG( MACH64_GUI_TRAJ_CNTL, (MACH64_DST_X_LEFT_TO_RIGHT |
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MACH64_DST_Y_TOP_TO_BOTTOM) );
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DMAOUTREG( MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
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(fb_bpp << 4) |
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(fb_bpp << 8) |
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(fb_bpp << 16) |
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(fb_bpp << 28)) );
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DMAOUTREG( MACH64_DP_WRITE_MASK, 0xffffffff );
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DMAOUTREG( MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
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MACH64_FRGD_MIX_S) );
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DMAOUTREG( MACH64_DP_SRC, (MACH64_BKGD_SRC_BKGD_CLR |
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MACH64_FRGD_SRC_BLIT |
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MACH64_MONO_SRC_ONE) );
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DMAOUTREG( MACH64_SRC_OFF_PITCH, dev_priv->back_offset_pitch );
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DMAOUTREG( MACH64_DST_OFF_PITCH, dev_priv->front_offset_pitch );
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DMAADVANCE( dev_priv );
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for ( i = 0 ; i < nbox ; i++ ) {
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int x = pbox[i].x1;
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int y = pbox[i].y1;
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int w = pbox[i].x2 - x;
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int h = pbox[i].y2 - y;
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DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n",
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pbox[i].x1, pbox[i].y1,
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pbox[i].x2, pbox[i].y2 );
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DMAGETPTR( dev_priv, 4 );
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DMAOUTREG( MACH64_SRC_WIDTH1, w );
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DMAOUTREG( MACH64_SRC_Y_X, (x << 16) | y );
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DMAOUTREG( MACH64_DST_Y_X, (x << 16) | y );
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DMAOUTREG( MACH64_DST_WIDTH_HEIGHT, (h << 16) | w );
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DMAADVANCE( dev_priv );
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}
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#if 0
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/* Increment the frame counter. The client-side 3D driver must
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* throttle the framerate by waiting for this value before
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* performing the swapbuffer ioctl.
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*/
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dev_priv->sarea_priv->last_frame++;
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BEGIN_RING( 2 );
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OUT_RING( CCE_PACKET0( MACH64_LAST_FRAME_REG, 0 ) );
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OUT_RING( dev_priv->sarea_priv->last_frame );
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ADVANCE_RING();
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#endif
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}
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/* ================================================================
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* IOCTL functions
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*/
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int mach64_dma_clear( struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg )
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{
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drm_file_t *priv = filp->private_data;
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drm_device_t *dev = priv->dev;
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drm_mach64_private_t *dev_priv = dev->dev_private;
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drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
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drm_mach64_clear_t clear;
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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LOCK_TEST_WITH_RETURN( dev );
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if ( copy_from_user( &clear, (drm_mach64_clear_t *) arg,
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sizeof(clear) ) )
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return -EFAULT;
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if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS )
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sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
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mach64_dma_dispatch_clear( dev, clear.flags,
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clear.x, clear.y, clear.w, clear.h,
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clear.clear_color, clear.clear_depth );
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/* Make sure we restore the 3D state next time.
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*/
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dev_priv->sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
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MACH64_UPLOAD_MISC);
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return 0;
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}
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int mach64_dma_swap( struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg )
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{
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drm_file_t *priv = filp->private_data;
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drm_device_t *dev = priv->dev;
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drm_mach64_private_t *dev_priv = dev->dev_private;
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drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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LOCK_TEST_WITH_RETURN( dev );
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if ( sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS )
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sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
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mach64_dma_dispatch_swap( dev );
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/* Make sure we restore the 3D state next time.
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*/
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dev_priv->sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
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MACH64_UPLOAD_MISC);
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return 0;
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}
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