Dual purpose:
- The drm fd dedupe functionality confuses the radeonsi
amdgpu winsys if radeonsi isn't the first thing opening
the device. By exposing the fd we can detect this case.
- For a common mesa Vulkan sync objects implementation
with syncobj. (notable: no buffer allocation)
Both shouldn't interferece with libdrm_amdgpu functionality
though it does somewhat piece the abstraction of the library.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3424
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5630
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
In Vulkan we have extensions to assist with capture in replay in a
world where addresses are returned to the application. This involves
creating buffers at the same VA during replay as they were during
capture.
By itself libdrm_amdgpu already has support for this, but there is
the obvious failure mode that if another buffer is already allocated
at that VA things fail spectacularly. This is an actual issue as
internal buffers, like winsys images or shader binaries also
participate in the same VA allocation.
To avoid this problem applications have to create buffers which
are going to be captured with a flag, and the implementation is to
separate VA allocation for those buffers to reduce the collision risk:
"Implementations are expected to separate such buffers in the GPU address
space so normal allocations will avoid using these addresses. Apps/tools
should avoid mixing app-provided and implementation-provided addresses for
buffers created with VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT,
to avoid address space allocation conflicts."
This patch implements that by adding a flag for these buffers and allocating
address space from the top of the address range instead of the bottom.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Christian König <christian.koenig@amd.com>
v2: nit-picks fix
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Christian König <Christian.Koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
For the xf86drm.[ch] part : Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
v2: adapt to new one transfer ioctl
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
v2: symbos are stored in lexical order.
v3: drop export/import and extra query indirection
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This way we can override the priority of a single context using a
master fd.
Since we cannot usefully create an amdgpu device of a master fd
without the fd deduplication kicking in this takes a plain fd.
This can be used by e.g. radv to get high priority contexts using
a master fd from the primary node or a lease.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so
I ran codespell (a spell checker for code) on the whole repo.
[1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
For Pro OGL be able to work with upstream libdrm.
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Userspace needs to know if the user memory is from BO or malloc.
v2: update mutex range and rebase
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
to support SRIOV and MCBP, need 16 IBs per submit
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Return high addresses if requested and available.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Mao <david.mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rmove amdgpu_context_handle from the interface and use
amdgpu_device_handle instead. Uupdate VMID reservation test
accordingly.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
v2:
Rename wrappers to match the IOCTL naming, fix
identation and fix make check error.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Add a new context creation function that allows specifying the context
priority.
A high priority context has the potential of starving lower priority
contexts. The current kernel driver implementation allows only apps
that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above
AMDGPU_CTX_PRIORITY_NORMAL.
v2: corresponding changes for kernel patch v2
v3: Fixed 'make check' symbol error
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This just sends chunks to the kernel API for a single command
stream.
This should provide a more future proof and extensible API
for command submission.
v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
These are just wrappers using the amdgpu device handle.
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This exposes amdgpu_query_sensor_info().
v2: - add amdgpu_query_sensor_info() to the symbols list
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This variant allows the caller full control over flags and size, and
allows passing a NULL bo (for PRT support).
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Jerry Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
This function is used to look up the marking name
for a specific board.
v2: agd: Squash in subsequent updates to the table.
v3: [Michel Dänzer]
* Make amdgpu_asic_id_table static, so it's not exported from
libdrm_amdgpu.so.1
* Add amdgpu_get_marketing_name to amdgpu-symbols-check
* Fix indentation of second line of if statement
* Squash in another change removing redundant entries
* Change spelling of "RADEON" -> "Radeon"
* Remove "(TM)" from a minority of entries
v4: [Michel Dänzer]
* Use const char* instead of fixed size array for marketing_name (Emil
Velikov)
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
the semaphore is a binary semaphore. the work flow is:
1. create sem
2. signal sem
3. wait sem, reset sem after signalled
4. destroy sem.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
The AMDGPU_VA_RANGE_32_BIT flag is added to request VA range in the
32bit address space for amdgpu_va_range_alloc.
The 32bit address space is reserved at initialization time, and managed
with a separate VAMGR as part of the global VAMGR. And if no enough VA
space available in range above 4GB, this reserved range can be used as
fallback.
v2: add comment for AMDGPU_VA_RANGE_32_BIT, and add vamgr to va_range
v3: rebase to Emil's drm_private series
v4: fix one warning
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
The PCI revision ID can be used to differentiate ASICs.
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
The following interfaces are changed accordingly:
- amdgpu_bo_alloc
- amdgpu_create_bo_from_user_mem
v2: update the interfaces
v3: remove virtual_mc_base_address from amdgpu_bo
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
The flags is added for extensibility to cover some special requirements
in the future, i.e, request VA range in the first 4GB of address space
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
make amdgpu_cs_query_fence reusable to support multi-fence query
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
