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Author SHA1 Message Date
Ian Romanick
25cb876f85 Associate master file pointer with command list buffer. 
Pass the master's file pointer, as supplied to xgi_bootstrap, to
xgi_cmdlist_initialize.  Associate that pointer with the memory
allocated for the command list buffer.  By doing this the memory will
be automatically cleaned up when the master closes the device.  This
allows the removal of some clean up code.
 2007-08-09 15:23:13 -07:00
Ben Skeggs
7784e8c6e7 nouveau: silence irq handler a bit 2007-08-09 11:12:13 +10:00
Ben Skeggs
7281463f8d nouveau/nv40: add some missing pciids. 2007-08-09 10:23:36 +10:00
Matthieu Castet
e326acf549 nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry 
This should improve multi fifo
 2007-08-08 22:55:32 +02:00
Ben Skeggs
05633ca370 nouveau: Always allocate drm's push buffer in VRAM 
Fixes #11868
 2007-08-08 16:37:55 +10:00
Ben Skeggs
40f2156356 nouveau: return channel id 2007-08-08 16:12:19 +10:00
Ben Skeggs
296050eee6 nouveau/nv50: hack up initial channel context from current state 
We really should be providing static values like the nv40 PGRAPH code does,
however, this will do for now to keep X at least working.
 2007-08-08 13:01:29 +10:00
Ben Skeggs
4ad487190d nouveau: enable/disable engine-specific interrupts in _init()/_takedown() 
All interrupts are still masked by PMC until init is finished.
 2007-08-08 10:49:05 +10:00
Matthieu Castet
a4759b8513 nouveau : fix enable irq (in the previous code all irq were masked by engine 
init after irq_postinstall)
 2007-08-07 23:09:44 +02:00
Ian Romanick
f7ba02b745 Unify infrastructure for freeing on-card / GART memory. 2007-08-06 17:27:15 -07:00
Ian Romanick
6718198897 Release client memory in reclaim_buffers_idlelocked instead of preclose. 2007-08-06 16:56:20 -07:00
Ian Romanick
f3072becda Refactor xgi_(fb|pcie)_free_all into xgi_free_all. 2007-08-06 16:35:07 -07:00
Ian Romanick
90907c5915 Replace per-heap semaphores with drm_device::struct_mutex. 2007-08-06 16:17:23 -07:00
Ian Romanick
f96bff9e21 Unify infrastructure for allocating (not yet freeing) on-card / GART memory. 2007-08-06 16:09:05 -07:00
Ian Romanick
5362cc723e Eliminate unnecessary function xgi_pcie_free_locked. 2007-08-06 15:52:06 -07:00
Eric Anholt
d749cc9ae8 Initialize the AGP structure's base address at init rather than enable. 
Not all drivers call enable (intel), but they would still like to use this
member in driver code.
 2007-08-06 15:45:37 -07:00
Ian Romanick
a6fb93a150 Finish removing allocation "owner" infrastructure. 2007-08-06 15:43:51 -07:00
Ian Romanick
78e9c1a93d Eliminate special-case handling of framebuffer (fake) allocation. 2007-08-06 15:37:56 -07:00
Ian Romanick
997a9a738e Eliminate allocation "owner" usage. 2007-08-06 15:31:34 -07:00
Ben Skeggs
66f5232d93 nouveau: Init global gpuobj list early, unbreaks sgdma code. 2007-08-07 01:52:49 +10:00
Stephane Marchesin
ac24f328ec nouveau: Bump PCI GART to 16MB 2007-08-06 17:16:05 +02:00
Ben Skeggs
8d5a8ebc31 nouveau: ouch, add nouveau_dma.[ch] files.. 2007-08-06 22:32:36 +10:00
Ben Skeggs
92084c6e05 Export some useful ttm functions to drivers. 2007-08-06 22:11:18 +10:00
Ben Skeggs
7a0a812ea4 nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway. 
Need to find another way of doing this, ideally someone'd hunt down which
object/method controls it!  The Xv blit adaptor is likely now broken on
cards that have pNv->WaitVSyncPossible enabled.
 2007-08-06 22:09:15 +10:00
Ben Skeggs
cf04641bc6 nouveau: Give DRM its own gpu channel 
If your card doesn't have working context switching, it is now broken.
 2007-08-06 22:05:31 +10:00
Ben Skeggs
51f24be578 nouveau: Determine trapped channel id from active grctx on >=NV40 2007-08-06 21:46:55 +10:00
Ben Skeggs
97770db720 nouveau: Various internal and external API changes 
1. DRM_NOUVEAU_GPUOBJ_FREE
	Used to free GPU objects.  The obvious usage case is for Gr objects,
	but notifiers can also be destroyed in the same way.

	GPU objects gain a destructor method and private data fields with
	this change, so other specialised cases (like notifiers) can be
	implemented on top of gpuobjs.

2. DRM_NOUVEAU_CHANNEL_FREE

3. DRM_NOUVEAU_CARD_INIT
	Ideally we'd do init during module load, but this isn't currently
	possible.  Doing init during firstopen() is bad as X has a love of
	opening/closing the DRM many times during startup.  Once the
	modesetting-101 branch is merged this can go away.

	IRQs are enabled in nouveau_card_init() now, rather than having the
	X server call drmCtlInstHandler().  We'll need this for when we give
	the kernel module its own channel.

4. DRM_NOUVEAU_GETPARAM
	Add CHIPSET_ID value, which will return the chipset id derived
	from NV_PMC_BOOT_0.

4. Use list_* in a few places, rather than home-brewed stuff.
 2007-08-06 21:45:18 +10:00
Ben Skeggs
beaa0c9a28 nouveau: Pass channel struct around instead of channel id. 2007-08-06 03:40:43 +10:00
Patrice Mandin
2453ba19b6 nouveau:nv10: fill and use load,save graph context functions 2007-08-03 23:06:39 +02:00
Eric Anholt
3a0bc518e3 Remove the pinned buffer from the LRU when pinning. 
Also, be a little safer with setting the pinned flag within the struct lock.
I'm not 100% sure if this is required, but it seems like it might be.
 2007-08-02 14:08:04 -07:00
Eric Anholt
cf4f1a85af Add a couple of doxygen comments from reading the code. 2007-08-02 13:51:55 -07:00
Patrice Mandin
9dfcc1ba07 Merge branch 'master' of git+ssh://pmandin@git.freedesktop.org/git/mesa/drm 2007-08-02 20:08:05 +02:00
Patrice Mandin
405c48b857 Add libdrm source dir, to build tests from a different build dir 2007-08-02 20:06:37 +02:00
Dave Airlie
7602e4f8a6 drm: add unlocked ioctl code path - not used yet 2007-08-02 19:13:58 +10:00
Ian Romanick
f83000c8b3 Refactor register dumping code. 2007-07-31 17:27:00 -07:00
Dave Airlie
c395d27a72 drm/fence: shut up lockdep 2007-08-01 10:12:36 +10:00
Dave Airlie
283eaa2559 drm: fix fencing refcount error 
This extra increase was causing fence leaks on my system, due to create/user add already increasing it twice no need for a 3rd go.
 2007-07-31 09:25:51 +10:00
Ian Romanick
08919d8a70 Move additional GE initialization into the kernel. 
This code comes directly from the X server.
 2007-07-30 12:01:52 -07:00
Ian Romanick
2fc697a7d2 Fix GE shut-down sequence. 
When the GE is shut down, an empty command packet without a begin-link
must be sent.  After this command is sent, wait for the hardware to go
idle.  Finally, turn off the GE and disable MMIO.
 2007-07-30 10:20:15 -07:00
Ian Romanick
01628a430d Use DRM_READ/DRM_WRITE macros instead of directly accessing MMIO space. 2007-07-30 10:02:46 -07:00
Ian Romanick
2ac80e79e4 Use OUT3C5B macro instead of assuming little-endian byte order. 2007-07-30 09:59:19 -07:00
Ian Romanick
cd51f13138 Convert to new ioctl interface between core DRM and device-specific module. 2007-07-27 15:45:59 -07:00
Arthur Huillet
f01026eae6 nouveau: creating notifier in PCI memory for PCIGART 2007-07-27 15:48:04 +02:00
Ian Romanick
c37ed9eca5 Eliminate use of DRM_ERR. 2007-07-26 17:01:16 -07:00
Ian Romanick
b89cc03465 Eliminate unnecessary (and now wrong) call gto drm_sg_free. 2007-07-26 16:58:59 -07:00
Ian Romanick
c561cb4650 Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2 
Conflicts:

	linux-core/drmP.h
	linux-core/drm_scatter.c
 2007-07-26 16:58:28 -07:00
Eric Anholt
3c8ebd94e4 debug print ioctl return value as -integer rather than fffffwhatever. 2007-07-26 11:26:12 -07:00
Eric Anholt
f9c27aa50b Copy the important parts of object_validate into object_create(). 
This should let us allocate buffers without holding the hardware lock.

While here, add DRM_DEBUG info for the drm_bo ioctls, so you can see something
more specific than just the cmd value per ioctl.
 2007-07-26 11:18:27 -07:00
Eric Anholt
cf2d569dac Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning. 
This cleans up the create/validate interfaces for this very uncommon path, and
makes pinned object creation much easier to use for the X Server.
 2007-07-26 10:15:11 -07:00
Dave Airlie
4175dd8181 drm/bo: set the req pointer for each buffer to validate 2007-07-26 15:26:36 +10:00