Jakob Bornecrantz
3796c9671a
cleanup
2007-10-24 14:13:24 +02:00
Jakob Bornecrantz
c8ce5cf030
SDVO now works
2007-10-17 15:44:35 +02:00
Jakob Bornecrantz
6034c55916
SDVO almost works
2007-10-17 15:24:14 +02:00
Jakob Bornecrantz
02951cc179
fixed compile
2007-10-10 18:32:39 +02:00
Jakob Bornecrantz
7247089fe9
refactored code
2007-10-10 17:46:38 +02:00
Jakob Bornecrantz
0629841158
added small memory debug function
2007-10-08 16:03:25 +02:00
Jakob Bornecrantz
53c0d53a91
tells fb about resize
2007-10-08 11:53:51 +02:00
Jakob Bornecrantz
323e968986
fixed typedefs
2007-10-05 17:03:53 +02:00
Jakob Bornecrantz
34dcf1b8f4
initial hotplug work
2007-10-05 16:53:34 +02:00
Alan Hourihane
bf9bd5671c
Create memory pool for TT memory
2007-09-27 14:21:29 +01:00
Jesse Barnes
972ec4fa25
Hack out i915_mem_takedown
...
We may want to make the old i915 memory manager obsolete eventually, and in the
meantime the takedown causes problems on unload so remove it for now.
2007-09-25 16:18:01 -07:00
Jesse Barnes
0be6e919aa
Add 965GM macro bits
...
Update IS_MOBILE macro to include new IS_I965GM test.
2007-09-24 15:40:55 -07:00
Jesse Barnes
5cc3083179
Merge branch 'master' into modesetting-101 - TTM & typedef removal
...
Conflicts:
linux-core/drmP.h
linux-core/drm_bo.c
linux-core/drm_drv.c
linux-core/drm_objects.h
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
Mostly removing typedefs that snuck into the modesetting code and
updating to the latest TTM APIs. As of today, the i915 driver builds,
but there are likely to be problems, so debugging and bugfixes will
come next.
2007-09-24 14:41:46 -07:00
Eric Anholt
24e33627c5
Merge branch 'bo-set-pin'
...
This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a
separate privileged ioctl to pin buffers like NO_EVICT meant before. The
functionality that was supposed to be covered by NO_MOVE may be reintroduced
later, possibly in a different way, after the superioctl branch is merged.
2007-09-21 17:12:19 -07:00
Eric Anholt
e7bfeb3031
Add some more verbosity to drm_bo_set_pin_req comments.
2007-09-21 16:14:22 -07:00
Stephane Marchesin
7587e9682c
nouveau: fix ppc and get it right this time.
2007-09-21 22:42:39 +02:00
Stephane Marchesin
dc60c452e6
nouveau: fix notifiers on PPC.
2007-09-21 22:27:53 +02:00
Stephane Marchesin
74c6f2f47a
nouveau: add some checks to the nv04 graph switching code.
2007-09-21 22:04:50 +02:00
Eric Anholt
3d3a96ad4e
Merge branch 'origin' into bo-set-pin
2007-09-19 15:55:58 -07:00
Michel Dänzer
e349b58b4a
i915: Reinstate check that drawable has valid information in i915_vblank_swap.
2007-09-18 21:06:55 +01:00
Michel Dänzer
78d111fa96
i915: Fix scheduled buffer swaps.
...
One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
2007-09-18 21:06:55 +01:00
Ian Romanick
a3881ad2fe
Add ioc32 compat layer for XGI DRM.
2007-09-18 11:03:49 -07:00
Jesse Barnes
852232fb80
Remove plane->pipe mapping from SAREA private after all
...
We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
2007-09-12 08:55:33 -07:00
Jesse Barnes
7fdf98051a
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm
2007-09-11 03:50:17 -07:00
Jesse Barnes
3cb8acd5ab
Disambiguate planes & pipes for swap operations
...
This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
2007-09-11 03:48:46 -07:00
Patrice Mandin
0bd8752a0c
nouveau: nv10: add combiner registers
2007-09-10 18:53:48 +02:00
Matthieu Castet
00bb534a54
nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load
2007-09-09 15:49:33 +02:00
Matthieu Castet
b2ee72f440
nouveau : nv10 pipe ctx switch load/save.
...
This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes
2007-09-09 12:13:00 +02:00
Maarten Maathuis
f19d80b046
nouveau: Add Quadro NVS 140 pciid
2007-09-08 22:19:00 +02:00
Ben Skeggs
06bb072595
nouveau: Use nv41 ctxprog/vals on nv42.
2007-09-07 20:07:13 +10:00
Ian Romanick
54c96cbc46
Merge branch 'xgi-0-0-2'
2007-09-06 15:37:52 -07:00
Stephane Marchesin
edf5a86a26
nouveau: fix some nv04 graph switching.
2007-09-06 02:47:06 +02:00
Stephane Marchesin
ff9a019cf0
nouveau: add pure nv30 support.
2007-09-06 02:47:06 +02:00
Maarten Maathuis
ef4944de85
Add context init voodoo and context switch code for NV41.
2007-09-04 18:51:57 +02:00
Ian Romanick
fee49e2071
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
2007-08-31 10:54:55 -07:00
Stephane Marchesin
bac3f49daa
nouveau: nv04 context switching support. Works for starting X up at least.
2007-08-31 01:40:00 +02:00
Stephane Marchesin
69b11f44f0
nouveau: give nv03 the last cut.
2007-08-31 01:40:00 +02:00
Keith Packard
c78e610fa4
Add register defines for hw binning
2007-08-28 12:23:51 -07:00
Dave Airlie
589707b765
drm: remove XFREE86_VERSION macros
2007-08-28 15:17:36 +10:00
Matthieu Castet
a331d2e352
nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
...
- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-26 20:48:32 +02:00
Matthieu Castet
4182fce408
nouveau : nv1x graph reworks
...
- add forgotten init value
- use the same PGRAPH_DEBUG than the blob
- remove init of ddx reg : it should be done with object
- better handle of channel destruction
hope I didn't break anything ;)
2007-08-25 22:10:45 +02:00
Patrice Mandin
502bbdbe14
nouveau: nv10: output a warning if last channel invalid, and switch to next
2007-08-25 00:12:58 +02:00
Patrice Mandin
9875011196
nouveau: nv10: check some NULL pointers inside context switch
2007-08-23 10:20:44 +02:00
Matthieu Castet
8645dac895
nouveau : fix some potential crashes with objects causing hash collision
2007-08-22 23:20:14 +02:00
Ben Skeggs
11c46afe75
nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do.
2007-08-22 13:23:49 +10:00
Ben Skeggs
a654c0341a
nouveau/nv40: Dump extra info on ucode state if ctx switch fails.
2007-08-22 13:19:21 +10:00
Ben Skeggs
81eaff44c4
nouveau: NV4c ctx ucode.
...
Seems we already have a nv4c_ctx_init() somehow, a quick check shows the
ucode matches it still.
2007-08-22 13:09:27 +10:00
Ben Skeggs
ae883c97ad
nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit.
2007-08-22 12:54:26 +10:00
Stephane Marchesin
c8ee6a6cab
nouveau: redo nv30_graph.c. Should work better, but we still lack a couple of cards.
2007-08-22 04:20:50 +02:00
Stephane Marchesin
76337bdb19
nouveau: fix the comment and debug message for PCIGART size
2007-08-22 04:20:50 +02:00
