fdo-mirrors/mesa-drm
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/drm.git synced 2025-12-28 08:40:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

Lindent the via stuff so I can include it in kernel

Browse source
This commit is contained in:
Dave Airlie 2004-10-09 11:12:24 +00:00
parent e09229d6c8
commit fec94a8274
14 changed files with 1002 additions and 1028 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

30
shared-core/via_dma.c
View file

@ -23,7 +23,6 @@ static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
static int via_wait_idle(drm_via_private_t * dev_priv);
/*
* This function needs to be extended whenever a new command set
* is implemented. Currently it works only for the 2D engine
@ -39,8 +38,7 @@ static int via_wait_idle(drm_via_private_t * dev_priv);
* after an update!!!!!!!!!
*/
static int via_check_command_stream(const uint32_t *buf,
unsigned int size)
static int via_check_command_stream(const uint32_t * buf, unsigned int size)
{
uint32_t offset;
@ -48,19 +46,20 @@ static int via_check_command_stream(const uint32_t *buf,
if (size & 7) {
DRM_ERROR("Illegal command buffer size.\n");
return DRM_ERR( EINVAL );
return DRM_ERR(EINVAL);
}
size >>=3;
for (i=0; i<size; ++i) {
offset = *buf;
size >>= 3;
for (i = 0; i < size; ++i) {
offset = *buf;
buf += 2;
if ((offset > ((0x3FF >> 2) | VIA_2D_CMD)) &&
(offset < ((0xC00 >> 2) | VIA_2D_CMD)) ) {
DRM_ERROR("Attempt to access Burst Command / 3D Area.\n");
return DRM_ERR( EINVAL );
if ((offset > ((0x3FF >> 2) | VIA_2D_CMD)) &&
(offset < ((0xC00 >> 2) | VIA_2D_CMD))) {
DRM_ERROR
("Attempt to access Burst Command / 3D Area.\n");
return DRM_ERR(EINVAL);
} else if (offset > ((0xDFF >> 2) | VIA_2D_CMD)) {
DRM_ERROR("Attempt to access DMA or VGA registers.\n");
return DRM_ERR( EINVAL );
return DRM_ERR(EINVAL);
}
/*
@ -72,7 +71,6 @@ static int via_check_command_stream(const uint32_t *buf,
}
return 0;
}
static inline int
via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
@ -220,8 +218,8 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
if (DRM_COPY_FROM_USER(vb, cmd->buf, cmd->size)) {
return DRM_ERR(EFAULT);
}
if ((ret = via_check_command_stream( vb, cmd->size)))
if ((ret = via_check_command_stream(vb, cmd->size)))
return ret;
dev_priv->dma_low += cmd->size;
@ -285,7 +283,7 @@ static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf,
unsigned int i;
int ret;
if ((ret = via_check_command_stream( regbuf, size)))
if ((ret = via_check_command_stream(regbuf, size)))
return ret;
size >>= 3;

2
shared-core/via_drm.h
View file

@ -111,7 +111,7 @@ typedef struct {
} drm_via_fb_t;
typedef struct {
uint32_t context;
uint32_t context;
uint32_t type;
uint32_t size;
unsigned long index;

1
shared/via.h
View file

@ -24,7 +24,6 @@
#ifndef __VIA_H__
#define __VIA_H__
#define DRM(x) viadrv_##x
/* BEAM: Have enabled DMA,DMA_IRQ and VBL_IRQ needed to do this to get standard

52
shared/via_3d_reg.h
View file

@ -51,8 +51,8 @@
/* Transmission Space
*/
#define HC_REG_Hpara0 0x0040
#define HC_REG_HpataAF 0x02fc
#define HC_REG_Hpara0 0x0040
#define HC_REG_HpataAF 0x02fc
/* Read
*/
@ -174,7 +174,7 @@
/* Command
* Command A
*/
#define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000*/
#define HC_HCmdHeader_MASK 0xfe000000 /*0xffe00000 */
#define HC_HE3Fire_MASK 0x00100000
#define HC_HPMType_MASK 0x000f0000
#define HC_HEFlag_MASK 0x0000e000
@ -1046,7 +1046,7 @@
#define HC_XTC_Atex 0x00000007
#define HC_XTC_Acur 0x00000008
#define HC_XTC_HTXnTBLRC 0x00000009
#define HC_XTC_Ctexnext 0x0000000a
#define HC_XTC_Ctexnext 0x0000000a
/*--
*/
#define HC_HTXnTBLCsat_MASK 0x00800000
@ -1066,7 +1066,7 @@
#define HC_HTXnTBLCa_Atex (HC_XTC_Atex << 14)
#define HC_HTXnTBLCa_Acur (HC_XTC_Acur << 14)
#define HC_HTXnTBLCa_HTXnTBLRC (HC_XTC_HTXnTBLRC << 14)
#define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14)
#define HC_HTXnTBLCa_Ctexnext (HC_XTC_Ctexnext << 14)
#define HC_HTXnTBLCb_TOPC (HC_XTC_TOPC << 7)
#define HC_HTXnTBLCb_InvTOPC (HC_XTC_InvTOPC << 7)
#define HC_HTXnTBLCb_TOPCp5 (HC_XTC_TOPCp5 << 7)
@ -1080,7 +1080,7 @@
#define HC_HTXnTBLCb_Atex (HC_XTC_Atex << 7)
#define HC_HTXnTBLCb_Acur (HC_XTC_Acur << 7)
#define HC_HTXnTBLCb_HTXnTBLRC (HC_XTC_HTXnTBLRC << 7)
#define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7)
#define HC_HTXnTBLCb_Ctexnext (HC_XTC_Ctexnext << 7)
#define HC_HTXnTBLCc_TOPC (HC_XTC_TOPC << 0)
#define HC_HTXnTBLCc_InvTOPC (HC_XTC_InvTOPC << 0)
#define HC_HTXnTBLCc_TOPCp5 (HC_XTC_TOPCp5 << 0)
@ -1094,7 +1094,7 @@
#define HC_HTXnTBLCc_Atex (HC_XTC_Atex << 0)
#define HC_HTXnTBLCc_Acur (HC_XTC_Acur << 0)
#define HC_HTXnTBLCc_HTXnTBLRC (HC_XTC_HTXnTBLRC << 0)
#define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0)
#define HC_HTXnTBLCc_Ctexnext (HC_XTC_Ctexnext << 0)
/* HC_SubA_HTXnTBLCop 0x0081
*/
#define HC_HTXnTBLdot_MASK 0x00c00000
@ -1164,7 +1164,7 @@
#define HC_XTA_Acur 0x00000002
#define HC_XTA_HTXnTBLRA 0x00000003
#define HC_XTA_Atex 0x00000004
#define HC_XTA_Atexnext 0x00000005
#define HC_XTA_Atexnext 0x00000005
/*--
*/
#define HC_HTXnTBLAsat_MASK 0x00800000
@ -1181,7 +1181,7 @@
#define HC_HTXnTBLAa_Acur (HC_XTA_Acur << 14)
#define HC_HTXnTBLAa_HTXnTBLRA (HC_XTA_HTXnTBLRA << 14)
#define HC_HTXnTBLAa_Atex (HC_XTA_Atex << 14)
#define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14)
#define HC_HTXnTBLAa_Atexnext (HC_XTA_Atexnext << 14)
#define HC_HTXnTBLAb_TOPA (HC_XTA_TOPA << 7)
#define HC_HTXnTBLAb_InvTOPA (HC_XTA_InvTOPA << 7)
#define HC_HTXnTBLAb_TOPAp5 (HC_XTA_TOPAp5 << 7)
@ -1190,7 +1190,7 @@
#define HC_HTXnTBLAb_Acur (HC_XTA_Acur << 7)
#define HC_HTXnTBLAb_HTXnTBLRA (HC_XTA_HTXnTBLRA << 7)
#define HC_HTXnTBLAb_Atex (HC_XTA_Atex << 7)
#define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7)
#define HC_HTXnTBLAb_Atexnext (HC_XTA_Atexnext << 7)
#define HC_HTXnTBLAc_TOPA (HC_XTA_TOPA << 0)
#define HC_HTXnTBLAc_InvTOPA (HC_XTA_InvTOPA << 0)
#define HC_HTXnTBLAc_TOPAp5 (HC_XTA_TOPAp5 << 0)
@ -1199,7 +1199,7 @@
#define HC_HTXnTBLAc_Acur (HC_XTA_Acur << 0)
#define HC_HTXnTBLAc_HTXnTBLRA (HC_XTA_HTXnTBLRA << 0)
#define HC_HTXnTBLAc_Atex (HC_XTA_Atex << 0)
#define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0)
#define HC_HTXnTBLAc_Atexnext (HC_XTA_Atexnext << 0)
/* HC_SubA_HTXnTBLRAa 0x0089
*/
#define HC_HTXnTBLRAa_MASK 0x00ff0000
@ -1581,24 +1581,24 @@
/******************************************************************************
** Define the AGP command header.
******************************************************************************/
#define HC_ACMD_MASK 0xfe000000
#define HC_ACMD_SUB_MASK 0x0c000000
#define HC_ACMD_HCmdA 0xee000000
#define HC_ACMD_HCmdB 0xec000000
#define HC_ACMD_HCmdC 0xea000000
#define HC_ACMD_H1 0xf0000000
#define HC_ACMD_H2 0xf2000000
#define HC_ACMD_H3 0xf4000000
#define HC_ACMD_H4 0xf6000000
#define HC_ACMD_MASK 0xfe000000
#define HC_ACMD_SUB_MASK 0x0c000000
#define HC_ACMD_HCmdA 0xee000000
#define HC_ACMD_HCmdB 0xec000000
#define HC_ACMD_HCmdC 0xea000000
#define HC_ACMD_H1 0xf0000000
#define HC_ACMD_H2 0xf2000000
#define HC_ACMD_H3 0xf4000000
#define HC_ACMD_H4 0xf6000000
#define HC_ACMD_H1IO_MASK 0x000001ff
#define HC_ACMD_H2IO1_MASK 0x001ff000
#define HC_ACMD_H2IO1_MASK 0x001ff000
#define HC_ACMD_H2IO2_MASK 0x000001ff
#define HC_ACMD_H2IO1_SHIFT 12
#define HC_ACMD_H2IO1_SHIFT 12
#define HC_ACMD_H2IO2_SHIFT 0
#define HC_ACMD_H3IO_MASK 0x000001ff
#define HC_ACMD_H3COUNT_MASK 0x01fff000
#define HC_ACMD_H3COUNT_SHIFT 12
#define HC_ACMD_H3COUNT_MASK 0x01fff000
#define HC_ACMD_H3COUNT_SHIFT 12
#define HC_ACMD_H4ID_MASK 0x000001ff
#define HC_ACMD_H4COUNT_MASK 0x01fffe00
#define HC_ACMD_H4COUNT_SHIFT 9
@ -1616,9 +1616,9 @@
** Define for DMA use
********************************************************************************/
#define HALCYON_HEADER2 0XF210F110
#define HALCYON_FIRECMD 0XEE100000
#define HALCYON_FIRECMD 0XEE100000
#define HALCYON_FIREMASK 0XFFF00000
#define HALCYON_CMDB 0XEC000000
#define HALCYON_CMDB 0XEC000000
#define HALCYON_CMDBMASK 0XFFFE0000
#define HALCYON_SUB_ADDR0 0X00000000
#define HALCYON_HEADER1MASK 0XFFFFFF00

299
shared/via_dma.c
View file

@ -22,8 +22,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv);
static void via_cmdbuf_pause(drm_via_private_t * dev_priv);
static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
static int via_wait_idle(drm_via_private_t * dev_priv);
static int via_wait_idle(drm_via_private_t * dev_priv);
/*
* This function needs to be extended whenever a new command set
@ -40,8 +39,7 @@ static int via_wait_idle(drm_via_private_t * dev_priv);
* after an update!!!!!!!!!
*/
static int via_check_command_stream(const uint32_t *buf,
unsigned int size)
static int via_check_command_stream(const uint32_t * buf, unsigned int size)
{
uint32_t offset;
@ -49,19 +47,20 @@ static int via_check_command_stream(const uint32_t *buf,
if (size & 7) {
DRM_ERROR("Illegal command buffer size.\n");
return DRM_ERR( EINVAL );
return DRM_ERR(EINVAL);
}
size >>=3;
for (i=0; i<size; ++i) {
offset = *buf;
size >>= 3;
for (i = 0; i < size; ++i) {
offset = *buf;
buf += 2;
if ((offset > ((0x3FF >> 2) | VIA_2D_CMD)) &&
(offset < ((0xC00 >> 2) | VIA_2D_CMD)) ) {
DRM_ERROR("Attempt to access Burst Command / 3D Area.\n");
return DRM_ERR( EINVAL );
if ((offset > ((0x3FF >> 2) | VIA_2D_CMD)) &&
(offset < ((0xC00 >> 2) | VIA_2D_CMD))) {
DRM_ERROR
("Attempt to access Burst Command / 3D Area.\n");
return DRM_ERR(EINVAL);
} else if (offset > ((0xDFF >> 2) | VIA_2D_CMD)) {
DRM_ERROR("Attempt to access DMA or VGA registers.\n");
return DRM_ERR( EINVAL );
return DRM_ERR(EINVAL);
}
/*
@ -73,14 +72,13 @@ static int via_check_command_stream(const uint32_t *buf,
}
return 0;
}
static inline int
via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
{
uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
uint32_t cur_addr, hw_addr, next_addr;
volatile uint32_t * hw_addr_ptr;
volatile uint32_t *hw_addr_ptr;
uint32_t count;
hw_addr_ptr = dev_priv->hw_addr_ptr;
cur_addr = agp_base + dev_priv->dma_low;
@ -90,12 +88,13 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
* a large 64KB window between buffer head and tail.
*/
next_addr = cur_addr + size + 64 * 1024;
count = 1000000; /* How long is this? */
count = 1000000; /* How long is this? */
do {
hw_addr = *hw_addr_ptr;
if (count-- == 0) {
DRM_ERROR("via_cmdbuf_wait timed out hw %x dma_low %x\n",
hw_addr, dev_priv->dma_low);
DRM_ERROR
("via_cmdbuf_wait timed out hw %x dma_low %x\n",
hw_addr, dev_priv->dma_low);
return -1;
}
} while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
@ -108,8 +107,8 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
*
* Returns virtual pointer to ring buffer.
*/
static inline uint32_t *
via_check_dma(drm_via_private_t * dev_priv, unsigned int size)
static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
unsigned int size)
{
if ((dev_priv->dma_low + size + 0x400) > dev_priv->dma_high) {
via_cmdbuf_rewind(dev_priv);
@ -118,19 +117,19 @@ via_check_dma(drm_via_private_t * dev_priv, unsigned int size)
return NULL;
}
return (uint32_t*)(dev_priv->dma_ptr + dev_priv->dma_low);
return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
}
int via_dma_cleanup(drm_device_t *dev)
int via_dma_cleanup(drm_device_t * dev)
{
if (dev->dev_private) {
drm_via_private_t *dev_priv =
(drm_via_private_t *) dev->dev_private;
drm_via_private_t *dev_priv =
(drm_via_private_t *) dev->dev_private;
if (dev_priv->ring.virtual_start) {
via_cmdbuf_reset(dev_priv);
drm_core_ioremapfree( &dev_priv->ring.map, dev);
drm_core_ioremapfree(&dev_priv->ring.map, dev);
dev_priv->ring.virtual_start = NULL;
}
}
@ -138,10 +137,9 @@ int via_dma_cleanup(drm_device_t *dev)
return 0;
}
static int via_initialize(drm_device_t *dev,
drm_via_private_t *dev_priv,
drm_via_dma_init_t *init)
static int via_initialize(drm_device_t * dev,
drm_via_private_t * dev_priv,
drm_via_dma_init_t * init)
{
if (!dev_priv || !dev_priv->mmio) {
DRM_ERROR("via_dma_init called before via_map_init\n");
@ -150,7 +148,7 @@ static int via_initialize(drm_device_t *dev,
if (dev_priv->ring.virtual_start != NULL) {
DRM_ERROR("%s called again without calling cleanup\n",
__FUNCTION__);
__FUNCTION__);
return DRM_ERR(EFAULT);
}
@ -160,12 +158,12 @@ static int via_initialize(drm_device_t *dev,
dev_priv->ring.map.flags = 0;
dev_priv->ring.map.mtrr = 0;
drm_core_ioremap( &dev_priv->ring.map, dev );
drm_core_ioremap(&dev_priv->ring.map, dev);
if (dev_priv->ring.map.handle == NULL) {
via_dma_cleanup(dev);
DRM_ERROR("can not ioremap virtual address for"
" ring buffer\n");
" ring buffer\n");
return DRM_ERR(ENOMEM);
}
@ -183,17 +181,17 @@ static int via_initialize(drm_device_t *dev,
return 0;
}
int via_dma_init( DRM_IOCTL_ARGS )
int via_dma_init(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
drm_via_dma_init_t init;
int retcode = 0;
DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *)data, sizeof(init));
DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data,
sizeof(init));
switch(init.func) {
switch (init.func) {
case VIA_INIT_DMA:
retcode = via_initialize(dev, dev_priv, &init);
break;
@ -208,12 +206,10 @@ int via_dma_init( DRM_IOCTL_ARGS )
return retcode;
}
static int via_dispatch_cmdbuffer(drm_device_t *dev,
drm_via_cmdbuffer_t *cmd )
static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
{
drm_via_private_t *dev_priv = dev->dev_private;
uint32_t * vb;
uint32_t *vb;
int ret;
vb = via_check_dma(dev_priv, cmd->size);
@ -223,8 +219,8 @@ static int via_dispatch_cmdbuffer(drm_device_t *dev,
if (DRM_COPY_FROM_USER(vb, cmd->buf, cmd->size)) {
return DRM_ERR(EFAULT);
}
if ((ret = via_check_command_stream( vb, cmd->size)))
if ((ret = via_check_command_stream(vb, cmd->size)))
return ret;
dev_priv->dma_low += cmd->size;
@ -233,8 +229,7 @@ static int via_dispatch_cmdbuffer(drm_device_t *dev,
return 0;
}
static int via_quiescent(drm_device_t *dev)
static int via_quiescent(drm_device_t * dev)
{
drm_via_private_t *dev_priv = dev->dev_private;
@ -244,37 +239,35 @@ static int via_quiescent(drm_device_t *dev)
return 0;
}
int via_flush_ioctl( DRM_IOCTL_ARGS )
int via_flush_ioctl(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("via_flush_ioctl called without lock held\n");
return DRM_ERR(EINVAL);
}
return via_quiescent(dev);
return via_quiescent(dev);
}
int via_cmdbuffer( DRM_IOCTL_ARGS )
int via_cmdbuffer(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_via_cmdbuffer_t cmdbuf;
int ret;
DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_via_cmdbuffer_t *)data,
sizeof(cmdbuf) );
DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
sizeof(cmdbuf));
DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size);
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("via_cmdbuffer called without lock held\n");
return DRM_ERR(EINVAL);
}
ret = via_dispatch_cmdbuffer( dev, &cmdbuf );
ret = via_dispatch_cmdbuffer(dev, &cmdbuf);
if (ret) {
return ret;
}
@ -282,30 +275,29 @@ int via_cmdbuffer( DRM_IOCTL_ARGS )
return 0;
}
static int via_parse_pci_cmdbuffer( drm_device_t *dev, const char *buf,
unsigned int size )
static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf,
unsigned int size)
{
drm_via_private_t *dev_priv = dev->dev_private;
uint32_t offset, value;
const uint32_t *regbuf = (uint32_t *)buf;
const uint32_t *regbuf = (uint32_t *) buf;
unsigned int i;
int ret;
if ((ret = via_check_command_stream( regbuf, size)))
if ((ret = via_check_command_stream(regbuf, size)))
return ret;
size >>=3 ;
for ( i=0; i<size; ++i ) {
size >>= 3;
for (i = 0; i < size; ++i) {
offset = (*regbuf++ & ~VIA_2D_CMD) << 2;
value = *regbuf++;
VIA_WRITE( offset, value );
VIA_WRITE(offset, value);
}
return 0;
}
static int via_dispatch_pci_cmdbuffer(drm_device_t *dev,
drm_via_cmdbuffer_t *cmd )
static int via_dispatch_pci_cmdbuffer(drm_device_t * dev,
drm_via_cmdbuffer_t * cmd)
{
drm_via_private_t *dev_priv = dev->dev_private;
char *hugebuf;
@ -318,42 +310,42 @@ static int via_dispatch_pci_cmdbuffer(drm_device_t *dev,
* Small buffers must, on the other hand be handled fast.
*/
if ( cmd->size > VIA_MAX_PCI_SIZE ) {
return DRM_ERR( ENOMEM );
} else if ( cmd->size > VIA_PREALLOCATED_PCI_SIZE ) {
if (NULL == (hugebuf = (char *) kmalloc( cmd-> size, GFP_KERNEL )))
return DRM_ERR( ENOMEM );
if (DRM_COPY_FROM_USER( hugebuf, cmd->buf, cmd->size ))
if (cmd->size > VIA_MAX_PCI_SIZE) {
return DRM_ERR(ENOMEM);
} else if (cmd->size > VIA_PREALLOCATED_PCI_SIZE) {
if (NULL == (hugebuf = (char *)kmalloc(cmd->size, GFP_KERNEL)))
return DRM_ERR(ENOMEM);
if (DRM_COPY_FROM_USER(hugebuf, cmd->buf, cmd->size))
return DRM_ERR(EFAULT);
ret = via_parse_pci_cmdbuffer( dev, hugebuf, cmd->size );
kfree( hugebuf );
ret = via_parse_pci_cmdbuffer(dev, hugebuf, cmd->size);
kfree(hugebuf);
} else {
if (DRM_COPY_FROM_USER( dev_priv->pci_buf, cmd->buf, cmd->size ))
if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
return DRM_ERR(EFAULT);
ret = via_parse_pci_cmdbuffer( dev, dev_priv->pci_buf, cmd->size );
ret =
via_parse_pci_cmdbuffer(dev, dev_priv->pci_buf, cmd->size);
}
return ret;
}
int via_pci_cmdbuffer( DRM_IOCTL_ARGS )
int via_pci_cmdbuffer(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_via_cmdbuffer_t cmdbuf;
int ret;
DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_via_cmdbuffer_t *)data,
sizeof(cmdbuf) );
DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
sizeof(cmdbuf));
DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size);
DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf,
cmdbuf.size);
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("via_pci_cmdbuffer called without lock held\n");
return DRM_ERR(EINVAL);
}
ret = via_dispatch_pci_cmdbuffer( dev, &cmdbuf );
ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf);
if (ret) {
return ret;
}
@ -361,9 +353,6 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS )
return 0;
}
/************************************************************************/
#include "via_3d_reg.h"
@ -374,13 +363,12 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS )
#define VIA_REG_STATUS 0x400
#define VIA_REG_TRANSET 0x43C
#define VIA_REG_TRANSPACE 0x440
/* VIA_REG_STATUS(0x400): Engine Status */
#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */
#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */
#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */
#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */
/* VIA_REG_STATUS(0x400): Engine Status */
#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */
#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */
#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */
#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */
#define SetReg2DAGP(nReg, nData) { \
*((uint32_t *)(vb)) = ((nReg) >> 2) | 0xF0000000; \
@ -391,10 +379,10 @@ int via_pci_cmdbuffer( DRM_IOCTL_ARGS )
static uint32_t via_swap_count = 0;
static inline uint32_t *
via_align_buffer(drm_via_private_t * dev_priv, uint32_t * vb, int qw_count)
static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
uint32_t * vb, int qw_count)
{
for ( ; qw_count > 0; --qw_count) {
for (; qw_count > 0; --qw_count) {
*vb++ = (0xcc000000 | (dev_priv->dma_low & 0xffffff));
*vb++ = (0xdd400000 | via_swap_count);
dev_priv->dma_low += 8;
@ -408,29 +396,28 @@ via_align_buffer(drm_via_private_t * dev_priv, uint32_t * vb, int qw_count)
*
* Returns virtual pointer to ring buffer.
*/
static inline uint32_t * via_get_dma(drm_via_private_t * dev_priv)
static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
{
return (uint32_t*)(dev_priv->dma_ptr + dev_priv->dma_low);
return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
}
static int via_wait_idle(drm_via_private_t * dev_priv)
{
int count = 10000000;
while (count-- && (VIA_READ(VIA_REG_STATUS) &
(VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)));
(VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
VIA_3D_ENG_BUSY))) ;
return count;
}
static inline void
via_dummy_bitblt(drm_via_private_t * dev_priv)
static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
{
uint32_t * vb = via_get_dma(dev_priv);
/* GEDST*/
uint32_t *vb = via_get_dma(dev_priv);
/* GEDST */
SetReg2DAGP(0x0C, (0 | (0 << 16)));
/* GEWD*/
/* GEWD */
SetReg2DAGP(0x10, 0 | (0 << 16));
/* BITBLT*/
/* BITBLT */
SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
}
@ -442,7 +429,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
uint32_t end_addr, end_addr_lo;
uint32_t qw_pad_count;
uint32_t command;
uint32_t * vb;
uint32_t *vb;
dev_priv->dma_low = 0;
vb = via_get_dma(dev_priv);
@ -454,28 +441,27 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF));
end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
((end_addr & 0xff000000) >> 16));
((end_addr & 0xff000000) >> 16));
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) |
(VIA_REG_TRANSPACE>>2);
*vb++ = (HC_ParaType_PreCR<<16);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
(VIA_REG_TRANSPACE >> 2);
*vb++ = (HC_ParaType_PreCR << 16);
dev_priv->dma_low += 8;
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3);
pause_addr_lo = ((HC_SubA_HAGPBpL<<24) |
HC_HAGPBpID_PAUSE |
(pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24));
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
pause_addr_lo = ((HC_SubA_HAGPBpL << 24) |
HC_HAGPBpID_PAUSE | (pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24));
vb = via_align_buffer(dev_priv, vb, qw_pad_count-1);
vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
*vb++ = pause_addr_hi;
*vb++ = pause_addr_lo;
dev_priv->dma_low += 8;
dev_priv->last_pause_ptr = vb-1;
dev_priv->last_pause_ptr = vb - 1;
VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
VIA_WRITE(VIA_REG_TRANSPACE, command);
@ -494,7 +480,7 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
uint32_t pause_addr, pause_addr_lo, pause_addr_hi;
uint32_t start_addr;
uint32_t end_addr, end_addr_lo;
uint32_t * vb;
uint32_t *vb;
uint32_t qw_pad_count;
uint32_t command;
uint32_t jump_addr, jump_addr_lo, jump_addr_hi;
@ -508,38 +494,37 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
via_cmdbuf_wait(dev_priv, 48);
via_dummy_bitblt(dev_priv);
via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE);
via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE);
/* At end of buffer, rewind with a JUMP command. */
vb = via_get_dma(dev_priv);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) |
(VIA_REG_TRANSPACE>>2);
*vb++ = (HC_ParaType_PreCR<<16);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
(VIA_REG_TRANSPACE >> 2);
*vb++ = (HC_ParaType_PreCR << 16);
dev_priv->dma_low += 8;
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
start_addr = agp_base;
end_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3);
end_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
jump_addr = end_addr;
jump_addr_lo = ((HC_SubA_HAGPBpL<<24) | HC_HAGPBpID_JUMP |
jump_addr_lo = ((HC_SubA_HAGPBpL << 24) | HC_HAGPBpID_JUMP |
(jump_addr & 0xffffff));
jump_addr_hi = ((HC_SubA_HAGPBpH<<24) | (jump_addr >> 24));
jump_addr_hi = ((HC_SubA_HAGPBpH << 24) | (jump_addr >> 24));
end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
((end_addr & 0xff000000) >> 16));
((end_addr & 0xff000000) >> 16));
*vb++ = command;
*vb++ = end_addr_lo;
dev_priv->dma_low += 8;
vb = via_align_buffer(dev_priv, vb, qw_pad_count-1);
vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
/* Now at beginning of buffer, make sure engine will pause here. */
dev_priv->dma_low = 0;
@ -552,19 +537,19 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
((end_addr & 0xff000000) >> 16));
((end_addr & 0xff000000) >> 16));
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3);
pause_addr_lo = ((HC_SubA_HAGPBpL<<24) | HC_HAGPBpID_PAUSE |
(pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24));
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
pause_addr_lo = ((HC_SubA_HAGPBpL << 24) | HC_HAGPBpID_PAUSE |
(pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24));
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) |
(VIA_REG_TRANSPACE>>2);
*vb++ = (HC_ParaType_PreCR<<16);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
(VIA_REG_TRANSPACE >> 2);
*vb++ = (HC_ParaType_PreCR << 16);
dev_priv->dma_low += 8;
*vb++ = pause_addr_hi;
@ -582,7 +567,7 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
dev_priv->dma_low += 8;
*dev_priv->last_pause_ptr = jump_addr_lo;
dev_priv->last_pause_ptr = vb-1;
dev_priv->last_pause_ptr = vb - 1;
if (VIA_READ(0x41c) & 0x80000000) {
VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
@ -601,33 +586,33 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
{
uint32_t agp_base;
uint32_t pause_addr, pause_addr_lo, pause_addr_hi;
uint32_t * vb;
uint32_t *vb;
uint32_t qw_pad_count;
via_cmdbuf_wait(dev_priv, 0x200);
vb = via_get_dma(dev_priv);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET>>2)<<12) |
(VIA_REG_TRANSPACE>>2);
*vb++ = (HC_ParaType_PreCR<<16);
*vb++ = HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
(VIA_REG_TRANSPACE >> 2);
*vb++ = (HC_ParaType_PreCR << 16);
dev_priv->dma_low += 8;
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE>>3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count<<3);
pause_addr_lo = ((HC_SubA_HAGPBpL<<24) | cmd_type |
(pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH<<24) | (pause_addr >> 24));
pause_addr = agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
pause_addr_lo = ((HC_SubA_HAGPBpL << 24) | cmd_type |
(pause_addr & 0xffffff));
pause_addr_hi = ((HC_SubA_HAGPBpH << 24) | (pause_addr >> 24));
vb = via_align_buffer(dev_priv, vb, qw_pad_count-1);
vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
*vb++ = pause_addr_hi;
*vb++ = pause_addr_lo;
dev_priv->dma_low += 8;
*dev_priv->last_pause_ptr = pause_addr_lo;
dev_priv->last_pause_ptr = vb-1;
dev_priv->last_pause_ptr = vb - 1;
if (VIA_READ(0x41c) & 0x80000000) {
VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));

156
shared/via_drm.h
View file

@ -52,8 +52,8 @@
#define VIA_LOG_MIN_TEX_REGION_SIZE 16
#endif
#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define VIA_UPLOAD_CTX 0x4
#define VIA_UPLOAD_BUFFERS 0x8
#define VIA_UPLOAD_TEX0 0x10
@ -73,12 +73,11 @@
#define DRM_IOCTL_VIA_FLUSH DRM_IO(0x49)
#define DRM_IOCTL_VIA_PCICMD DRM_IOW(0x4A, drm_via_cmdbuffer_t)
/* Indices into buf.Setup where various bits of state are mirrored per
* context and per buffer. These can be fired at the card as a unit,
* or in a piecewise fashion as required.
*/
#define VIA_TEX_SETUP_SIZE 8
/* Flags for clear ioctl
@ -90,120 +89,119 @@
#define VIDEO 0
#define AGP 1
typedef struct {
unsigned long offset;
unsigned long size;
} drm_via_agp_t;
unsigned long offset;
unsigned long size;
} drm_via_agp_t;
typedef struct {
unsigned long offset;
unsigned long size;
} drm_via_fb_t;
unsigned long offset;
unsigned long size;
} drm_via_fb_t;
typedef struct {
uint32_t context;
uint32_t type;
unsigned long size;
unsigned long index;
unsigned long offset;
} drm_via_mem_t;
uint32_t context;
uint32_t type;
unsigned long size;
unsigned long index;
unsigned long offset;
} drm_via_mem_t;
typedef struct _drm_via_init {
enum {
VIA_INIT_MAP = 0x01,
VIA_CLEANUP_MAP = 0x02
} func;
enum {
VIA_INIT_MAP = 0x01,
VIA_CLEANUP_MAP = 0x02
} func;
unsigned long sarea_priv_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long agpAddr;
unsigned long sarea_priv_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long agpAddr;
} drm_via_init_t;
typedef struct _drm_via_futex {
enum {
VIA_FUTEX_WAIT = 0x00,
VIA_FUTEX_WAKE = 0X01
} func;
uint32_t ms;
uint32_t lock;
uint32_t val;
enum {
VIA_FUTEX_WAIT = 0x00,
VIA_FUTEX_WAKE = 0X01
} func;
uint32_t ms;
uint32_t lock;
uint32_t val;
} drm_via_futex_t;
typedef struct _drm_via_dma_init {
enum {
VIA_INIT_DMA = 0x01,
VIA_CLEANUP_DMA = 0x02
} func;
enum {
VIA_INIT_DMA = 0x01,
VIA_CLEANUP_DMA = 0x02
} func;
unsigned long offset;
unsigned long size;
unsigned long reg_pause_addr;
unsigned long offset;
unsigned long size;
unsigned long reg_pause_addr;
} drm_via_dma_init_t;
typedef struct _drm_via_cmdbuffer {
char *buf;
unsigned long size;
char *buf;
unsigned long size;
} drm_via_cmdbuffer_t;
/* Warning: If you change the SAREA structure you must change the Xserver
* structure as well */
typedef struct _drm_via_tex_region {
unsigned char next, prev; /* indices to form a circular LRU */
unsigned char inUse; /* owned by a client, or free? */
int age; /* tracked by clients to update local LRU's */
unsigned char next, prev; /* indices to form a circular LRU */
unsigned char inUse; /* owned by a client, or free? */
int age; /* tracked by clients to update local LRU's */
} drm_via_tex_region_t;
typedef struct _drm_via_sarea {
unsigned int dirty;
unsigned int nbox;
drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
int texAge; /* last time texture was uploaded */
int ctxOwner; /* last context to upload state */
int vertexPrim;
unsigned int dirty;
unsigned int nbox;
drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
int texAge; /* last time texture was uploaded */
int ctxOwner; /* last context to upload state */
int vertexPrim;
/*
* Below is for XvMC.
* We want the lock integers alone on, and aligned to, a cache line.
* Therefore this somewhat strange construct.
*/
/*
* Below is for XvMC.
* We want the lock integers alone on, and aligned to, a cache line.
* Therefore this somewhat strange construct.
*/
char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
} drm_via_sarea_t;
typedef struct _drm_via_flush_agp {
unsigned int offset;
unsigned int size;
unsigned int index;
int discard; /* client is finished with the buffer? */
unsigned int offset;
unsigned int size;
unsigned int index;
int discard; /* client is finished with the buffer? */
} drm_via_flush_agp_t;
typedef struct _drm_via_flush_sys {
unsigned int offset;
unsigned int size;
unsigned long index;
int discard; /* client is finished with the buffer? */
unsigned int offset;
unsigned int size;
unsigned long index;
int discard; /* client is finished with the buffer? */
} drm_via_flush_sys_t;
#ifdef __KERNEL__
int via_fb_init( DRM_IOCTL_ARGS );
int via_mem_alloc( DRM_IOCTL_ARGS );
int via_mem_free( DRM_IOCTL_ARGS );
int via_agp_init( DRM_IOCTL_ARGS );
int via_map_init( DRM_IOCTL_ARGS );
int via_decoder_futex( DRM_IOCTL_ARGS );
int via_dma_init( DRM_IOCTL_ARGS );
int via_cmdbuffer( DRM_IOCTL_ARGS );
int via_flush_ioctl( DRM_IOCTL_ARGS );
int via_pci_cmdbuffer( DRM_IOCTL_ARGS );
int via_fb_init(DRM_IOCTL_ARGS);
int via_mem_alloc(DRM_IOCTL_ARGS);
int via_mem_free(DRM_IOCTL_ARGS);
int via_agp_init(DRM_IOCTL_ARGS);
int via_map_init(DRM_IOCTL_ARGS);
int via_decoder_futex(DRM_IOCTL_ARGS);
int via_dma_init(DRM_IOCTL_ARGS);
int via_cmdbuffer(DRM_IOCTL_ARGS);
int via_flush_ioctl(DRM_IOCTL_ARGS);
int via_pci_cmdbuffer(DRM_IOCTL_ARGS);
#endif
#endif /* _VIA_DRM_H_ */
#endif /* _VIA_DRM_H_ */

2
shared/via_drv.c
View file

@ -38,7 +38,6 @@
#define DRIVER_MINOR 0
#define DRIVER_PATCHLEVEL 0
#define DRIVER_IOCTLS \
[DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_VIA_FREEMEM)] = { via_mem_free, 1, 0 }, \
@ -51,5 +50,4 @@
[DRM_IOCTL_NR(DRM_IOCTL_VIA_FLUSH)] = { via_flush_ioctl, 1, 0}, \
[DRM_IOCTL_NR(DRM_IOCTL_VIA_PCICMD)] = { via_pci_cmdbuffer, 1, 0}
#include "drm_core.h"

54
shared/via_drv.h
View file

@ -26,30 +26,28 @@
#include "via_drm.h"
typedef struct drm_via_ring_buffer {
drm_map_t map;
char * virtual_start;
drm_map_t map;
char *virtual_start;
} drm_via_ring_buffer_t;
typedef struct drm_via_private {
drm_via_sarea_t *sarea_priv;
drm_map_t *sarea;
drm_map_t *fb;
drm_map_t *mmio;
unsigned long agpAddr;
wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
char * dma_ptr;
unsigned int dma_low;
unsigned int dma_high;
unsigned int dma_offset;
uint32_t * last_pause_ptr;
volatile uint32_t * hw_addr_ptr;
drm_via_ring_buffer_t ring;
drm_via_sarea_t *sarea_priv;
drm_map_t *sarea;
drm_map_t *fb;
drm_map_t *mmio;
unsigned long agpAddr;
wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
char *dma_ptr;
unsigned int dma_low;
unsigned int dma_high;
unsigned int dma_offset;
uint32_t *last_pause_ptr;
volatile uint32_t *hw_addr_ptr;
drm_via_ring_buffer_t ring;
char pci_buf[VIA_PREALLOCATED_PCI_SIZE];
} drm_via_private_t;
/* VIA MMIO register access */
#define VIA_BASE ((dev_priv->mmio))
@ -58,22 +56,22 @@ typedef struct drm_via_private {
#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val)
extern int via_init_context(drm_device_t *dev, int context);
extern int via_final_context(drm_device_t *dev, int context);
extern int via_init_context(drm_device_t * dev, int context);
extern int via_final_context(drm_device_t * dev, int context);
extern int via_do_init_map(drm_device_t *dev, drm_via_init_t *init);
extern int via_do_cleanup_map(drm_device_t *dev);
extern int via_do_init_map(drm_device_t * dev, drm_via_init_t * init);
extern int via_do_cleanup_map(drm_device_t * dev);
extern int via_map_init(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int via_driver_vblank_wait(drm_device_t* dev, unsigned int* sequence);
extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
extern irqreturn_t via_driver_irq_handler( DRM_IRQ_ARGS );
extern void via_driver_irq_preinstall( drm_device_t *dev );
extern void via_driver_irq_postinstall( drm_device_t *dev );
extern void via_driver_irq_uninstall( drm_device_t *dev );
extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
extern void via_driver_irq_preinstall(drm_device_t * dev);
extern void via_driver_irq_postinstall(drm_device_t * dev);
extern void via_driver_irq_uninstall(drm_device_t * dev);
extern int via_dma_cleanup(drm_device_t *dev);
extern int via_dma_cleanup(drm_device_t * dev);
extern int via_dma_cleanup(drm_device_t *dev);
extern int via_dma_cleanup(drm_device_t * dev);
#endif

560
shared/via_ds.c
View file

@ -36,93 +36,92 @@ extern unsigned int VIA_DEBUG;
set_t *via_setInit(void)
{
int i;
set_t *set;
set = (set_t *)DRM(alloc)(sizeof(set_t), DRM_MEM_DRIVER);
for (i = 0; i < SET_SIZE; i++) {
set->list[i].free_next = i+1;
set->list[i].alloc_next = -1;
}
set->list[SET_SIZE-1].free_next = -1;
set->free = 0;
set->alloc = -1;
set->trace = -1;
return set;
int i;
set_t *set;
set = (set_t *) DRM(alloc) (sizeof(set_t), DRM_MEM_DRIVER);
for (i = 0; i < SET_SIZE; i++) {
set->list[i].free_next = i + 1;
set->list[i].alloc_next = -1;
}
set->list[SET_SIZE - 1].free_next = -1;
set->free = 0;
set->alloc = -1;
set->trace = -1;
return set;
}
int via_setAdd(set_t *set, ITEM_TYPE item)
int via_setAdd(set_t * set, ITEM_TYPE item)
{
int free = set->free;
if (free != -1) {
set->list[free].val = item;
set->free = set->list[free].free_next;
}
else {
return 0;
}
set->list[free].alloc_next = set->alloc;
set->alloc = free;
set->list[free].free_next = -1;
return 1;
int free = set->free;
if (free != -1) {
set->list[free].val = item;
set->free = set->list[free].free_next;
} else {
return 0;
}
set->list[free].alloc_next = set->alloc;
set->alloc = free;
set->list[free].free_next = -1;
return 1;
}
int via_setDel(set_t *set, ITEM_TYPE item)
int via_setDel(set_t * set, ITEM_TYPE item)
{
int alloc = set->alloc;
int prev = -1;
while (alloc != -1) {
if (set->list[alloc].val == item) {
if (prev != -1)
set->list[prev].alloc_next = set->list[alloc].alloc_next;
else
set->alloc = set->list[alloc].alloc_next;
break;
}
prev = alloc;
alloc = set->list[alloc].alloc_next;
}
int alloc = set->alloc;
int prev = -1;
if (alloc == -1)
return 0;
set->list[alloc].free_next = set->free;
set->free = alloc;
set->list[alloc].alloc_next = -1;
while (alloc != -1) {
if (set->list[alloc].val == item) {
if (prev != -1)
set->list[prev].alloc_next =
set->list[alloc].alloc_next;
else
set->alloc = set->list[alloc].alloc_next;
break;
}
prev = alloc;
alloc = set->list[alloc].alloc_next;
}
return 1;
if (alloc == -1)
return 0;
set->list[alloc].free_next = set->free;
set->free = alloc;
set->list[alloc].alloc_next = -1;
return 1;
}
/* setFirst -> setAdd -> setNext is wrong */
int via_setFirst(set_t *set, ITEM_TYPE *item)
int via_setFirst(set_t * set, ITEM_TYPE * item)
{
if (set->alloc == -1)
return 0;
if (set->alloc == -1)
return 0;
*item = set->list[set->alloc].val;
set->trace = set->list[set->alloc].alloc_next;
*item = set->list[set->alloc].val;
set->trace = set->list[set->alloc].alloc_next;
return 1;
return 1;
}
int via_setNext(set_t *set, ITEM_TYPE *item)
int via_setNext(set_t * set, ITEM_TYPE * item)
{
if (set->trace == -1)
return 0;
*item = set->list[set->trace].val;
set->trace = set->list[set->trace].alloc_next;
if (set->trace == -1)
return 0;
return 1;
*item = set->list[set->trace].val;
set->trace = set->list[set->trace].alloc_next;
return 1;
}
int via_setDestroy(set_t *set)
int via_setDestroy(set_t * set)
{
DRM(free)(set, sizeof(set_t), DRM_MEM_DRIVER);
DRM(free) (set, sizeof(set_t), DRM_MEM_DRIVER);
return 1;
return 1;
}
#define ISFREE(bptr) ((bptr)->free)
@ -130,261 +129,262 @@ int via_setDestroy(set_t *set)
#define PRINTF(fmt, arg...) do{}while(0)
#define fprintf(fmt, arg...) do{}while(0)
void via_mmDumpMemInfo( memHeap_t *heap )
void via_mmDumpMemInfo(memHeap_t * heap)
{
TMemBlock *p;
TMemBlock *p;
PRINTF ("Memory heap %p:\n", heap);
if (heap == 0)
PRINTF (" heap == 0\n");
else {
p = (TMemBlock *)heap;
while (p) {
PRINTF (" Offset:%08x, Size:%08x, %c%c\n",p->ofs,p->size,
p->free ? '.':'U',
p->reserved ? 'R':'.');
p = p->next;
}
}
PRINTF ("End of memory blocks\n");
PRINTF("Memory heap %p:\n", heap);
if (heap == 0)
PRINTF(" heap == 0\n");
else {
p = (TMemBlock *) heap;
while (p) {
PRINTF(" Offset:%08x, Size:%08x, %c%c\n", p->ofs,
p->size, p->free ? '.' : 'U',
p->reserved ? 'R' : '.');
p = p->next;
}
}
PRINTF("End of memory blocks\n");
}
memHeap_t *via_mmInit(int ofs,
int size)
memHeap_t *via_mmInit(int ofs, int size)
{
PMemBlock blocks;
if (size <= 0)
return 0;
PMemBlock blocks;
blocks = (TMemBlock *)DRM(calloc)(1,sizeof(TMemBlock),DRM_MEM_DRIVER);
if (blocks) {
blocks->ofs = ofs;
blocks->size = size;
blocks->free = 1;
return (memHeap_t *)blocks;
} else
return 0;
if (size <= 0)
return 0;
blocks =
(TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock), DRM_MEM_DRIVER);
if (blocks) {
blocks->ofs = ofs;
blocks->size = size;
blocks->free = 1;
return (memHeap_t *) blocks;
} else
return 0;
}
memHeap_t *via_mmAddRange(memHeap_t *heap,
int ofs,
int size)
memHeap_t *via_mmAddRange(memHeap_t * heap, int ofs, int size)
{
PMemBlock blocks;
blocks = (TMemBlock *)DRM(calloc)(2,sizeof(TMemBlock),DRM_MEM_DRIVER);
if (blocks) {
blocks[0].size = size;
blocks[0].free = 1;
blocks[0].ofs = ofs;
blocks[0].next = &blocks[1];
PMemBlock blocks;
blocks =
(TMemBlock *) DRM(calloc) (2, sizeof(TMemBlock), DRM_MEM_DRIVER);
/* Discontinuity - stops JoinBlock from trying to join non-adjacent
* ranges.
*/
blocks[1].size = 0;
blocks[1].free = 0;
blocks[1].ofs = ofs+size;
blocks[1].next = (PMemBlock) heap;
return (memHeap_t *)blocks;
}
else
return heap;
if (blocks) {
blocks[0].size = size;
blocks[0].free = 1;
blocks[0].ofs = ofs;
blocks[0].next = &blocks[1];
/* Discontinuity - stops JoinBlock from trying to join non-adjacent
* ranges.
*/
blocks[1].size = 0;
blocks[1].free = 0;
blocks[1].ofs = ofs + size;
blocks[1].next = (PMemBlock) heap;
return (memHeap_t *) blocks;
} else
return heap;
}
static TMemBlock* SliceBlock(TMemBlock *p,
int startofs, int size,
static TMemBlock *SliceBlock(TMemBlock * p,
int startofs, int size,
int reserved, int alignment)
{
TMemBlock *newblock;
TMemBlock *newblock;
/* break left */
if (startofs > p->ofs) {
newblock = (TMemBlock*)DRM(calloc)(1,sizeof(TMemBlock),DRM_MEM_DRIVER);
newblock->ofs = startofs;
newblock->size = p->size - (startofs - p->ofs);
newblock->free = 1;
newblock->next = p->next;
p->size -= newblock->size;
p->next = newblock;
p = newblock;
}
/* break left */
if (startofs > p->ofs) {
newblock =
(TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock),
DRM_MEM_DRIVER);
newblock->ofs = startofs;
newblock->size = p->size - (startofs - p->ofs);
newblock->free = 1;
newblock->next = p->next;
p->size -= newblock->size;
p->next = newblock;
p = newblock;
}
/* break right */
if (size < p->size) {
newblock = (TMemBlock*)DRM(calloc)(1,sizeof(TMemBlock),DRM_MEM_DRIVER);
newblock->ofs = startofs + size;
newblock->size = p->size - size;
newblock->free = 1;
newblock->next = p->next;
p->size = size;
p->next = newblock;
}
/* break right */
if (size < p->size) {
newblock =
(TMemBlock *) DRM(calloc) (1, sizeof(TMemBlock),
DRM_MEM_DRIVER);
newblock->ofs = startofs + size;
newblock->size = p->size - size;
newblock->free = 1;
newblock->next = p->next;
p->size = size;
p->next = newblock;
}
/* p = middle block */
p->align = alignment;
p->free = 0;
p->reserved = reserved;
return p;
/* p = middle block */
p->align = alignment;
p->free = 0;
p->reserved = reserved;
return p;
}
PMemBlock via_mmAllocMem(memHeap_t *heap, int size, int align2, int startSearch)
PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
int startSearch)
{
int mask,startofs,endofs;
TMemBlock *p;
int mask, startofs, endofs;
TMemBlock *p;
if (!heap || align2 < 0 || size <= 0)
return NULL;
mask = (1 << align2)-1;
startofs = 0;
p = (TMemBlock *)heap;
while (p) {
if (ISFREE(p)) {
startofs = (p->ofs + mask) & ~mask;
if ( startofs < startSearch )
startofs = startSearch;
endofs = startofs+size;
if (endofs <= (p->ofs+p->size))
break;
}
p = p->next;
}
if (!p)
return NULL;
p = SliceBlock(p,startofs,size,0,mask+1);
p->heap = heap;
return p;
if (!heap || align2 < 0 || size <= 0)
return NULL;
mask = (1 << align2) - 1;
startofs = 0;
p = (TMemBlock *) heap;
while (p) {
if (ISFREE(p)) {
startofs = (p->ofs + mask) & ~mask;
if (startofs < startSearch)
startofs = startSearch;
endofs = startofs + size;
if (endofs <= (p->ofs + p->size))
break;
}
p = p->next;
}
if (!p)
return NULL;
p = SliceBlock(p, startofs, size, 0, mask + 1);
p->heap = heap;
return p;
}
static __inline__ int Join2Blocks(TMemBlock *p)
static __inline__ int Join2Blocks(TMemBlock * p)
{
if (p->free && p->next && p->next->free) {
TMemBlock *q = p->next;
p->size += q->size;
p->next = q->next;
DRM(free)(q,sizeof(TMemBlock),DRM_MEM_DRIVER);
return 1;
}
return 0;
if (p->free && p->next && p->next->free) {
TMemBlock *q = p->next;
p->size += q->size;
p->next = q->next;
DRM(free) (q, sizeof(TMemBlock), DRM_MEM_DRIVER);
return 1;
}
return 0;
}
int via_mmFreeMem(PMemBlock b)
{
TMemBlock *p,*prev;
TMemBlock *p, *prev;
if (!b)
return 0;
if (!b->heap) {
fprintf(stderr, "no heap\n");
return -1;
}
p = b->heap;
prev = NULL;
while (p && p != b) {
prev = p;
p = p->next;
}
if (!p || p->free || p->reserved) {
if (!p)
fprintf(stderr, "block not found in heap\n");
else if (p->free)
fprintf(stderr, "block already free\n");
else
fprintf(stderr, "block is reserved\n");
return -1;
}
p->free = 1;
Join2Blocks(p);
if (prev)
Join2Blocks(prev);
return 0;
if (!b)
return 0;
if (!b->heap) {
fprintf(stderr, "no heap\n");
return -1;
}
p = b->heap;
prev = NULL;
while (p && p != b) {
prev = p;
p = p->next;
}
if (!p || p->free || p->reserved) {
if (!p)
fprintf(stderr, "block not found in heap\n");
else if (p->free)
fprintf(stderr, "block already free\n");
else
fprintf(stderr, "block is reserved\n");
return -1;
}
p->free = 1;
Join2Blocks(p);
if (prev)
Join2Blocks(prev);
return 0;
}
int via_mmReserveMem(memHeap_t *heap, int offset,int size)
int via_mmReserveMem(memHeap_t * heap, int offset, int size)
{
int endofs;
TMemBlock *p;
int endofs;
TMemBlock *p;
if (!heap || size <= 0)
return -1;
endofs = offset+size;
p = (TMemBlock *)heap;
while (p && p->ofs <= offset) {
if (ISFREE(p) && endofs <= (p->ofs+p->size)) {
SliceBlock(p,offset,size,1,1);
return 0;
}
p = p->next;
}
return -1;
if (!heap || size <= 0)
return -1;
endofs = offset + size;
p = (TMemBlock *) heap;
while (p && p->ofs <= offset) {
if (ISFREE(p) && endofs <= (p->ofs + p->size)) {
SliceBlock(p, offset, size, 1, 1);
return 0;
}
p = p->next;
}
return -1;
}
int via_mmFreeReserved(memHeap_t *heap, int offset)
int via_mmFreeReserved(memHeap_t * heap, int offset)
{
TMemBlock *p,*prev;
TMemBlock *p, *prev;
if (!heap)
return -1;
p = (TMemBlock *)heap;
prev = NULL;
while (p && p->ofs != offset) {
prev = p;
p = p->next;
}
if (!p || !p->reserved)
return -1;
p->free = 1;
p->reserved = 0;
Join2Blocks(p);
if (prev)
Join2Blocks(prev);
return 0;
if (!heap)
return -1;
p = (TMemBlock *) heap;
prev = NULL;
while (p && p->ofs != offset) {
prev = p;
p = p->next;
}
if (!p || !p->reserved)
return -1;
p->free = 1;
p->reserved = 0;
Join2Blocks(p);
if (prev)
Join2Blocks(prev);
return 0;
}
void via_mmDestroy(memHeap_t *heap)
void via_mmDestroy(memHeap_t * heap)
{
TMemBlock *p,*q;
TMemBlock *p, *q;
if (!heap)
return;
p = (TMemBlock *)heap;
while (p) {
q = p->next;
DRM(free)(p,sizeof(TMemBlock),DRM_MEM_DRIVER);
p = q;
}
if (!heap)
return;
p = (TMemBlock *) heap;
while (p) {
q = p->next;
DRM(free) (p, sizeof(TMemBlock), DRM_MEM_DRIVER);
p = q;
}
}

59
shared/via_ds.h
View file

@ -23,7 +23,7 @@
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef _via_ds_h_
#ifndef _via_ds_h_
#define _via_ds_h_
#include "via.h"
@ -34,37 +34,36 @@
typedef unsigned int ITEM_TYPE;
typedef struct {
ITEM_TYPE val;
int alloc_next, free_next;
ITEM_TYPE val;
int alloc_next, free_next;
} list_item_t;
typedef struct {
int alloc;
int free;
int trace;
list_item_t list[SET_SIZE];
int alloc;
int free;
int trace;
list_item_t list[SET_SIZE];
} set_t;
set_t *via_setInit(void);
int via_setAdd(set_t *set, ITEM_TYPE item);
int via_setDel(set_t *set, ITEM_TYPE item);
int via_setFirst(set_t *set, ITEM_TYPE *item);
int via_setNext(set_t *set, ITEM_TYPE *item);
int via_setDestroy(set_t *set);
int via_setAdd(set_t * set, ITEM_TYPE item);
int via_setDel(set_t * set, ITEM_TYPE item);
int via_setFirst(set_t * set, ITEM_TYPE * item);
int via_setNext(set_t * set, ITEM_TYPE * item);
int via_setDestroy(set_t * set);
#endif
#ifndef MM_INC
#define MM_INC
struct mem_block_t {
struct mem_block_t *next;
struct mem_block_t *heap;
int ofs,size;
int align;
int free:1;
int reserved:1;
struct mem_block_t *next;
struct mem_block_t *heap;
int ofs, size;
int align;
int free:1;
int reserved:1;
};
typedef struct mem_block_t TMemBlock;
typedef struct mem_block_t *PMemBlock;
@ -73,13 +72,19 @@ typedef struct mem_block_t *PMemBlock;
typedef struct mem_block_t memHeap_t;
static __inline__ int mmBlockSize(PMemBlock b)
{ return b->size; }
{
return b->size;
}
static __inline__ int mmOffset(PMemBlock b)
{ return b->ofs; }
{
return b->ofs;
}
static __inline__ void mmMarkReserved(PMemBlock b)
{ b->reserved = 1; }
{
b->reserved = 1;
}
/*
* input: total size in bytes
@ -87,22 +92,22 @@ static __inline__ void mmMarkReserved(PMemBlock b)
*/
memHeap_t *via_mmInit(int ofs, int size);
PMemBlock via_mmAllocMem(memHeap_t *heap, int size, int align2, int startSearch);
PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
int startSearch);
/*
* Free block starts at offset
* input: pointer to a block
* return: 0 if OK, -1 if error
*/
int via_mmFreeMem(PMemBlock b);
int via_mmFreeMem(PMemBlock b);
/*
* destroy MM
*/
void via_mmDestroy(memHeap_t *mmInit);
void via_mmDestroy(memHeap_t * mmInit);
/* For debugging purpose. */
void via_mmDumpMemInfo(memHeap_t *mmInit);
void via_mmDumpMemInfo(memHeap_t * mmInit);
#endif

170
shared/via_irq.c
View file

@ -40,126 +40,128 @@
#include "via_drv.h"
#define VIA_REG_INTERRUPT 0x200
/* VIA_REG_INTERRUPT */
#define VIA_IRQ_GLOBAL (1 << 31)
#define VIA_IRQ_VBI_ENABLE (1 << 19)
#define VIA_IRQ_VBI_PENDING (1 << 3)
irqreturn_t via_driver_irq_handler( DRM_IRQ_ARGS )
irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
{
drm_device_t* dev = (drm_device_t*)arg;
drm_via_private_t* dev_priv = (drm_via_private_t*)dev->dev_private;
u32 status;
int handled = 0;
status = VIA_READ(VIA_REG_INTERRUPT);
DRM_DEBUG("viadrv_irq_handler Status: %x\n",status);
if(status & VIA_IRQ_VBI_PENDING){
atomic_inc(&dev->vbl_received);
DRM_WAKEUP(&dev->vbl_queue);
DRM(vbl_send_signals)(dev);
handled = 1;
}
/* Acknowlege interrupts ?? */
VIA_WRITE(VIA_REG_INTERRUPT, status);
drm_device_t *dev = (drm_device_t *) arg;
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
u32 status;
int handled = 0;
status = VIA_READ(VIA_REG_INTERRUPT);
DRM_DEBUG("viadrv_irq_handler Status: %x\n", status);
if (status & VIA_IRQ_VBI_PENDING) {
atomic_inc(&dev->vbl_received);
DRM_WAKEUP(&dev->vbl_queue);
DRM(vbl_send_signals) (dev);
handled = 1;
}
/* Acknowlege interrupts ?? */
VIA_WRITE(VIA_REG_INTERRUPT, status);
if (handled)
return IRQ_HANDLED;
return IRQ_HANDLED;
else
return IRQ_NONE;
}
static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t* dev_priv)
static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
{
u32 status;
if(dev_priv){
/* Acknowlege interrupts ?? */
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_VBI_PENDING);
}
u32 status;
if (dev_priv) {
/* Acknowlege interrupts ?? */
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_VBI_PENDING);
}
}
int via_driver_vblank_wait(drm_device_t* dev, unsigned int* sequence)
int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
{
drm_via_private_t* dev_priv = (drm_via_private_t*)dev->dev_private;
unsigned int cur_vblank;
int ret = 0;
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
unsigned int cur_vblank;
int ret = 0;
DRM_DEBUG("viadrv_vblank_wait\n");
if(!dev_priv){
DRM_ERROR("%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
}
DRM_DEBUG("viadrv_vblank_wait\n");
if (!dev_priv) {
DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
return -EINVAL;
}
viadrv_acknowledge_irqs(dev_priv);
viadrv_acknowledge_irqs(dev_priv);
/* Assume that the user has missed the current sequence number
* by about a day rather than she wants to wait for years
* using vertical blanks...
*/
DRM_WAIT_ON(ret, dev->vbl_queue, 3*DRM_HZ,
(((cur_vblank = atomic_read(&dev->vbl_received)) -
*sequence ) <= (1<<23)));
/* Assume that the user has missed the current sequence number
* by about a day rather than she wants to wait for years
* using vertical blanks...
*/
DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
(((cur_vblank = atomic_read(&dev->vbl_received)) -
*sequence) <= (1 << 23)));
*sequence = cur_vblank;
return ret;
*sequence = cur_vblank;
return ret;
}
/*
* drm_dma.h hooks
*/
void via_driver_irq_preinstall(drm_device_t* dev){
drm_via_private_t* dev_priv = (drm_via_private_t *)dev->dev_private;
u32 status;
void via_driver_irq_preinstall(drm_device_t * dev)
{
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
u32 status;
DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
if(dev_priv){
DRM_DEBUG("mmio: %p\n", dev_priv->mmio);
status = VIA_READ(VIA_REG_INTERRUPT);
DRM_DEBUG("intreg: %x\n", status & VIA_IRQ_VBI_ENABLE);
// Clear VSync interrupt regs
VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBI_ENABLE);
DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
if (dev_priv) {
DRM_DEBUG("mmio: %p\n", dev_priv->mmio);
status = VIA_READ(VIA_REG_INTERRUPT);
DRM_DEBUG("intreg: %x\n", status & VIA_IRQ_VBI_ENABLE);
/* Clear bits if they're already high */
viadrv_acknowledge_irqs(dev_priv);
}
// Clear VSync interrupt regs
VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBI_ENABLE);
/* Clear bits if they're already high */
viadrv_acknowledge_irqs(dev_priv);
}
}
void via_driver_irq_postinstall(drm_device_t* dev){
drm_via_private_t* dev_priv = (drm_via_private_t *)dev->dev_private;
u32 status;
void via_driver_irq_postinstall(drm_device_t * dev)
{
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
u32 status;
DRM_DEBUG("via_driver_irq_postinstall\n");
if(dev_priv){
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
| VIA_IRQ_VBI_ENABLE);
/* Some magic, oh for some data sheets ! */
DRM_DEBUG("via_driver_irq_postinstall\n");
if (dev_priv) {
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
| VIA_IRQ_VBI_ENABLE);
/* Some magic, oh for some data sheets ! */
VIA_WRITE8(0x83d4, 0x11);
VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
VIA_WRITE8(0x83d4, 0x11);
VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
}
}
}
void via_driver_irq_uninstall(drm_device_t* dev){
drm_via_private_t* dev_priv = (drm_via_private_t *)dev->dev_private;
u32 status;
void via_driver_irq_uninstall(drm_device_t * dev)
{
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
u32 status;
DRM_DEBUG("driver_irq_uninstall)\n");
if(dev_priv){
DRM_DEBUG("driver_irq_uninstall)\n");
if (dev_priv) {
/* Some more magic, oh for some data sheets ! */
/* Some more magic, oh for some data sheets ! */
VIA_WRITE8(0x83d4, 0x11);
VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
VIA_WRITE8(0x83d4, 0x11);
VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBI_ENABLE);
}
status = VIA_READ(VIA_REG_INTERRUPT);
VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBI_ENABLE);
}
}

82
shared/via_map.c
View file

@ -25,19 +25,19 @@
#include "drmP.h"
#include "via_drv.h"
int via_do_init_map(drm_device_t *dev, drm_via_init_t *init)
int via_do_init_map(drm_device_t * dev, drm_via_init_t * init)
{
drm_via_private_t *dev_priv;
unsigned int i;
DRM_DEBUG("%s\n", __FUNCTION__);
dev_priv = DRM(alloc)(sizeof(drm_via_private_t), DRM_MEM_DRIVER);
dev_priv = DRM(alloc) (sizeof(drm_via_private_t), DRM_MEM_DRIVER);
if (dev_priv == NULL)
return -ENOMEM;
memset(dev_priv, 0, sizeof(drm_via_private_t));
DRM_GETSAREA();
if (!dev_priv->sarea) {
DRM_ERROR("could not find sarea!\n");
@ -60,23 +60,22 @@ int via_do_init_map(drm_device_t *dev, drm_via_init_t *init)
via_do_cleanup_map(dev);
return -EINVAL;
}
dev_priv->sarea_priv =
(drm_via_sarea_t *)((u8 *)dev_priv->sarea->handle +
init->sarea_priv_offset);
(drm_via_sarea_t *) ((u8 *) dev_priv->sarea->handle +
init->sarea_priv_offset);
dev_priv->agpAddr = init->agpAddr;
for (i=0; i<VIA_NR_XVMC_LOCKS; ++i)
DRM_INIT_WAITQUEUE( &(dev_priv->decoder_queue[i]) );
for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i)
DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i]));
dev->dev_private = (void *)dev_priv;
return 0;
}
int via_do_cleanup_map(drm_device_t *dev)
int via_do_cleanup_map(drm_device_t * dev)
{
if (dev->dev_private) {
@ -84,61 +83,56 @@ int via_do_cleanup_map(drm_device_t *dev)
via_dma_cleanup(dev);
DRM(free)(dev_priv, sizeof(drm_via_private_t),
DRM_MEM_DRIVER);
DRM(free) (dev_priv, sizeof(drm_via_private_t), DRM_MEM_DRIVER);
dev->dev_private = NULL;
}
return 0;
}
int via_map_init( DRM_IOCTL_ARGS )
int via_map_init(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
DRM_DEVICE;
drm_via_init_t init;
DRM_DEBUG("%s\n", __FUNCTION__);
DRM_COPY_FROM_USER_IOCTL(init, (drm_via_init_t *)data, sizeof(init));
DRM_COPY_FROM_USER_IOCTL(init, (drm_via_init_t *) data, sizeof(init));
switch (init.func) {
case VIA_INIT_MAP:
case VIA_INIT_MAP:
return via_do_init_map(dev, &init);
case VIA_CLEANUP_MAP:
case VIA_CLEANUP_MAP:
return via_do_cleanup_map(dev);
}
return -EINVAL;
}
int via_decoder_futex( DRM_IOCTL_ARGS )
int via_decoder_futex(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_via_futex_t fx;
volatile int *lock;
drm_via_private_t *dev_priv = (drm_via_private_t*) dev->dev_private;
drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
int ret = 0;
DRM_DEVICE;
drm_via_futex_t fx;
volatile int *lock;
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
int ret = 0;
DRM_COPY_FROM_USER_IOCTL(fx, (drm_via_futex_t *) data, sizeof(fx));
if (fx.lock > VIA_NR_XVMC_LOCKS)
return -EFAULT;
DRM_COPY_FROM_USER_IOCTL(fx, (drm_via_futex_t *) data, sizeof(fx));
lock = XVMCLOCKPTR(sAPriv,fx.lock);
if (fx.lock > VIA_NR_XVMC_LOCKS)
return -EFAULT;
switch(fx.func) {
case VIA_FUTEX_WAIT:
DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx.lock],
(fx.ms / 10)*(DRM_HZ/100),
*lock != fx.val);
return ret;
case VIA_FUTEX_WAKE:
DRM_WAKEUP( &(dev_priv->decoder_queue[fx.lock]) );
return 0;
}
return 0;
lock = XVMCLOCKPTR(sAPriv, fx.lock);
switch (fx.func) {
case VIA_FUTEX_WAIT:
DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx.lock],
(fx.ms / 10) * (DRM_HZ / 100), *lock != fx.val);
return ret;
case VIA_FUTEX_WAKE:
DRM_WAKEUP(&(dev_priv->decoder_queue[fx.lock]));
return 0;
}
return 0;
}

541
shared/via_mm.c
View file

@ -33,331 +33,328 @@
unsigned int VIA_DEBUG = 1;
typedef struct {
int used;
int context;
set_t *sets[2]; /* 0 for frame buffer, 1 for AGP , 2 for System*/
int used;
int context;
set_t *sets[2]; /* 0 for frame buffer, 1 for AGP , 2 for System */
} via_context_t;
static via_context_t global_ppriv[MAX_CONTEXT];
static int add_alloc_set(int context, int type, unsigned int val)
{
int i, retval = 0;
for (i = 0; i < MAX_CONTEXT; i++) {
if (global_ppriv[i].used &&
global_ppriv[i].context == context) {
retval = via_setAdd(global_ppriv[i].sets[type], val);
break;
}
}
return retval;
int i, retval = 0;
for (i = 0; i < MAX_CONTEXT; i++) {
if (global_ppriv[i].used && global_ppriv[i].context == context) {
retval = via_setAdd(global_ppriv[i].sets[type], val);
break;
}
}
return retval;
}
static int del_alloc_set(int context, int type, unsigned int val)
{
int i, retval = 0;
for (i = 0; i < MAX_CONTEXT; i++)
if (global_ppriv[i].used &&
global_ppriv[i].context == context) {
retval = via_setDel(global_ppriv[i].sets[type], val);
break;
}
return retval;
{
int i, retval = 0;
for (i = 0; i < MAX_CONTEXT; i++)
if (global_ppriv[i].used && global_ppriv[i].context == context) {
retval = via_setDel(global_ppriv[i].sets[type], val);
break;
}
return retval;
}
/* agp memory management */
/* agp memory management */
static memHeap_t *AgpHeap = NULL;
int via_agp_init( DRM_IOCTL_ARGS )
int via_agp_init(DRM_IOCTL_ARGS)
{
drm_via_agp_t agp;
DRM_COPY_FROM_USER_IOCTL(agp, (drm_via_agp_t *)data, sizeof(agp));
drm_via_agp_t agp;
AgpHeap = via_mmInit(agp.offset, agp.size);
DRM_COPY_FROM_USER_IOCTL(agp, (drm_via_agp_t *) data, sizeof(agp));
DRM_DEBUG("offset = %lu, size = %lu", agp.offset, agp.size);
return 0;
AgpHeap = via_mmInit(agp.offset, agp.size);
DRM_DEBUG("offset = %lu, size = %lu", agp.offset, agp.size);
return 0;
}
/* fb memory management */
/* fb memory management */
static memHeap_t *FBHeap = NULL;
int via_fb_init( DRM_IOCTL_ARGS )
int via_fb_init(DRM_IOCTL_ARGS)
{
drm_via_fb_t fb;
drm_via_fb_t fb;
DRM_COPY_FROM_USER_IOCTL(fb, (drm_via_fb_t *)data, sizeof(fb));
DRM_COPY_FROM_USER_IOCTL(fb, (drm_via_fb_t *) data, sizeof(fb));
FBHeap = via_mmInit(fb.offset, fb.size);
FBHeap = via_mmInit(fb.offset, fb.size);
DRM_DEBUG("offset = %lu, size = %lu", fb.offset, fb.size);
DRM_DEBUG("offset = %lu, size = %lu", fb.offset, fb.size);
return 0;
return 0;
}
int via_init_context(struct drm_device *dev, int context)
{
int i;
for (i = 0; i < MAX_CONTEXT ; i++)
if (global_ppriv[i].used &&
(global_ppriv[i].context == context))
break;
if (i >= MAX_CONTEXT) {
for (i = 0; i < MAX_CONTEXT ; i++) {
if (!global_ppriv[i].used) {
global_ppriv[i].context = context;
global_ppriv[i].used = 1;
global_ppriv[i].sets[0] = via_setInit();
global_ppriv[i].sets[1] = via_setInit();
DRM_DEBUG("init allocation set, socket=%d,"
" context = %d\n", i, context);
break;
}
}
if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
(global_ppriv[i].sets[1] == NULL)) {
return 0;
}
}
return 1;
int i;
for (i = 0; i < MAX_CONTEXT; i++)
if (global_ppriv[i].used &&
(global_ppriv[i].context == context))
break;
if (i >= MAX_CONTEXT) {
for (i = 0; i < MAX_CONTEXT; i++) {
if (!global_ppriv[i].used) {
global_ppriv[i].context = context;
global_ppriv[i].used = 1;
global_ppriv[i].sets[0] = via_setInit();
global_ppriv[i].sets[1] = via_setInit();
DRM_DEBUG("init allocation set, socket=%d,"
" context = %d\n", i, context);
break;
}
}
if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
(global_ppriv[i].sets[1] == NULL)) {
return 0;
}
}
return 1;
}
int via_final_context(struct drm_device *dev, int context)
{
int i;
for (i=0; i<MAX_CONTEXT; i++)
if (global_ppriv[i].used &&
(global_ppriv[i].context == context))
break;
if (i < MAX_CONTEXT) {
set_t *set;
unsigned int item;
int retval;
DRM_DEBUG("find socket %d, context = %d\n", i, context);
/* Video Memory */
set = global_ppriv[i].sets[0];
retval = via_setFirst(set, &item);
while (retval) {
DRM_DEBUG("free video memory 0x%x\n", item);
via_mmFreeMem((PMemBlock)item);
retval = via_setNext(set, &item);
}
via_setDestroy(set);
/* AGP Memory */
set = global_ppriv[i].sets[1];
retval = via_setFirst(set, &item);
while (retval) {
DRM_DEBUG("free agp memory 0x%x\n", item);
via_mmFreeMem((PMemBlock)item);
retval = via_setNext(set, &item);
}
via_setDestroy(set);
global_ppriv[i].used = 0;
}
int i;
for (i = 0; i < MAX_CONTEXT; i++)
if (global_ppriv[i].used &&
(global_ppriv[i].context == context))
break;
if (i < MAX_CONTEXT) {
set_t *set;
unsigned int item;
int retval;
DRM_DEBUG("find socket %d, context = %d\n", i, context);
/* Video Memory */
set = global_ppriv[i].sets[0];
retval = via_setFirst(set, &item);
while (retval) {
DRM_DEBUG("free video memory 0x%x\n", item);
via_mmFreeMem((PMemBlock) item);
retval = via_setNext(set, &item);
}
via_setDestroy(set);
/* AGP Memory */
set = global_ppriv[i].sets[1];
retval = via_setFirst(set, &item);
while (retval) {
DRM_DEBUG("free agp memory 0x%x\n", item);
via_mmFreeMem((PMemBlock) item);
retval = via_setNext(set, &item);
}
via_setDestroy(set);
global_ppriv[i].used = 0;
}
#if defined(__linux__)
/* Linux specific until context tracking code gets ported to BSD */
/* Linux specific until context tracking code gets ported to BSD */
/* Last context, perform cleanup */
if (dev->ctx_count == 1 && dev->dev_private) {
if (dev->irq) DRM(irq_uninstall)(dev);
if (dev->irq)
DRM(irq_uninstall) (dev);
via_do_cleanup_map(dev);
}
#endif
return 1;
}
int via_mem_alloc( DRM_IOCTL_ARGS)
{
drm_via_mem_t mem;
DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *)data, sizeof(mem));
switch (mem.type) {
case VIDEO :
if (via_fb_alloc(&mem) < 0)
return -EFAULT;
DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *)data, mem,
sizeof(mem));
return 0;
case AGP :
if (via_agp_alloc(&mem) < 0)
return -EFAULT;
DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *)data, mem,
sizeof(mem));
return 0;
}
return -EFAULT;
return 1;
}
int via_fb_alloc(drm_via_mem_t* mem)
int via_mem_alloc(DRM_IOCTL_ARGS)
{
drm_via_mm_t fb;
PMemBlock block;
int retval = 0;
if (!FBHeap)
return -1;
drm_via_mem_t mem;
fb.size = mem->size;
fb.context = mem->context;
block = via_mmAllocMem(FBHeap, fb.size, 5, 0);
if (block) {
fb.offset = block->ofs;
fb.free = (unsigned int)block;
if (!add_alloc_set(fb.context, VIDEO, fb.free)) {
DRM_DEBUG("adding to allocation set fails\n");
via_mmFreeMem((PMemBlock)fb.free);
retval = -1;
}
}
else {
fb.offset = 0;
fb.size = 0;
fb.free = 0;
retval = -1;
}
mem->offset = fb.offset;
mem->index = fb.free;
DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size,
(int)fb.offset);
return retval;
}
int via_agp_alloc(drm_via_mem_t* mem)
{
drm_via_mm_t agp;
PMemBlock block;
int retval = 0;
if (!AgpHeap)
return -1;
agp.size = mem->size;
agp.context = mem->context;
block = via_mmAllocMem(AgpHeap, agp.size, 5, 0);
if (block) {
agp.offset = block->ofs;
agp.free = (unsigned int)block;
if (!add_alloc_set(agp.context, AGP, agp.free)) {
DRM_DEBUG("adding to allocation set fails\n");
via_mmFreeMem((PMemBlock)agp.free);
retval = -1;
}
}
else {
agp.offset = 0;
agp.size = 0;
agp.free = 0;
}
mem->offset = agp.offset;
mem->index = agp.free;
DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size,
(unsigned int)agp.offset);
return retval;
}
int via_mem_free( DRM_IOCTL_ARGS )
{
drm_via_mem_t mem;
DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *)data, sizeof(mem));
switch (mem.type) {
case VIDEO :
if (via_fb_free(&mem) == 0)
return 0;
break;
case AGP :
if (via_agp_free(&mem) == 0)
return 0;
break;
}
return -EFAULT;
}
int via_fb_free(drm_via_mem_t* mem)
{
drm_via_mm_t fb;
int retval = 0;
if (!FBHeap) {
return -1;
}
fb.free = mem->index;
fb.context = mem->context;
if (!fb.free)
{
return -1;
}
via_mmFreeMem((PMemBlock)fb.free);
if (!del_alloc_set(fb.context, VIDEO, fb.free))
{
retval = -1;
}
DRM_DEBUG("free fb, free = %d\n", fb.free);
return retval;
}
int via_agp_free(drm_via_mem_t* mem)
{
drm_via_mm_t agp;
int retval = 0;
agp.free = mem->index;
agp.context = mem->context;
if (!agp.free)
return -1;
via_mmFreeMem((PMemBlock)agp.free);
if (!del_alloc_set(agp.context, AGP, agp.free)) {
retval = -1;
DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem));
switch (mem.type) {
case VIDEO:
if (via_fb_alloc(&mem) < 0)
return -EFAULT;
DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem,
sizeof(mem));
return 0;
case AGP:
if (via_agp_alloc(&mem) < 0)
return -EFAULT;
DRM_COPY_TO_USER_IOCTL((drm_via_mem_t *) data, mem,
sizeof(mem));
return 0;
}
DRM_DEBUG("free agp, free = %d\n", agp.free);
return retval;
return -EFAULT;
}
int via_fb_alloc(drm_via_mem_t * mem)
{
drm_via_mm_t fb;
PMemBlock block;
int retval = 0;
if (!FBHeap)
return -1;
fb.size = mem->size;
fb.context = mem->context;
block = via_mmAllocMem(FBHeap, fb.size, 5, 0);
if (block) {
fb.offset = block->ofs;
fb.free = (unsigned int)block;
if (!add_alloc_set(fb.context, VIDEO, fb.free)) {
DRM_DEBUG("adding to allocation set fails\n");
via_mmFreeMem((PMemBlock) fb.free);
retval = -1;
}
} else {
fb.offset = 0;
fb.size = 0;
fb.free = 0;
retval = -1;
}
mem->offset = fb.offset;
mem->index = fb.free;
DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size,
(int)fb.offset);
return retval;
}
int via_agp_alloc(drm_via_mem_t * mem)
{
drm_via_mm_t agp;
PMemBlock block;
int retval = 0;
if (!AgpHeap)
return -1;
agp.size = mem->size;
agp.context = mem->context;
block = via_mmAllocMem(AgpHeap, agp.size, 5, 0);
if (block) {
agp.offset = block->ofs;
agp.free = (unsigned int)block;
if (!add_alloc_set(agp.context, AGP, agp.free)) {
DRM_DEBUG("adding to allocation set fails\n");
via_mmFreeMem((PMemBlock) agp.free);
retval = -1;
}
} else {
agp.offset = 0;
agp.size = 0;
agp.free = 0;
}
mem->offset = agp.offset;
mem->index = agp.free;
DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size,
(unsigned int)agp.offset);
return retval;
}
int via_mem_free(DRM_IOCTL_ARGS)
{
drm_via_mem_t mem;
DRM_COPY_FROM_USER_IOCTL(mem, (drm_via_mem_t *) data, sizeof(mem));
switch (mem.type) {
case VIDEO:
if (via_fb_free(&mem) == 0)
return 0;
break;
case AGP:
if (via_agp_free(&mem) == 0)
return 0;
break;
}
return -EFAULT;
}
int via_fb_free(drm_via_mem_t * mem)
{
drm_via_mm_t fb;
int retval = 0;
if (!FBHeap) {
return -1;
}
fb.free = mem->index;
fb.context = mem->context;
if (!fb.free) {
return -1;
}
via_mmFreeMem((PMemBlock) fb.free);
if (!del_alloc_set(fb.context, VIDEO, fb.free)) {
retval = -1;
}
DRM_DEBUG("free fb, free = %d\n", fb.free);
return retval;
}
int via_agp_free(drm_via_mem_t * mem)
{
drm_via_mm_t agp;
int retval = 0;
agp.free = mem->index;
agp.context = mem->context;
if (!agp.free)
return -1;
via_mmFreeMem((PMemBlock) agp.free);
if (!del_alloc_set(agp.context, AGP, agp.free)) {
retval = -1;
}
DRM_DEBUG("free agp, free = %d\n", agp.free);
return retval;
}
EXPORT_SYMBOL(via_fb_alloc);
EXPORT_SYMBOL(via_fb_free);
void DRM(driver_register_fns)(drm_device_t *dev)
{
dev->driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL;
void DRM(driver_register_fns) (drm_device_t * dev) {
dev->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ |
DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL;
dev->fn_tbl.context_ctor = via_init_context;
dev->fn_tbl.context_dtor = via_final_context;
dev->fn_tbl.vblank_wait = via_driver_vblank_wait;

22
shared/via_mm.h
View file

@ -25,21 +25,21 @@
#define _via_drm_mm_h_
typedef struct {
unsigned int context;
unsigned int size;
unsigned long offset;
unsigned int free;
unsigned int context;
unsigned int size;
unsigned long offset;
unsigned int free;
} drm_via_mm_t;
typedef struct {
unsigned int size;
unsigned long handle;
void *virtual;
unsigned int size;
unsigned long handle;
void *virtual;
} drm_via_dma_t;
int via_fb_alloc(drm_via_mem_t *mem);
int via_fb_free(drm_via_mem_t *mem);
int via_agp_alloc(drm_via_mem_t *mem);
int via_agp_free(drm_via_mem_t *mem);
int via_fb_alloc(drm_via_mem_t * mem);
int via_fb_free(drm_via_mem_t * mem);
int via_agp_alloc(drm_via_mem_t * mem);
int via_agp_free(drm_via_mem_t * mem);
#endif