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This commit is contained in:
Keith Whitwell 2002-07-03 10:35:45 +00:00
parent 89b1bc3ee4
commit f53833d1ac
3 changed files with 21 additions and 8 deletions
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3
linux/radeon_drm.h
View file

@ -118,7 +118,8 @@
#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */
#define R200_EMIT_VTE_CNTL 48 /* vte/1 */
#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */
#define RADEON_MAX_STATE_PACKETS 50
#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */
#define RADEON_MAX_STATE_PACKETS 51
/* Commands understood by cmd_buffer ioctl. More can be added but

3
linux/radeon_drv.h
View file

@ -481,6 +481,7 @@ extern int radeon_cp_flip( struct inode *inode, struct file *filp,
# define RADEON_CNTL_HOSTDATA_BLT 0x00009400
# define RADEON_CNTL_PAINT_MULTI 0x00009A00
# define RADEON_CNTL_BITBLT_MULTI 0x00009B00
# define RADEON_CCE_SET_SCISSORS 0xC0001E00
#define RADEON_CP_PACKET_MASK 0xC0000000
#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000
@ -560,6 +561,8 @@ extern int radeon_cp_flip( struct inode *inode, struct file *filp,
#define R200_RE_AUX_SCISSOR_CNTL 0x26f0
#define R200_SE_VTE_CNTL 0x20b0
#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250
#define R200_PP_TAM_DEBUG3 0x2d9c
#define SE_VAP_CNTL__TCL_ENA_MASK 0x00000001
#define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK 0x00010000

23
linux/radeon_state.c
View file

@ -48,13 +48,21 @@ static inline void radeon_emit_clip_rect( drm_radeon_private_t *dev_priv,
DRM_DEBUG( " box: x1=%d y1=%d x2=%d y2=%d\n",
box->x1, box->y1, box->x2, box->y2 );
BEGIN_RING( 4 );
OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) );
OUT_RING( (box->y1 << 16) | box->x1 );
OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) );
/* OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) );*/
OUT_RING( (box->y2 << 16) | box->x2 );
ADVANCE_RING();
#if 1
BEGIN_RING( 4 );
OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) );
OUT_RING( (box->y1 << 16) | box->x1 );
OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) );
/* OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) );*/
OUT_RING( (box->y2 << 16) | box->x2 );
ADVANCE_RING();
#else
BEGIN_RING( 3 );
OUT_RING( CP_PACKET3( RADEON_CCE_SET_SCISSORS, 1 ));
OUT_RING( (box->y1 << 16) | box->x1 );
OUT_RING( (box->y2 << 16) | box->x2 );
ADVANCE_RING();
#endif
}
/* Emit 1.1 state
@ -271,6 +279,7 @@ static struct {
{ R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5" },
{ R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL" },
{ R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" },
{ R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3" },
};