From e4bd1ba753641672fe4f108142b94fa2a1a7220c Mon Sep 17 00:00:00 2001 From: "Jesse.Zhang" Date: Tue, 1 Jul 2025 08:54:35 +0800 Subject: [PATCH] drm/amdgpu: Add user queue HQD count to hw_ip info MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a new field userq_num_hqds to drm_amdgpu_info_hw_ip to expose the number of available hardware queue descriptors (HQDs) for user queues. This allows userspace to query the maximum number of user queues that can be created for a particular IP block. the patch link in driver side: https://lists.freedesktop.org/archives/amd-gfx/2025-June/126686.html https://lists.freedesktop.org/archives/amd-gfx/2025-July/126981.html v2: rename userq_num_hqds to userq_num_slots (Marek) Signed-off-by: Jesse Zhang Reviewed-by: Marek Olšák --- include/drm/amdgpu_drm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 8db4df39..a39fd6c9 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h @@ -1484,6 +1484,8 @@ struct drm_amdgpu_info_hw_ip { __u32 available_rings; /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */ __u32 ip_discovery_version; + /* Userq available slots */ + __u32 userq_num_slots; }; /* GFX metadata BO sizes and alignment info (in bytes) */