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nouveau: Make nv20 use the nv30 PGRAPH ctx functions.

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This commit is contained in:
Pekka Paalanen 2007-09-29 23:06:29 +03:00
parent 88bdb38cea
commit dc592c8b7b
3 changed files with 29 additions and 6 deletions
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8
shared-core/nouveau_state.c
View file

@ -166,10 +166,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fb.takedown = nv10_fb_takedown;
engine->graph.init = nv20_graph_init;
engine->graph.takedown = nv20_graph_takedown;
engine->graph.create_context = nv20_graph_create_context;
engine->graph.destroy_context = nv20_graph_destroy_context;
engine->graph.load_context = nv20_graph_load_context;
engine->graph.save_context = nv20_graph_save_context;
engine->graph.create_context = nv30_graph_create_context;
engine->graph.destroy_context = nv30_graph_destroy_context;
engine->graph.load_context = nv30_graph_load_context;
engine->graph.save_context = nv30_graph_save_context;
engine->fifo.init = nouveau_fifo_init;
engine->fifo.takedown = nouveau_stub_takedown;
engine->fifo.create_context = nv10_fifo_create_context;

2
shared-core/nv20_graph.c
View file

@ -29,6 +29,7 @@
#define NV20_GRCTX_SIZE (3529*4)
#if 0
int nv20_graph_create_context(struct nouveau_channel *chan) {
struct drm_device *dev = chan->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
@ -56,6 +57,7 @@ void nv20_graph_destroy_context(struct nouveau_channel *chan) {
INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, 0);
}
#endif /* 0 */
static void nv20_graph_rdi(struct drm_device *dev) {
struct drm_nouveau_private *dev_priv = dev->dev_private;

25
shared-core/nv30_graph.c
View file

@ -23,11 +23,23 @@
*
*/
/*#define NV20_GRCTX_SIZE (3529*4)*/
#define NV28_GRCTX_SIZE (3529*4)
#define NV30_31_GRCTX_SIZE (22392)
#define NV34_GRCTX_SIZE (18140)
#define NV35_36_GRCTX_SIZE (22396)
static void nv28_graph_context_init(struct drm_device *dev,
struct nouveau_gpuobj *ctx)
{
int i;
(void)dev;
}
static void nv30_31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
@ -2715,6 +2727,10 @@ int nv30_graph_create_context(struct nouveau_channel *chan)
int ret;
switch (dev_priv->chipset) {
case 0x28:
ctx_size = NV28_GRCTX_SIZE;
ctx_init = nv28_graph_context_init;
break;
case 0x30:
case 0x31:
ctx_size = NV30_31_GRCTX_SIZE;
@ -2732,7 +2748,9 @@ int nv30_graph_create_context(struct nouveau_channel *chan)
default:
ctx_size = 0;
ctx_init = nv35_36_graph_context_init;
DRM_ERROR("Please contact the devs if you want your NV%x card to work\n",dev_priv->chipset);
DRM_ERROR("Please contact the devs if you want your NV%x"
" card to work\n", dev_priv->chipset);
return -ENOSYS;
break;
}
@ -2744,7 +2762,10 @@ int nv30_graph_create_context(struct nouveau_channel *chan)
/* Initialise default context values */
ctx_init(dev, chan->ramin_grctx->gpuobj);
INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x28/4, (chan->id<<24)|0x1); /* CTX_USER */
/* nv20: INSTANCE_WR(chan->ramin_grctx->gpuobj, 10, chan->id<<24); */
INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x28/4, (chan->id<<24)|0x1);
/* CTX_USER */
INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id,
chan->ramin_grctx->instance >> 4);