mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-07 19:18:04 +02:00
Quake 3 works, with small texturing errors. Performance needs work.
This commit is contained in:
parent
454fe27b66
commit
cec01cfdda
4 changed files with 245 additions and 173 deletions
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@ -93,14 +93,12 @@ int mgaSwapBuffers(drm_device_t *dev, drm_mga_swap_t *args)
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drm_buf_t *buf;
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drm_dma_t d;
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printk("swap buf idx %d\n", args->idx);
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buf = dma->buflist[ args->idx ];
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buf_priv = buf->dev_private;
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buf_priv->dma_type = MGA_DMA_SWAP;
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if (!mgaCopyAndVerifyState(dev_priv, buf_priv, MGA_UPLOAD_CLIPRECTS)) {
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printk("mgaCopyAndVerifyState faild for swap\n");
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printk("mgaCopyAndVerifyState faild for swap\n");
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buf_priv->dma_type = MGA_DMA_DISCARD;
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}
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@ -121,8 +119,6 @@ int mgaSwapBuffers(drm_device_t *dev, drm_mga_swap_t *args)
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d.request_sizes = NULL;
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d.granted_count = 0;
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printk("enqueue swap buf, idx %d\n", buf->idx);
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atomic_inc(&dev_priv->pending_bufs);
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if((drm_dma_enqueue(dev, &d)) != 0)
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atomic_dec(&dev_priv->pending_bufs);
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@ -201,7 +197,8 @@ static int mgaDmaVertex(drm_device_t *dev, drm_mga_vertex_t *args)
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buf = dma->buflist[ args->idx ];
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printk("mgaDmaVertex idx %d used %d\n", args->idx, buf->used);
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if (MGA_VERBOSE)
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printk("mgaDmaVertex idx %d used %d\n", args->idx, buf->used);
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buf_priv = buf->dev_private;
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buf_priv->dma_type = MGA_DMA_VERTEX;
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@ -258,8 +255,6 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
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copy_from_user_ret(&swap, (drm_mga_swap_t *)arg, sizeof(swap), -EFAULT);
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printk("(a) swap buf idx %d\n", swap.idx);
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retcode = mgaSwapBuffers(dev, &swap);
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return retcode;
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308
linux/mga_dma.c
308
linux/mga_dma.c
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@ -25,6 +25,7 @@
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*
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* Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com>
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* Jeff Hartmann <jhartmann@precisioninsight.com>
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* Keith Whitwell <keithw@precisioninsight.com>
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*
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* $XFree86$
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*
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@ -198,27 +199,26 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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dev_priv->mAccess = init->mAccess;
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printk("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
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dev_priv->chipset, dev_priv->warp_ucode_size,
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dev_priv->backOffset, dev_priv->depthOffset);
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printk("cpp: %d sgram: %d stride: %d maccess: %x\n",
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dev_priv->cpp, dev_priv->sgram, dev_priv->stride,
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dev_priv->mAccess);
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if (MGA_VERBOSE) {
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printk("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
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dev_priv->chipset, dev_priv->warp_ucode_size,
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dev_priv->backOffset, dev_priv->depthOffset);
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printk("cpp: %d sgram: %d stride: %d maccess: %x\n",
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dev_priv->cpp, dev_priv->sgram, dev_priv->stride,
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dev_priv->mAccess);
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}
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printk("memcpy\n");
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memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
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sizeof(mgaWarpIndex) * MGA_MAX_WARP_PIPES);
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printk("memcpy done\n");
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for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
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printk("warp pipe %d: installed: %d phys_addr: %lx size: %x\n",
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i,
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dev_priv->WarpIndex[i].installed,
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dev_priv->WarpIndex[i].phys_addr,
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dev_priv->WarpIndex[i].size);
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if (MGA_VERBOSE)
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for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
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printk("warp pipe %d: installed: %d phys_addr: %lx size: %x\n",
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i,
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dev_priv->WarpIndex[i].installed,
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dev_priv->WarpIndex[i].phys_addr,
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dev_priv->WarpIndex[i].size);
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prim_map = dev->maplist[init->reserved_map_idx];
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@ -226,10 +226,13 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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temp = init->warp_ucode_size + dev_priv->primary_size;
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temp = ((temp + PAGE_SIZE - 1) /
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PAGE_SIZE) * PAGE_SIZE;
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printk("temp : %x\n", temp);
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printk("dev->agp->base: %lx\n", dev->agp->base);
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printk("init->reserved_map_agpstart: %x\n", init->reserved_map_agpstart);
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if (MGA_VERBOSE) {
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printk("temp : %x\n", temp);
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printk("dev->agp->base: %lx\n", dev->agp->base);
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printk("init->reserved_map_agpstart: %x\n",
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init->reserved_map_agpstart);
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}
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dev_priv->ioremap = drm_ioremap(dev->agp->base + init->reserved_map_agpstart,
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temp);
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@ -242,12 +245,13 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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dev_priv->prim_head = (u32 *)dev_priv->ioremap;
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printk("dev_priv->prim_head : %p\n", dev_priv->prim_head);
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dev_priv->current_dma_ptr = dev_priv->prim_head;
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dev_priv->prim_num_dwords = 0;
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dev_priv->prim_max_dwords = dev_priv->primary_size / 4;
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printk("dma initialization\n");
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if (MGA_VERBOSE)
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printk("dma initialization\n");
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/* Private is now filled in, initialize the hardware */
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{
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@ -266,8 +270,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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/* Poll for the first buffer to insure that
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* the status register will be correct
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*/
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printk("phys_head : %x\n", phys_head);
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MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG);
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while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) {
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@ -285,7 +287,8 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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}
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printk("dma init was successful\n");
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if (MGA_VERBOSE)
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printk("dma init was successful\n");
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return 0;
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}
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@ -310,10 +313,9 @@ int mga_dma_init(struct inode *inode, struct file *filp,
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static void __mga_iload_small(drm_device_t *dev,
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drm_buf_t *buf,
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int use_agp)
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static void __mga_iload_small(drm_device_t *dev, drm_buf_t *buf)
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{
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int use_agp = PDEA_pagpxfer_enable;
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_buf_priv_t *buf_priv = buf->dev_private;
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unsigned long address = (unsigned long)buf->bus_address;
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@ -329,7 +331,7 @@ static void __mga_iload_small(drm_device_t *dev,
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PRIMRESET(dev_priv);
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PRIMGETPTR(dev_priv);
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PRIMOUTREG(MGAREG_DSTORG, dstorg | use_agp);
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PRIMOUTREG(MGAREG_DSTORG, dstorg );
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PRIMOUTREG(MGAREG_MACCESS, maccess);
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PRIMOUTREG(MGAREG_PITCH, (1 << 15));
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PRIMOUTREG(MGAREG_YDST, y1 * (x2 - x1));
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@ -359,10 +361,9 @@ static void __mga_iload_small(drm_device_t *dev,
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MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
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}
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static void __mga_iload_xy(drm_device_t *dev,
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drm_buf_t *buf,
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int use_agp)
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static void __mga_iload_xy(drm_device_t *dev, drm_buf_t *buf )
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{
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int use_agp = PDEA_pagpxfer_enable;
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_buf_priv_t *buf_priv = buf->dev_private;
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unsigned long address = (unsigned long)buf->bus_address;
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@ -402,7 +403,7 @@ static void __mga_iload_xy(drm_device_t *dev,
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PRIMRESET(dev_priv);
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PRIMGETPTR(dev_priv);
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PRIMOUTREG(MGAREG_DSTORG, dstorg | use_agp);
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PRIMOUTREG(MGAREG_DSTORG, dstorg);
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PRIMOUTREG(MGAREG_MACCESS, maccess);
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PRIMOUTREG(MGAREG_PITCH, pitch);
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PRIMOUTREG(MGAREG_YDSTLEN, (y1 << 16) | height);
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@ -417,9 +418,9 @@ static void __mga_iload_xy(drm_device_t *dev,
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PRIMOUTREG(MGAREG_SECADDRESS, ((__u32)address) | TT_BLIT);
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PRIMOUTREG(MGAREG_SECEND, ((__u32)(address + length)) | use_agp);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
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PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
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PRIMOUTREG(MGAREG_PITCH, dev_priv->stride);
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PRIMOUTREG(MGAREG_SOFTRAP, 0);
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PRIMADVANCE(dev_priv);
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@ -427,26 +428,92 @@ static void __mga_iload_xy(drm_device_t *dev,
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MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
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}
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static void mga_dma_dispatch_iload(drm_device_t *dev, drm_buf_t *buf)
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{
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drm_mga_buf_priv_t *buf_priv = buf->dev_private;
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int use_agp = PDEA_pagpxfer_enable;
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int x1 = buf_priv->boxes[0].x1;
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int x2 = buf_priv->boxes[0].x2;
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printk("dispatch iload!\n");
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if((x2 - x1) < 32) {
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printk("using iload small\n");
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__mga_iload_small(dev, buf, use_agp);
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if (MGA_VERBOSE) printk("using iload small\n");
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__mga_iload_small(dev, buf);
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} else {
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printk("using iload xy\n");
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__mga_iload_xy(dev, buf, use_agp);
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if (MGA_VERBOSE) printk("using iload xy\n");
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__mga_iload_xy(dev, buf);
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}
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}
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static void mga_dma_dispatch_tex_blit(drm_device_t *dev, drm_buf_t *buf )
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{
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int use_agp = PDEA_pagpxfer_enable;
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_buf_priv_t *buf_priv = buf->dev_private;
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unsigned long address = (unsigned long)buf->bus_address;
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int length = buf->used;
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int y1 = buf_priv->boxes[0].y1;
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int x1 = buf_priv->boxes[0].x1;
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int y2 = buf_priv->boxes[0].y2;
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int x2 = buf_priv->boxes[0].x2;
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int dstorg = buf_priv->ContextState[MGA_CTXREG_DSTORG];
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int maccess = buf_priv->ContextState[MGA_CTXREG_MACCESS];
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int pitch = buf_priv->ServerState[MGA_2DREG_PITCH];
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int width, height;
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int texperdword = 0;
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PRIMLOCALS;
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switch((maccess & 0x00000003)) {
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case 0:
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texperdword = 4;
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break;
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case 1:
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texperdword = 2;
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break;
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case 2:
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texperdword = 1;
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break;
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}
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x2 = (x2 + (texperdword - 1)) & ~(texperdword - 1);
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x1 = (x1 + (texperdword - 1)) & ~(texperdword - 1);
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width = x2 - x1;
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height = y2 - y1;
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PRIMRESET(dev_priv);
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PRIMGETPTR(dev_priv);
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PRIMOUTREG(MGAREG_DSTORG, dstorg);
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PRIMOUTREG(MGAREG_MACCESS, maccess);
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PRIMOUTREG(MGAREG_PITCH, pitch);
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PRIMOUTREG(MGAREG_YDSTLEN, (y1 << 16) | height);
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PRIMOUTREG(MGAREG_FXBNDRY, ((x1+width-1) << 16) | x1);
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PRIMOUTREG(MGAREG_AR0, width * height - 1);
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PRIMOUTREG(MGAREG_AR3, 0 );
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PRIMOUTREG(MGAREG_DWGCTL+MGAREG_MGA_EXEC, MGA_ILOAD_CMD);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_SRCORG, ((__u32)address) | TT_BLIT);
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PRIMOUTREG(MGAREG_SECEND, ((__u32)(address + length)) | use_agp);
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PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
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PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
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PRIMOUTREG(MGAREG_PITCH, dev_priv->stride);
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PRIMOUTREG(MGAREG_AR0, 0 );
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PRIMOUTREG(MGAREG_AR3, 0 );
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_SOFTRAP, 0);
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PRIMADVANCE(dev_priv);
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MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL);
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MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
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}
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static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
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{
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@ -466,8 +533,9 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
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if (count)
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mgaEmitState( dev_priv, buf_priv );
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printk("dispatch vertex addr 0x%lx, length 0x%x nbox %d\n",
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address, length, buf_priv->nbox);
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if (MGA_VERBOSE)
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printk("dispatch vertex addr 0x%lx, length 0x%x nbox %d\n",
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address, length, buf_priv->nbox);
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for (i = 0 ; i < count ; i++) {
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mgaEmitClipRect( dev_priv, &buf_priv->boxes[i] );
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@ -493,8 +561,7 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
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}
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/* Used internally for the small buffers generated from client state
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* information.
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/* Not currently used
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*/
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static void mga_dma_dispatch_general(drm_device_t *dev, drm_buf_t *buf)
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{
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@ -504,9 +571,6 @@ static void mga_dma_dispatch_general(drm_device_t *dev, drm_buf_t *buf)
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int use_agp = PDEA_pagpxfer_enable;
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PRIMLOCALS;
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printk("dispatch general!\n");
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PRIMRESET(dev_priv);
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PRIMGETPTR(dev_priv);
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@ -549,18 +613,21 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, drm_buf_t *buf )
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for (i = 0 ; i < nbox ; i++) {
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unsigned int height = pbox[i].y2 - pbox[i].y1;
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printk("dispatch clear %d,%d-%d,%d flags %x!\n",
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pbox[i].x1,
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pbox[i].y1,
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pbox[i].x2,
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pbox[i].y2,
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flags);
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if (MGA_VERBOSE)
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printk("dispatch clear %d,%d-%d,%d flags %x!\n",
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pbox[i].x1,
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pbox[i].y1,
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pbox[i].x2,
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pbox[i].y2,
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flags);
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if ( flags & MGA_CLEAR_FRONT )
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{
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printk("clear front\n");
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if (MGA_VERBOSE)
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printk("clear front\n");
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_YDSTLEN, (pbox[i].y1<<16)|height);
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@ -573,7 +640,8 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, drm_buf_t *buf )
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}
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if ( flags & MGA_CLEAR_BACK ) {
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printk("clear back\n");
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if (MGA_VERBOSE) printk("clear back\n");
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_YDSTLEN, (pbox[i].y1<<16)|height);
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@ -587,7 +655,7 @@ static void mga_dma_dispatch_clear( drm_device_t *dev, drm_buf_t *buf )
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if ( flags & MGA_CLEAR_DEPTH )
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{
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printk("clear depth\n");
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if (MGA_VERBOSE) printk("clear depth\n");
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG( MGAREG_DMAPAD, 0);
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PRIMOUTREG(MGAREG_YDSTLEN, (pbox[i].y1<<16)|height);
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|
|
@ -640,11 +708,12 @@ static void mga_dma_dispatch_swap( drm_device_t *dev, drm_buf_t *buf )
|
|||
unsigned int h = pbox[i].y2 - pbox[i].y1;
|
||||
unsigned int start = pbox[i].y1 * dev_priv->stride/2;
|
||||
|
||||
printk("dispatch swap %d,%d-%d,%d!\n",
|
||||
pbox[i].x1,
|
||||
pbox[i].y1,
|
||||
pbox[i].x2,
|
||||
pbox[i].y2);
|
||||
if (MGA_VERBOSE)
|
||||
printk("dispatch swap %d,%d-%d,%d!\n",
|
||||
pbox[i].x1,
|
||||
pbox[i].y1,
|
||||
pbox[i].x2,
|
||||
pbox[i].y2);
|
||||
|
||||
PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
|
||||
PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
|
||||
|
|
@ -771,15 +840,17 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
||||
drm_mga_buf_priv_t *buf_priv;
|
||||
|
||||
printk("mga_do_dma\n");
|
||||
if (MGA_VERBOSE) printk("mga_do_dma\n");
|
||||
if (test_and_set_bit(0, &dev->dma_flag)) {
|
||||
printk("mga_do_dma - busy\n");
|
||||
if (MGA_VERBOSE)
|
||||
printk("mga_do_dma - busy\n");
|
||||
atomic_inc(&dma->total_missed_dma);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (!dma->next_buffer) {
|
||||
printk("mga_do_dma - no next buffer\n");
|
||||
if (MGA_VERBOSE)
|
||||
printk("mga_do_dma - no next buffer\n");
|
||||
DRM_ERROR("No next_buffer\n");
|
||||
clear_bit(0, &dev->dma_flag);
|
||||
return -EINVAL;
|
||||
|
|
@ -787,11 +858,13 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
|
||||
buf = dma->next_buffer;
|
||||
|
||||
printk("context %d, buffer %d\n", buf->context, buf->idx);
|
||||
|
||||
if (MGA_VERBOSE)
|
||||
printk("context %d, buffer %d\n", buf->context, buf->idx);
|
||||
|
||||
if (buf->list == DRM_LIST_RECLAIM) {
|
||||
printk("mga_do_dma - reclaim\n");
|
||||
|
||||
if (MGA_VERBOSE)
|
||||
printk("mga_do_dma - reclaim\n");
|
||||
|
||||
drm_clear_next_buffer(dev);
|
||||
drm_free_buffer(dev, buf);
|
||||
atomic_dec(&dev_priv->pending_bufs);
|
||||
|
|
@ -821,7 +894,8 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
|
||||
if (!locked && !drm_lock_take(&dev->lock.hw_lock->lock,
|
||||
DRM_KERNEL_CONTEXT)) {
|
||||
printk("mga_do_dma - didn't get lock\n");
|
||||
if (MGA_VERBOSE)
|
||||
printk("mga_do_dma - didn't get lock\n");
|
||||
atomic_inc(&dma->total_missed_lock);
|
||||
clear_bit(0, &dev->dma_flag);
|
||||
atomic_dec(&dev_priv->dispatch_lock);
|
||||
|
|
@ -836,7 +910,7 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
buf->list = DRM_LIST_PEND;
|
||||
|
||||
buf_priv = buf->dev_private;
|
||||
printk("mga_do_dma - type %d\n", buf_priv->dma_type);
|
||||
if (MGA_VERBOSE) printk("mga_do_dma - type %d\n", buf_priv->dma_type);
|
||||
|
||||
switch (buf_priv->dma_type) {
|
||||
case MGA_DMA_GENERAL:
|
||||
|
|
@ -849,7 +923,7 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
/* mga_dma_dispatch_setup(dev, address, length); */
|
||||
/* break; */
|
||||
case MGA_DMA_ILOAD:
|
||||
mga_dma_dispatch_iload(dev, buf);
|
||||
mga_dma_dispatch_tex_blit(dev, buf);
|
||||
break;
|
||||
case MGA_DMA_SWAP:
|
||||
mga_dma_dispatch_swap(dev, buf);
|
||||
|
|
@ -868,7 +942,7 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
atomic_dec(&dev_priv->pending_bufs);
|
||||
|
||||
if(dma->this_buffer) {
|
||||
printk("mga_do_dma - freeing this_buffer\n");
|
||||
if (MGA_VERBOSE) printk("mga_do_dma - freeing this_buffer\n");
|
||||
drm_free_buffer(dev, dma->this_buffer);
|
||||
}
|
||||
|
||||
|
|
@ -889,8 +963,6 @@ static int mga_do_dma(drm_device_t *dev, int locked)
|
|||
if(!(atomic_read(&dev_priv->pending_bufs))) {
|
||||
wake_up_interruptible(&dev->queuelist[DRM_KERNEL_CONTEXT]->flush_queue);
|
||||
}
|
||||
#if 0
|
||||
#endif
|
||||
|
||||
/* We hold the dispatch lock until the interrupt handler
|
||||
* frees it
|
||||
|
|
@ -920,7 +992,8 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
|
|||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
|
||||
|
||||
printk("mga_dma_schedule\n");
|
||||
if (MGA_VERBOSE)
|
||||
printk("mga_dma_schedule\n");
|
||||
|
||||
if (test_and_set_bit(0, &dev->interrupt_flag)) {
|
||||
/* Not reentrant */
|
||||
|
|
@ -938,16 +1011,18 @@ again:
|
|||
dma->next_buffer = buf;
|
||||
dma->next_queue = q;
|
||||
if (buf && buf->list == DRM_LIST_RECLAIM) {
|
||||
printk("reclaiming in mga_dma_schedule\n");
|
||||
if (MGA_VERBOSE)
|
||||
printk("reclaiming in mga_dma_schedule\n");
|
||||
drm_clear_next_buffer(dev);
|
||||
drm_free_buffer(dev, buf);
|
||||
atomic_dec(&dev_priv->pending_bufs);
|
||||
printk("pending bufs : %d\n", atomic_read(&dev_priv->pending_bufs));
|
||||
if (MGA_VERBOSE)
|
||||
printk("pending bufs : %d\n", atomic_read(&dev_priv->pending_bufs));
|
||||
if(!(atomic_read(&dev_priv->pending_bufs))) {
|
||||
wake_up_interruptible(&dev->queuelist[DRM_KERNEL_CONTEXT]->flush_queue);
|
||||
wake_up_interruptible(&dev->queuelist[DRM_KERNEL_CONTEXT]->flush_queue);
|
||||
}
|
||||
dma->next_buffer = NULL;
|
||||
goto again;
|
||||
dma->next_buffer = NULL;
|
||||
goto again;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1043,7 +1118,8 @@ int mga_irq_uninstall(drm_device_t *dev)
|
|||
|
||||
if (!irq) return -EINVAL;
|
||||
|
||||
printk("remove irq handler %d\n", irq);
|
||||
if (MGA_VERBOSE)
|
||||
printk("remove irq handler %d\n", irq);
|
||||
|
||||
MGA_WRITE(MGAREG_ICLEAR, 0xfa7);
|
||||
MGA_WRITE(MGAREG_IEN, 0);
|
||||
|
|
@ -1080,25 +1156,34 @@ int mga_flush_queue(drm_device_t *dev)
|
|||
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
||||
int ret = 0;
|
||||
|
||||
printk("mga_flush_queue\n");
|
||||
printk("pending_bufs : %d\n", atomic_read(&dev_priv->pending_bufs));
|
||||
if(atomic_read(&dev_priv->pending_bufs) != 0) {
|
||||
printk("got to flush\n");
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
add_wait_queue(&q->flush_queue, &entry);
|
||||
for (;;) {
|
||||
if (!atomic_read(&dev_priv->pending_bufs)) break;
|
||||
printk("Calling schedule from flush_queue : %d\n",
|
||||
if (MGA_VERBOSE) {
|
||||
printk("mga_flush_queue\n");
|
||||
printk("pending_bufs : %d\n",
|
||||
atomic_read(&dev_priv->pending_bufs));
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -EINTR; /* Can't restart */
|
||||
break;
|
||||
}
|
||||
|
||||
if(atomic_read(&dev_priv->pending_bufs) != 0) {
|
||||
if (MGA_VERBOSE)
|
||||
printk("got to flush\n");
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
add_wait_queue(&q->flush_queue, &entry);
|
||||
for (;;) {
|
||||
if (!atomic_read(&dev_priv->pending_bufs)) break;
|
||||
if (MGA_VERBOSE)
|
||||
printk("Calling schedule from flush_queue : %d\n",
|
||||
atomic_read(&dev_priv->pending_bufs));
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -EINTR; /* Can't restart */
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
printk("Exited out of schedule from flush_queue\n");
|
||||
current->state = TASK_RUNNING;
|
||||
remove_wait_queue(&q->flush_queue, &entry);
|
||||
|
||||
if (MGA_VERBOSE)
|
||||
printk("Exited out of schedule from flush_queue\n");
|
||||
|
||||
current->state = TASK_RUNNING;
|
||||
remove_wait_queue(&q->flush_queue, &entry);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
@ -1123,9 +1208,10 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
printk("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
if (MGA_VERBOSE)
|
||||
printk("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
|
||||
lock.context, current->pid, dev->lock.hw_lock->lock,
|
||||
lock.flags);
|
||||
|
||||
|
||||
if (lock.context < 0) {
|
||||
|
|
@ -1146,7 +1232,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
break;
|
||||
}
|
||||
atomic_dec(&dev_priv->in_flush);
|
||||
printk("Calling lock schedule\n");
|
||||
if (MGA_VERBOSE) printk("Calling lock schedule\n");
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
|
|
@ -1186,7 +1272,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
atomic_inc(&dev->total_sleeps);
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
current->policy |= SCHED_YIELD;
|
||||
printk("Calling lock schedule\n");
|
||||
if (MGA_VERBOSE) printk("Calling lock schedule\n");
|
||||
schedule();
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
|
|
@ -1199,7 +1285,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
|
||||
if (!ret) {
|
||||
if (lock.flags & _DRM_LOCK_QUIESCENT) {
|
||||
printk("_DRM_LOCK_QUIESCENT\n");
|
||||
if (MGA_VERBOSE) printk("_DRM_LOCK_QUIESCENT\n");
|
||||
#if 0
|
||||
mga_dma_quiescent(dev);
|
||||
#endif
|
||||
|
|
@ -1207,7 +1293,11 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd,
|
|||
wake_up_interruptible(&dev->lock.lock_queue);
|
||||
}
|
||||
}
|
||||
printk("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
|
||||
if (MGA_VERBOSE)
|
||||
printk("%d %s\n", lock.context,
|
||||
ret ? "interrupted" : "has lock");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4,8 +4,9 @@
|
|||
#include "mga_drm_public.h"
|
||||
|
||||
|
||||
/* Isn't this fun. This has to be fixed asap by emitting primary
|
||||
* dma commands in the 'do_dma' ioctl.
|
||||
/* Isn't this fun - we copy the outstanding card state for every
|
||||
* MGA_DMA_VERTEX buffer. This has to be fixed asap by emitting
|
||||
* primary dma commands in the 'vertex_dma' ioctl.
|
||||
*/
|
||||
typedef struct {
|
||||
int dma_type;
|
||||
|
|
@ -47,14 +48,13 @@ typedef struct {
|
|||
#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r))
|
||||
|
||||
|
||||
|
||||
#define MGA_VERBOSE 0
|
||||
|
||||
|
||||
|
||||
/* Macros for inserting commands into a secondary dma buffer.
|
||||
*/
|
||||
|
||||
|
||||
#define VERBO 1
|
||||
|
||||
|
||||
|
||||
#define DMALOCALS u8 tempIndex[4]; u32 *dma_ptr; \
|
||||
int outcount, num_dwords;
|
||||
|
||||
|
|
@ -62,30 +62,30 @@ typedef struct {
|
|||
dma_ptr = (u32 *)((u8 *)buf->address + buf->used); \
|
||||
outcount = 0; \
|
||||
num_dwords = buf->used / 4; \
|
||||
if (VERBO) \
|
||||
printk(KERN_INFO "DMAGETPTR in %s, start %d\n", \
|
||||
__FUNCTION__, num_dwords); \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO "DMAGETPTR in %s, start %d\n", \
|
||||
__FUNCTION__, num_dwords); \
|
||||
} while(0)
|
||||
|
||||
#define DMAADVANCE(buf) do { \
|
||||
if (VERBO) \
|
||||
printk(KERN_INFO "DMAADVANCE\n"); \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO "DMAADVANCE\n"); \
|
||||
buf->used = num_dwords * 4; \
|
||||
} while(0)
|
||||
|
||||
#define DMAOUTREG(reg, val) do { \
|
||||
tempIndex[outcount]=ADRINDEX(reg); \
|
||||
dma_ptr[++outcount] = val; \
|
||||
if (VERBO) \
|
||||
printk(KERN_INFO \
|
||||
" DMAOUT %d: 0x%x -- 0x%x\n", \
|
||||
#define DMAOUTREG(reg, val) do { \
|
||||
tempIndex[outcount]=ADRINDEX(reg); \
|
||||
dma_ptr[++outcount] = val; \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO \
|
||||
" DMAOUT %d: 0x%x -- 0x%x\n", \
|
||||
num_dwords +1+outcount, ADRINDEX(reg), val); \
|
||||
if (outcount == 4) { \
|
||||
outcount = 0; \
|
||||
dma_ptr[0] = *(u32 *)tempIndex; \
|
||||
dma_ptr+=5; \
|
||||
num_dwords += 5; \
|
||||
} \
|
||||
if (outcount == 4) { \
|
||||
outcount = 0; \
|
||||
dma_ptr[0] = *(u32 *)tempIndex; \
|
||||
dma_ptr+=5; \
|
||||
num_dwords += 5; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
|
||||
|
|
@ -100,34 +100,34 @@ typedef struct {
|
|||
dev_priv->current_dma_ptr = dev_priv->prim_head; \
|
||||
} while (0)
|
||||
|
||||
#define PRIMGETPTR(dev_priv) do { \
|
||||
dma_ptr = dev_priv->current_dma_ptr; \
|
||||
phys_head = dev_priv->prim_phys_head; \
|
||||
num_dwords = dev_priv->prim_num_dwords; \
|
||||
outcount = 0; \
|
||||
if (VERBO) \
|
||||
#define PRIMGETPTR(dev_priv) do { \
|
||||
dma_ptr = dev_priv->current_dma_ptr; \
|
||||
phys_head = dev_priv->prim_phys_head; \
|
||||
num_dwords = dev_priv->prim_num_dwords; \
|
||||
outcount = 0; \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO "PRIMGETPTR in %s, start %d\n", \
|
||||
__FUNCTION__, num_dwords); \
|
||||
} while (0)
|
||||
|
||||
#define PRIMADVANCEPAD(dev_priv) do { \
|
||||
#define PRIMADVANCEPAD(dev_priv) do { \
|
||||
while(outcount & 3) { \
|
||||
if (VERBO) \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO "PAD %d\n", \
|
||||
num_dwords + 1 + outcount); \
|
||||
tempIndex[outcount++]=0x15; \
|
||||
} \
|
||||
\
|
||||
if (VERBO) \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO "PRIMADVANCEPAD\n"); \
|
||||
dev_priv->prim_num_dwords = num_dwords; \
|
||||
dev_priv->current_dma_ptr = dma_ptr; \
|
||||
} while (0)
|
||||
|
||||
#define PRIMADVANCE(dev_priv) do { \
|
||||
if (VERBO) { \
|
||||
if (MGA_VERBOSE) { \
|
||||
printk(KERN_INFO "PRIMADVANCE\n"); \
|
||||
if (outcount & 3) \
|
||||
if (outcount & 3) \
|
||||
printk(KERN_INFO " --- truncation\n"); \
|
||||
} \
|
||||
dev_priv->prim_num_dwords = num_dwords; \
|
||||
|
|
@ -138,10 +138,10 @@ typedef struct {
|
|||
#define PRIMOUTREG(reg, val) do { \
|
||||
tempIndex[outcount]=ADRINDEX(reg); \
|
||||
dma_ptr[1+outcount] = val; \
|
||||
if (VERBO) \
|
||||
printk(KERN_INFO \
|
||||
" PRIMOUT %d: 0x%x -- 0x%x\n", \
|
||||
num_dwords + 1 + outcount, ADRINDEX(reg), val); \
|
||||
if (MGA_VERBOSE) \
|
||||
printk(KERN_INFO \
|
||||
" PRIMOUT %d: 0x%x -- 0x%x\n", \
|
||||
num_dwords + 1 + outcount, ADRINDEX(reg), val); \
|
||||
if( ++outcount == 4) { \
|
||||
outcount = 0; \
|
||||
dma_ptr[0] = *(u32 *)tempIndex; \
|
||||
|
|
|
|||
|
|
@ -220,8 +220,6 @@ static void mgaG400EmitPipe(drm_mga_private_t *dev_priv,
|
|||
float fParam = 12800.0f;
|
||||
PRIMLOCALS;
|
||||
|
||||
printk("emit g400 pipe %x\n", pipe);
|
||||
|
||||
PRIMGETPTR(dev_priv);
|
||||
|
||||
|
||||
|
|
@ -270,8 +268,6 @@ static void mgaG200EmitPipe( drm_mga_private_t *dev_priv,
|
|||
unsigned int pipe = sarea_priv->WarpPipe;
|
||||
PRIMLOCALS;
|
||||
|
||||
printk("emit g200 pipe %x\n", pipe);
|
||||
|
||||
PRIMGETPTR(dev_priv);
|
||||
|
||||
PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
|
||||
|
|
@ -299,6 +295,8 @@ void mgaEmitState( drm_mga_private_t *dev_priv, drm_mga_buf_priv_t *buf_priv )
|
|||
unsigned int dirty = buf_priv->dirty;
|
||||
|
||||
if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
|
||||
int multitex = buf_priv->WarpPipe & MGA_T2;
|
||||
|
||||
if (dirty & MGA_UPLOAD_PIPE)
|
||||
mgaG400EmitPipe( dev_priv, buf_priv );
|
||||
|
||||
|
|
@ -308,7 +306,7 @@ void mgaEmitState( drm_mga_private_t *dev_priv, drm_mga_buf_priv_t *buf_priv )
|
|||
if (dirty & MGA_UPLOAD_TEX0)
|
||||
mgaG400EmitTex0( dev_priv, buf_priv );
|
||||
|
||||
if (dirty & MGA_UPLOAD_TEX1)
|
||||
if ((dirty & MGA_UPLOAD_TEX1) && multitex)
|
||||
mgaG400EmitTex1( dev_priv, buf_priv );
|
||||
} else {
|
||||
if (dirty & MGA_UPLOAD_PIPE)
|
||||
|
|
@ -331,16 +329,11 @@ static int mgaCopyContext(drm_mga_private_t *dev_priv,
|
|||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int *regs = buf_priv->ContextState;
|
||||
int i;
|
||||
|
||||
memcpy(regs,
|
||||
sarea_priv->ContextState,
|
||||
sizeof(buf_priv->ContextState));
|
||||
|
||||
for (i = 0 ; i < MGA_CTX_SETUP_SIZE ; i++)
|
||||
printk("ctx %d: %x\n", i, regs[i]);
|
||||
|
||||
|
||||
if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset &&
|
||||
regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) {
|
||||
printk("BAD DSTORG: %x (front %x, back %x)\n\n",
|
||||
|
|
@ -349,8 +342,6 @@ static int mgaCopyContext(drm_mga_private_t *dev_priv,
|
|||
regs[MGA_CTXREG_DSTORG] = 0;
|
||||
return -1;
|
||||
}
|
||||
else
|
||||
printk("DSTORG OK: %x\n", regs[MGA_CTXREG_DSTORG]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -374,10 +365,6 @@ static int mgaCopyTex(drm_mga_private_t *dev_priv,
|
|||
buf_priv->TexState[unit][MGA_TEXREG_ORG] = 0;
|
||||
return -1;
|
||||
}
|
||||
else
|
||||
printk("using texreg_org: %x unit %d\n",
|
||||
sarea_priv->TexState[unit][MGA_TEXREG_ORG],
|
||||
unit);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue