mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-08 08:08:05 +02:00
Remove (almost redundant) irq so that i810 driver works on all i810
hardware...
This commit is contained in:
Keith Whitwell
parent
0c965f990f
commit
c26d03976f
5 changed files with 26 additions and 270 deletions
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@ -422,9 +422,6 @@ static int i810_dma_initialize(drm_device_t *dev,
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((u8 *)dev_priv->sarea_map->handle +
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init->sarea_priv_offset);
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atomic_set(&dev_priv->flush_done, 0);
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init_waitqueue_head(&dev_priv->flush_queue);
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dev_priv->ring.Start = init->ring_start;
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dev_priv->ring.End = init->ring_end;
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dev_priv->ring.Size = init->ring_size;
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@ -887,53 +884,7 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
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}
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/* Interrupts are only for flushing */
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void i810_dma_service(int irq, void *device, struct pt_regs *regs)
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{
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drm_device_t *dev = (drm_device_t *)device;
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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u16 temp;
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atomic_inc(&dev->counts[_DRM_STAT_IRQ]);
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temp = I810_READ16(I810REG_INT_IDENTITY_R);
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temp = temp & ~(0x6000);
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if(temp == 0)
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return;
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/* Clear all interrupts */
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I810_WRITE16(I810REG_INT_IDENTITY_R, temp);
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queue_task(&dev->tq, &tq_immediate);
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mark_bh(IMMEDIATE_BH);
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}
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void i810_dma_immediate_bh(void *device)
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{
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drm_device_t *dev = (drm_device_t *) device;
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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atomic_set(&dev_priv->flush_done, 1);
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wake_up_interruptible(&dev_priv->flush_queue);
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}
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static inline void i810_dma_emit_flush(drm_device_t *dev)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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i810_kernel_lost_context(dev);
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BEGIN_LP_RING(2);
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( GFX_OP_USER_INTERRUPT );
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ADVANCE_LP_RING();
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/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
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/* atomic_set(&dev_priv->flush_done, 1); */
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/* wake_up_interruptible(&dev_priv->flush_queue); */
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}
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static inline void i810_dma_quiescent_emit(drm_device_t *dev)
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void i810_dma_quiescent(drm_device_t *dev)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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@ -944,79 +895,27 @@ static inline void i810_dma_quiescent_emit(drm_device_t *dev)
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OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( 0 );
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OUT_RING( GFX_OP_USER_INTERRUPT );
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OUT_RING( 0 );
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ADVANCE_LP_RING();
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/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
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/* atomic_set(&dev_priv->flush_done, 1); */
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/* wake_up_interruptible(&dev_priv->flush_queue); */
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}
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void i810_dma_quiescent(drm_device_t *dev)
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{
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DECLARE_WAITQUEUE(entry, current);
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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unsigned long end;
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if(dev_priv == NULL) {
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return;
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}
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atomic_set(&dev_priv->flush_done, 0);
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add_wait_queue(&dev_priv->flush_queue, &entry);
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end = jiffies + (HZ*3);
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for (;;) {
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current->state = TASK_INTERRUPTIBLE;
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i810_dma_quiescent_emit(dev);
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if (atomic_read(&dev_priv->flush_done) == 1) break;
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if((signed)(end - jiffies) <= 0) {
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DRM_ERROR("lockup\n");
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break;
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}
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schedule_timeout(HZ*3);
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if (signal_pending(current)) {
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break;
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}
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}
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current->state = TASK_RUNNING;
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remove_wait_queue(&dev_priv->flush_queue, &entry);
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return;
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i810_wait_ring( dev, dev_priv->ring.Size - 8 );
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}
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static int i810_flush_queue(drm_device_t *dev)
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{
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DECLARE_WAITQUEUE(entry, current);
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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drm_i810_private_t *dev_priv = dev->dev_private;
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drm_device_dma_t *dma = dev->dma;
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unsigned long end;
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int i, ret = 0;
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RING_LOCALS;
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i810_kernel_lost_context(dev);
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if(dev_priv == NULL) {
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return 0;
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}
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atomic_set(&dev_priv->flush_done, 0);
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add_wait_queue(&dev_priv->flush_queue, &entry);
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end = jiffies + (HZ*3);
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for (;;) {
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current->state = TASK_INTERRUPTIBLE;
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i810_dma_emit_flush(dev);
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if (atomic_read(&dev_priv->flush_done) == 1) break;
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if((signed)(end - jiffies) <= 0) {
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DRM_ERROR("lockup\n");
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break;
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}
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schedule_timeout(HZ*3);
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if (signal_pending(current)) {
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ret = -EINTR; /* Can't restart */
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break;
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}
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}
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current->state = TASK_RUNNING;
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remove_wait_queue(&dev_priv->flush_queue, &entry);
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BEGIN_LP_RING(2);
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( 0 );
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ADVANCE_LP_RING();
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i810_wait_ring( dev, dev_priv->ring.Size - 8 );
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for (i = 0; i < dma->buf_count; i++) {
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drm_buf_t *buf = dma->buflist[ i ];
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@ -64,8 +64,6 @@ typedef struct drm_i810_private {
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unsigned long hw_status_page;
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unsigned long counter;
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atomic_t flush_done;
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wait_queue_head_t flush_queue; /* Processes waiting until flush */
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drm_buf_t *mmap_buffer;
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42
linux/i810.h
42
linux/i810.h
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@ -60,46 +60,8 @@
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i810_dma_quiescent( dev ); \
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} while (0)
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_DMA_IRQ_BH 1
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#define DRIVER_PREINSTALL() do { \
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drm_i810_private_t *dev_priv = \
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(drm_i810_private_t *)dev->dev_private; \
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u16 tmp; \
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tmp = I810_READ16( I810REG_HWSTAM ); \
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tmp = tmp & 0x6000; \
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I810_WRITE16( I810REG_HWSTAM, tmp ); \
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\
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tmp = I810_READ16( I810REG_INT_MASK_R ); \
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tmp = tmp & 0x6000; /* Unmask interrupts */ \
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I810_WRITE16( I810REG_INT_MASK_R, tmp ); \
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tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; /* Disable all interrupts */ \
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I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
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} while (0)
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#define DRIVER_POSTINSTALL() do { \
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drm_i810_private_t *dev_priv = \
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(drm_i810_private_t *)dev->dev_private; \
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u16 tmp; \
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tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; \
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tmp = tmp | 0x0003; /* Enable bp & user interrupts */ \
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I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
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} while (0)
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#define DRIVER_UNINSTALL() do { \
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drm_i810_private_t *dev_priv = \
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(drm_i810_private_t *)dev->dev_private; \
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u16 tmp; \
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tmp = I810_READ16( I810REG_INT_IDENTITY_R ); \
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tmp = tmp & ~(0x6000); /* Clear all interrupts */ \
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if ( tmp != 0 ) I810_WRITE16( I810REG_INT_IDENTITY_R, tmp ); \
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\
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tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; /* Disable all interrupts */ \
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I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
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} while (0)
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#define __HAVE_DMA_IRQ 0
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#define __HAVE_DMA_IRQ_BH 0
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/* Buffer customization:
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*/
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125
linux/i810_dma.c
125
linux/i810_dma.c
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@ -422,9 +422,6 @@ static int i810_dma_initialize(drm_device_t *dev,
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((u8 *)dev_priv->sarea_map->handle +
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init->sarea_priv_offset);
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atomic_set(&dev_priv->flush_done, 0);
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init_waitqueue_head(&dev_priv->flush_queue);
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dev_priv->ring.Start = init->ring_start;
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dev_priv->ring.End = init->ring_end;
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dev_priv->ring.Size = init->ring_size;
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@ -887,53 +884,7 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev,
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}
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/* Interrupts are only for flushing */
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void i810_dma_service(int irq, void *device, struct pt_regs *regs)
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{
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drm_device_t *dev = (drm_device_t *)device;
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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u16 temp;
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atomic_inc(&dev->counts[_DRM_STAT_IRQ]);
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temp = I810_READ16(I810REG_INT_IDENTITY_R);
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temp = temp & ~(0x6000);
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if(temp == 0)
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return;
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/* Clear all interrupts */
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I810_WRITE16(I810REG_INT_IDENTITY_R, temp);
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queue_task(&dev->tq, &tq_immediate);
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mark_bh(IMMEDIATE_BH);
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}
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void i810_dma_immediate_bh(void *device)
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{
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drm_device_t *dev = (drm_device_t *) device;
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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atomic_set(&dev_priv->flush_done, 1);
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wake_up_interruptible(&dev_priv->flush_queue);
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}
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static inline void i810_dma_emit_flush(drm_device_t *dev)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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i810_kernel_lost_context(dev);
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BEGIN_LP_RING(2);
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( GFX_OP_USER_INTERRUPT );
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ADVANCE_LP_RING();
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/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
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/* atomic_set(&dev_priv->flush_done, 1); */
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/* wake_up_interruptible(&dev_priv->flush_queue); */
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}
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static inline void i810_dma_quiescent_emit(drm_device_t *dev)
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void i810_dma_quiescent(drm_device_t *dev)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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@ -944,79 +895,27 @@ static inline void i810_dma_quiescent_emit(drm_device_t *dev)
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OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( 0 );
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OUT_RING( GFX_OP_USER_INTERRUPT );
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OUT_RING( 0 );
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ADVANCE_LP_RING();
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/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
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/* atomic_set(&dev_priv->flush_done, 1); */
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/* wake_up_interruptible(&dev_priv->flush_queue); */
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}
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void i810_dma_quiescent(drm_device_t *dev)
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{
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DECLARE_WAITQUEUE(entry, current);
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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unsigned long end;
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if(dev_priv == NULL) {
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return;
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}
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atomic_set(&dev_priv->flush_done, 0);
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add_wait_queue(&dev_priv->flush_queue, &entry);
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end = jiffies + (HZ*3);
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for (;;) {
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current->state = TASK_INTERRUPTIBLE;
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i810_dma_quiescent_emit(dev);
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if (atomic_read(&dev_priv->flush_done) == 1) break;
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if((signed)(end - jiffies) <= 0) {
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DRM_ERROR("lockup\n");
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break;
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}
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schedule_timeout(HZ*3);
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if (signal_pending(current)) {
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break;
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}
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}
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current->state = TASK_RUNNING;
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remove_wait_queue(&dev_priv->flush_queue, &entry);
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return;
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i810_wait_ring( dev, dev_priv->ring.Size - 8 );
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}
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static int i810_flush_queue(drm_device_t *dev)
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{
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DECLARE_WAITQUEUE(entry, current);
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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drm_i810_private_t *dev_priv = dev->dev_private;
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drm_device_dma_t *dma = dev->dma;
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unsigned long end;
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int i, ret = 0;
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RING_LOCALS;
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i810_kernel_lost_context(dev);
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if(dev_priv == NULL) {
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return 0;
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}
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atomic_set(&dev_priv->flush_done, 0);
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add_wait_queue(&dev_priv->flush_queue, &entry);
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end = jiffies + (HZ*3);
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for (;;) {
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current->state = TASK_INTERRUPTIBLE;
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i810_dma_emit_flush(dev);
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if (atomic_read(&dev_priv->flush_done) == 1) break;
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if((signed)(end - jiffies) <= 0) {
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DRM_ERROR("lockup\n");
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break;
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}
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schedule_timeout(HZ*3);
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if (signal_pending(current)) {
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ret = -EINTR; /* Can't restart */
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break;
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}
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}
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current->state = TASK_RUNNING;
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remove_wait_queue(&dev_priv->flush_queue, &entry);
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BEGIN_LP_RING(2);
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OUT_RING( CMD_REPORT_HEAD );
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OUT_RING( 0 );
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ADVANCE_LP_RING();
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i810_wait_ring( dev, dev_priv->ring.Size - 8 );
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for (i = 0; i < dma->buf_count; i++) {
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drm_buf_t *buf = dma->buflist[ i ];
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@ -64,8 +64,6 @@ typedef struct drm_i810_private {
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unsigned long hw_status_page;
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unsigned long counter;
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atomic_t flush_done;
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wait_queue_head_t flush_queue; /* Processes waiting until flush */
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drm_buf_t *mmap_buffer;
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