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nouveau: use PFB_CSTATUS naming from ddx (reg introduced with nv10)

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NV04 had a PFB_FIFO_DATA at the same address, which we don't use, so
remove it to reduce confusion
This commit is contained in:
Stuart Bennett 2009-03-24 16:42:36 +00:00
parent d6ad0dba01
commit b71f3f114e
3 changed files with 7 additions and 9 deletions
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6
shared-core/nouveau_mem.c
View file

@ -300,9 +300,9 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
} else {
uint64_t mem;
mem = (NV_READ(NV04_FIFO_DATA) &
NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >>
NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT;
mem = (NV_READ(NV10_PFB_CSTATUS) &
NV10_PFB_CSTATUS_RAM_AMOUNT_MB_MASK) >>
NV10_PFB_CSTATUS_RAM_AMOUNT_MB_SHIFT;
return mem*1024*1024;
}
break;

8
shared-core/nouveau_reg.h
View file

@ -11,10 +11,6 @@
# define NV04_BOOT_0_RAM_AMOUNT_8MB 0x00000002
# define NV04_BOOT_0_RAM_AMOUNT_16MB 0x00000003
#define NV04_FIFO_DATA 0x0010020c
# define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK 0xfff00000
# define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT 20
#define NV_RAMIN 0x00700000
#define NV_RAMHT_HANDLE_OFFSET 0
@ -131,7 +127,9 @@
#define NV04_PFB_CFG0 0x00100200
#define NV04_PFB_CFG1 0x00100204
#define NV40_PFB_020C 0x0010020C
#define NV10_PFB_CSTATUS 0x0010020C
# define NV10_PFB_CSTATUS_RAM_AMOUNT_MB_MASK 0xfff00000
# define NV10_PFB_CSTATUS_RAM_AMOUNT_MB_SHIFT 20
#define NV10_PFB_TILE(i) (0x00100240 + (i*16))
#define NV10_PFB_TILE__SIZE 8
#define NV10_PFB_TLIMIT(i) (0x00100244 + (i*16))

2
shared-core/nv40_mc.c
View file

@ -19,7 +19,7 @@ nv40_mc_init(struct drm_device *dev)
case 0x46: /* G72 */
case 0x4e:
case 0x4c: /* C51_G7X */
tmp = NV_READ(NV40_PFB_020C);
tmp = NV_READ(NV10_PFB_CSTATUS);
NV_WRITE(NV40_PMC_1700, tmp);
NV_WRITE(NV40_PMC_1704, 0);
NV_WRITE(NV40_PMC_1708, 0);