mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-07 21:38:05 +02:00
Checkpoint commit before I fix IRQ disable/enable.
This commit is contained in:
Gareth Hughes
parent
3239b80b18
commit
9a426ec53e
44 changed files with 462 additions and 388 deletions
|
|
@ -19,14 +19,14 @@
|
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#ifndef _DRM_P_H_
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Author:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
/* ================================================================
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -25,9 +25,9 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Daryll Strauss <daryll@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Daryll Strauss <daryll@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -143,7 +143,7 @@ int DRM(getclient)( struct inode *inode, struct file *filp,
|
|||
down(&dev->struct_sem);
|
||||
for (i = 0, pt = dev->file_first; i < idx && pt; i++, pt = pt->next)
|
||||
;
|
||||
|
||||
|
||||
if (!pt) {
|
||||
up(&dev->struct_sem);
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -105,7 +105,7 @@ static int DRM(_mem_info)(char *buf, char **start, off_t offset,
|
|||
*eof = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
*eof = 0;
|
||||
*start = &buf[offset];
|
||||
|
||||
|
|
|
|||
|
|
@ -25,12 +25,12 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*
|
||||
* Acknowledgements:
|
||||
* Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
|
||||
* the problem with the proc files not outputting all their information.
|
||||
* Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
|
||||
* the problem with the proc files not outputting all their information.
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#define DRIVER_NAME "mga"
|
||||
#define DRIVER_DESC "Matrox G200/G400"
|
||||
#define DRIVER_DATE "20010110"
|
||||
#define DRIVER_DATE "20010206"
|
||||
|
||||
#define DRIVER_MAJOR 3
|
||||
#define DRIVER_MINOR 0
|
||||
|
|
@ -100,8 +100,8 @@ static drm_ioctl_desc_t mga_ioctls[] = {
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
|
||||
#endif
|
||||
};
|
||||
|
|
|
|||
13
linux/drm.h
13
linux/drm.h
|
|
@ -19,10 +19,10 @@
|
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
|
|
@ -367,10 +367,9 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
|
||||
#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
|
||||
#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
|
||||
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x45, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x46, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x47, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
|
||||
|
||||
/* i810 specific ioctls */
|
||||
|
|
|
|||
10
linux/drmP.h
10
linux/drmP.h
|
|
@ -19,14 +19,14 @@
|
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#ifndef _DRM_P_H_
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Author:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
/* ================================================================
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -25,9 +25,9 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Daryll Strauss <daryll@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Daryll Strauss <daryll@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -143,7 +143,7 @@ int DRM(getclient)( struct inode *inode, struct file *filp,
|
|||
down(&dev->struct_sem);
|
||||
for (i = 0, pt = dev->file_first; i < idx && pt; i++, pt = pt->next)
|
||||
;
|
||||
|
||||
|
||||
if (!pt) {
|
||||
up(&dev->struct_sem);
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -105,7 +105,7 @@ static int DRM(_mem_info)(char *buf, char **start, off_t offset,
|
|||
*eof = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
*eof = 0;
|
||||
*start = &buf[offset];
|
||||
|
||||
|
|
|
|||
|
|
@ -25,12 +25,12 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*
|
||||
* Acknowledgements:
|
||||
* Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
|
||||
* the problem with the proc files not outputting all their information.
|
||||
* Matthew J Sottek <matthew.j.sottek@intel.com> sent in a patch to fix
|
||||
* the problem with the proc files not outputting all their information.
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#ifndef __MGA_H__
|
||||
|
|
|
|||
165
linux/mga_dma.c
165
linux/mga_dma.c
|
|
@ -25,12 +25,12 @@
|
|||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
*
|
||||
* Rewritten by:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -1082,6 +1082,7 @@ int mga_do_dma_idle( drm_mga_private_t *dev_priv )
|
|||
|
||||
int mga_do_dma_reset( drm_mga_private_t *dev_priv )
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_primary_buffer_t *primary = &dev_priv->prim;
|
||||
|
||||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
|
@ -1089,10 +1090,11 @@ int mga_do_dma_reset( drm_mga_private_t *dev_priv )
|
|||
/* The primary DMA stream should look like new right about now.
|
||||
*/
|
||||
primary->tail = 0;
|
||||
primary->wrap = 0;
|
||||
primary->space = primary->size - MGA_DMA_SOFTRAP_SIZE;
|
||||
primary->last_flush = 0;
|
||||
|
||||
sarea_priv->last_wrap = 0;
|
||||
|
||||
/* FIXME: Reset counters, buffer ages etc...
|
||||
*/
|
||||
|
||||
|
|
@ -1182,7 +1184,7 @@ void mga_do_dma_flush( drm_mga_private_t *dev_priv )
|
|||
}
|
||||
primary->space -= MGA_DMA_SOFTRAP_SIZE;
|
||||
|
||||
DRM_DEBUG( " space = 0x%06lx\n", (unsigned long)primary->space );
|
||||
DRM_DEBUG( " space = 0x%06x\n", primary->space );
|
||||
|
||||
primary->last_flush = primary->tail;
|
||||
|
||||
|
|
@ -1210,9 +1212,9 @@ void mga_do_dma_wrap( drm_mga_private_t *dev_priv )
|
|||
mga_flush_write_combine();
|
||||
MGA_WRITE( MGA_PRIMEND, tail | MGA_PRIMNOSTART | MGA_PAGPXFER );
|
||||
|
||||
spin_lock_irqsave( &primary->lock, flags );
|
||||
spin_lock_irqsave( &primary->tail_lock, flags );
|
||||
primary->tail = 0;
|
||||
spin_unlock_irqrestore( &primary->lock, flags );
|
||||
spin_unlock_irqrestore( &primary->tail_lock, flags );
|
||||
|
||||
head = *primary->head;
|
||||
|
||||
|
|
@ -1243,6 +1245,7 @@ static void mga_dma_service( int irq, void *device, struct pt_regs *regs )
|
|||
drm_device_t *dev = (drm_device_t *)device;
|
||||
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
||||
drm_mga_primary_buffer_t *primary = &dev_priv->prim;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
u32 head = dev_priv->primary->offset;
|
||||
u32 tail;
|
||||
|
||||
|
|
@ -1256,17 +1259,38 @@ static void mga_dma_service( int irq, void *device, struct pt_regs *regs )
|
|||
|
||||
MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
|
||||
|
||||
spin_lock( &primary->lock );
|
||||
spin_lock( &primary->tail_lock );
|
||||
tail = primary->tail + dev_priv->primary->offset;
|
||||
spin_unlock( &primary->lock );
|
||||
sarea_priv->last_wrap++;
|
||||
spin_unlock( &primary->tail_lock );
|
||||
|
||||
DRM_DEBUG( " *** wrap interrupt:\n" );
|
||||
DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset);
|
||||
DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset);
|
||||
DRM_DEBUG( " head = 0x%06lx\n",
|
||||
head - dev_priv->primary->offset );
|
||||
DRM_DEBUG( " tail = 0x%06lx\n",
|
||||
tail - dev_priv->primary->offset );
|
||||
DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap );
|
||||
|
||||
mga_flush_write_combine();
|
||||
MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
|
||||
MGA_WRITE( MGA_PRIMEND, tail | MGA_PRIMNOSTART | MGA_PAGPXFER );
|
||||
|
||||
#if 0
|
||||
queue_task( &dev->tq, &tq_immediate );
|
||||
mark_bh( IMMEDIATE_BH );
|
||||
#endif
|
||||
}
|
||||
|
||||
static int mga_dma_task_queue( void *dev )
|
||||
{
|
||||
drm_mga_private_t *dev_priv = ((drm_device_t *)dev)->dev_private;
|
||||
drm_mga_primary_buffer_t *primary = &dev_priv->prim;
|
||||
|
||||
spin_lock( &primary->list_lock );
|
||||
mga_do_freelist_wrap( dev );
|
||||
spin_unlock( &primary->list_lock );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1289,8 +1313,9 @@ static void mga_freelist_print( drm_device_t *dev )
|
|||
DRM_INFO( "current freelist:\n" );
|
||||
|
||||
for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
|
||||
DRM_INFO( " %p idx=%2d age=0x%x\n",
|
||||
entry, entry->buf->idx, entry->age );
|
||||
DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n",
|
||||
entry, entry->buf->idx, entry->age.head,
|
||||
entry->age.head - dev_priv->primary->offset );
|
||||
}
|
||||
DRM_INFO( "\n" );
|
||||
}
|
||||
|
|
@ -1311,7 +1336,7 @@ static int mga_freelist_init( drm_device_t *dev )
|
|||
return -ENOMEM;
|
||||
|
||||
memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
|
||||
dev_priv->head->age = MGA_BUFFER_USED;
|
||||
SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
|
||||
|
||||
for ( i = 0 ; i < dma->buf_count ; i++ ) {
|
||||
buf = dma->buflist[i];
|
||||
|
|
@ -1326,7 +1351,7 @@ static int mga_freelist_init( drm_device_t *dev )
|
|||
|
||||
entry->next = dev_priv->head->next;
|
||||
entry->prev = dev_priv->head;
|
||||
entry->age = MGA_BUFFER_FREE;
|
||||
SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
|
||||
entry->buf = buf;
|
||||
|
||||
if ( dev_priv->head->next != NULL )
|
||||
|
|
@ -1364,6 +1389,7 @@ static void mga_freelist_cleanup( drm_device_t *dev )
|
|||
static void mga_freelist_reset( drm_device_t *dev )
|
||||
{
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_buf_t *buf;
|
||||
drm_mga_buf_priv_t *buf_priv;
|
||||
int i;
|
||||
|
|
@ -1371,7 +1397,8 @@ static void mga_freelist_reset( drm_device_t *dev )
|
|||
for ( i = 0 ; i < dma->buf_count ; i++ ) {
|
||||
buf = dma->buflist[i];
|
||||
buf_priv = buf->dev_private;
|
||||
buf_priv->list_entry->age = MGA_BUFFER_FREE;
|
||||
SET_AGE( &buf_priv->list_entry->age,
|
||||
MGA_BUFFER_FREE, 0 );
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1380,20 +1407,28 @@ static drm_buf_t *mga_freelist_get( drm_device_t *dev )
|
|||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_freelist_t *next;
|
||||
drm_mga_freelist_t *prev;
|
||||
drm_mga_freelist_t *tail = dev_priv->tail;
|
||||
u32 head, wrap;
|
||||
|
||||
DRM_DEBUG( "%s: tail=0x%x status=0x%x\n",
|
||||
__FUNCTION__, dev_priv->tail->age,
|
||||
dev_priv->prim.status[1] );
|
||||
#if 0
|
||||
mga_freelist_print( dev );
|
||||
#endif
|
||||
if ( dev_priv->tail->age <= dev_priv->prim.status[1] ) {
|
||||
head = *dev_priv->prim.head;
|
||||
wrap = dev_priv->sarea_priv->last_wrap;
|
||||
|
||||
DRM_DEBUG( "%s: tail=0x%06lx %d\n",
|
||||
__FUNCTION__,
|
||||
tail->age.head ?
|
||||
tail->age.head - dev_priv->primary->offset : 0,
|
||||
tail->age.wrap );
|
||||
DRM_DEBUG( "%s: head=0x%06lx %d\n",
|
||||
__FUNCTION__,
|
||||
head - dev_priv->primary->offset, wrap );
|
||||
|
||||
if ( TEST_AGE( &tail->age, wrap, head ) ) {
|
||||
prev = dev_priv->tail->prev;
|
||||
next = dev_priv->tail;
|
||||
prev->next = NULL;
|
||||
next->prev = next->next = NULL;
|
||||
dev_priv->tail = prev;
|
||||
next->age = MGA_BUFFER_USED;
|
||||
SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
|
||||
return next->buf;
|
||||
}
|
||||
|
||||
|
|
@ -1408,14 +1443,18 @@ static int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
|
|||
drm_mga_freelist_t *head;
|
||||
drm_mga_freelist_t *next;
|
||||
drm_mga_freelist_t *prev;
|
||||
DRM_DEBUG( "%s: age=0x%x\n",
|
||||
__FUNCTION__, buf_priv->list_entry->age );
|
||||
DRM_DEBUG( "%s: age=0x%06lx wrap=%d\n",
|
||||
__FUNCTION__,
|
||||
buf_priv->list_entry->age.head -
|
||||
dev_priv->primary->offset,
|
||||
buf_priv->list_entry->age.wrap );
|
||||
|
||||
if ( buf_priv->list_entry->age == MGA_BUFFER_USED ) {
|
||||
if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
|
||||
/* Discarded buffer, put it on the tail.
|
||||
*/
|
||||
next = buf_priv->list_entry;
|
||||
next->age = MGA_BUFFER_FREE;
|
||||
next->age.head = MGA_BUFFER_FREE;
|
||||
next->age.wrap = 0;
|
||||
prev = dev_priv->tail;
|
||||
prev->next = next;
|
||||
next->prev = prev;
|
||||
|
|
@ -1437,6 +1476,30 @@ static int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* The list spinlock must have been acquired before this can be called...
|
||||
*/
|
||||
void mga_do_freelist_wrap( drm_device_t *dev )
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_freelist_t *entry;
|
||||
u32 head = *dev_priv->prim.head;
|
||||
|
||||
DRM_INFO( "%s:\n", __FUNCTION__ );
|
||||
#if 0
|
||||
DRM_DEBUG( " before...\n" );
|
||||
mga_freelist_print( dev );
|
||||
#endif
|
||||
|
||||
for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
|
||||
SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
|
||||
}
|
||||
|
||||
#if 0
|
||||
DRM_DEBUG( " after...\n" );
|
||||
mga_freelist_print( dev );
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/* ================================================================
|
||||
* DMA initialization, cleanup
|
||||
|
|
@ -1449,13 +1512,12 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
||||
dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
|
||||
if ( dev_priv == NULL )
|
||||
if ( !dev_priv )
|
||||
return -ENOMEM;
|
||||
dev->dev_private = (void *)dev_priv;
|
||||
|
||||
memset( dev_priv, 0, sizeof(drm_mga_private_t) );
|
||||
|
||||
|
||||
dev_priv->chipset = init->chipset;
|
||||
|
||||
dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
|
||||
|
|
@ -1477,18 +1539,12 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|||
dev_priv->depth_offset = init->depth_offset;
|
||||
dev_priv->depth_pitch = init->depth_pitch;
|
||||
|
||||
DRM_INFO( " macces = 0x%08x\n", init->maccess );
|
||||
DRM_INFO( "front offset = 0x%08x\n", init->front_offset );
|
||||
DRM_INFO( "front pitch = 0x%08x\n", init->front_pitch );
|
||||
DRM_INFO( " back offset = 0x%08x\n", init->back_offset );
|
||||
DRM_INFO( " back pitch = 0x%08x\n", init->back_pitch );
|
||||
DRM_INFO( "depth offset = 0x%08x\n", init->depth_offset );
|
||||
DRM_INFO( "depth pitch = 0x%08x\n", init->depth_pitch );
|
||||
|
||||
dev_priv->sarea = dev->maplist[0];
|
||||
|
||||
DO_FIND_MAP( dev_priv->fb, init->fb_offset );
|
||||
DO_FIND_MAP( dev_priv->mmio, init->mmio_offset );
|
||||
DO_FIND_MAP( dev_priv->status, init->status_offset );
|
||||
|
||||
DO_FIND_MAP( dev_priv->warp, init->warp_offset );
|
||||
DO_FIND_MAP( dev_priv->primary, init->primary_offset );
|
||||
DO_FIND_MAP( dev_priv->buffers, init->buffers_offset );
|
||||
|
|
@ -1515,19 +1571,24 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|||
return ret;
|
||||
}
|
||||
|
||||
#if 0
|
||||
dev_priv->prim.status_page = mga_alloc_page();
|
||||
if ( !dev_priv->prim.status_page ) {
|
||||
DRM_ERROR( "failed to allocate status page!\n" );
|
||||
mga_do_cleanup_dma( dev );
|
||||
return -ENOMEM;
|
||||
}
|
||||
dev_priv->prim.status = (u32 *)dev_priv->prim.status_page;
|
||||
|
||||
dev_priv->prim.status = ioremap_nocache( virt_to_bus((void *)dev_priv->prim.status_page), PAGE_SIZE );
|
||||
if ( dev_priv->prim.status == NULL ) {
|
||||
if ( !dev_priv->prim.status ) {
|
||||
DRM_ERROR( "failed to remap status page!\n" );
|
||||
mga_do_cleanup_dma( dev );
|
||||
return -ENOMEM;
|
||||
}
|
||||
#endif
|
||||
dev_priv->sarea_priv->last_wrap = 0;
|
||||
|
||||
dev_priv->prim.status = (u32 *)&dev_priv->status->handle;
|
||||
|
||||
mga_do_wait_for_idle( dev_priv );
|
||||
|
||||
|
|
@ -1537,7 +1598,7 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|||
dev_priv->primary->offset | MGA_DMA_GENERAL );
|
||||
|
||||
MGA_WRITE( MGA_PRIMPTR,
|
||||
virt_to_bus((void *)dev_priv->prim.status_page) |
|
||||
virt_to_bus((void *)dev_priv->prim.status) |
|
||||
MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */
|
||||
MGA_PRIMPTREN1 ); /* DWGSYNC */
|
||||
|
||||
|
|
@ -1548,15 +1609,15 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|||
|
||||
dev_priv->prim.head = &dev_priv->prim.status[0];
|
||||
dev_priv->prim.tail = 0;
|
||||
dev_priv->prim.wrap = 0;
|
||||
dev_priv->prim.space = dev_priv->prim.size - MGA_DMA_SOFTRAP_SIZE;
|
||||
|
||||
dev_priv->prim.last_flush = 0;
|
||||
dev_priv->prim.high_mark = 0;
|
||||
|
||||
spin_lock_init( &dev_priv->prim.lock );
|
||||
spin_lock_init( &dev_priv->prim.tail_lock );
|
||||
spin_lock_init( &dev_priv->prim.list_lock );
|
||||
|
||||
dev_priv->sarea_priv->last_dispatch = 0;
|
||||
dev_priv->prim.status[0] = dev_priv->primary->offset;
|
||||
dev_priv->prim.status[1] = 0;
|
||||
|
||||
if ( mga_freelist_init( dev ) < 0 ) {
|
||||
|
|
@ -1575,12 +1636,11 @@ int mga_do_cleanup_dma( drm_device_t *dev )
|
|||
if ( dev->dev_private ) {
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
|
||||
if ( dev_priv->prim.status ) {
|
||||
iounmap( (void *)dev_priv->prim.status );
|
||||
}
|
||||
#if 0
|
||||
if ( dev_priv->prim.status_page ) {
|
||||
mga_free_page( dev_priv->prim.status_page );
|
||||
}
|
||||
#endif
|
||||
|
||||
DO_IOREMAPFREE( dev_priv->warp );
|
||||
DO_IOREMAPFREE( dev_priv->primary );
|
||||
|
|
@ -1700,6 +1760,13 @@ int mga_irq_install( drm_device_t *dev, int irq )
|
|||
dev->dma->next_queue = NULL;
|
||||
dev->dma->this_buffer = NULL;
|
||||
|
||||
#if 0
|
||||
INIT_LIST_HEAD(&dev->tq.list);
|
||||
dev->tq.sync = 0;
|
||||
dev->tq.routine = (void (*)(void *))mga_dma_task_queue;
|
||||
dev->tq.data = dev;
|
||||
#endif
|
||||
|
||||
/* Before installing handler
|
||||
*/
|
||||
MGA_WRITE( MGA_IEN, 0 );
|
||||
|
|
@ -1801,7 +1868,7 @@ if ( 0 ) {
|
|||
|
||||
ADVANCE_DMA();
|
||||
|
||||
FLUSH_DMA();
|
||||
mga_do_dma_flush( dev_priv );
|
||||
|
||||
udelay( 5 );
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
|
|||
|
|
@ -24,11 +24,12 @@
|
|||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors: Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
* Authors:
|
||||
* Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
*
|
||||
* Rewritten by:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#ifndef __MGA_DRM_H__
|
||||
|
|
@ -158,6 +159,13 @@ typedef struct {
|
|||
unsigned int texorg4;
|
||||
} drm_mga_texture_regs_t;
|
||||
|
||||
/* General ageing mechanism
|
||||
*/
|
||||
typedef struct {
|
||||
unsigned int head; /* Position of head pointer */
|
||||
unsigned int wrap; /* Primary DMA wrap count */
|
||||
} drm_mga_age_t;
|
||||
|
||||
typedef struct _drm_mga_sarea {
|
||||
/* The channel for communication of state information to the kernel
|
||||
* on firing a vertex dma buffer.
|
||||
|
|
@ -196,6 +204,10 @@ typedef struct _drm_mga_sarea {
|
|||
|
||||
/* Counters for aging textures and for client-side throttling.
|
||||
*/
|
||||
unsigned int status[4];
|
||||
unsigned int last_wrap;
|
||||
|
||||
drm_mga_age_t last_frame;
|
||||
unsigned int last_enqueue; /* last time a buffer was enqueued */
|
||||
unsigned int last_dispatch; /* age of the most recently dispatched buffer */
|
||||
unsigned int last_quiescent; /* */
|
||||
|
|
@ -245,6 +257,7 @@ typedef struct drm_mga_init {
|
|||
|
||||
unsigned int fb_offset;
|
||||
unsigned int mmio_offset;
|
||||
unsigned int status_offset;
|
||||
unsigned int warp_offset;
|
||||
unsigned int primary_offset;
|
||||
unsigned int buffers_offset;
|
||||
|
|
@ -280,8 +293,8 @@ typedef struct drm_mga_indices {
|
|||
|
||||
typedef struct drm_mga_iload {
|
||||
int idx;
|
||||
int length;
|
||||
unsigned int destOrg;
|
||||
unsigned int dstorg;
|
||||
unsigned int length;
|
||||
} drm_mga_iload_t;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#define DRIVER_NAME "mga"
|
||||
#define DRIVER_DESC "Matrox G200/G400"
|
||||
#define DRIVER_DATE "20010110"
|
||||
#define DRIVER_DATE "20010206"
|
||||
|
||||
#define DRIVER_MAJOR 3
|
||||
#define DRIVER_MINOR 0
|
||||
|
|
@ -100,8 +100,8 @@ static drm_ioctl_desc_t mga_ioctls[] = {
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
|
||||
#if 0
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
|
||||
#endif
|
||||
};
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#ifndef __MGA_DRV_H__
|
||||
|
|
@ -62,7 +62,6 @@ typedef struct drm_mga_primary_buffer {
|
|||
|
||||
volatile u32 *head;
|
||||
u32 tail;
|
||||
u32 wrap;
|
||||
int space;
|
||||
|
||||
unsigned long status_page;
|
||||
|
|
@ -71,14 +70,14 @@ typedef struct drm_mga_primary_buffer {
|
|||
u32 last_flush;
|
||||
u32 high_mark;
|
||||
|
||||
spinlock_t lock;
|
||||
spinlock_t tail_lock;
|
||||
spinlock_t list_lock;
|
||||
} drm_mga_primary_buffer_t;
|
||||
|
||||
|
||||
typedef struct drm_mga_freelist {
|
||||
struct drm_mga_freelist *next;
|
||||
struct drm_mga_freelist *prev;
|
||||
volatile unsigned int age;
|
||||
drm_mga_age_t age;
|
||||
drm_buf_t *buf;
|
||||
} drm_mga_freelist_t;
|
||||
|
||||
|
|
@ -94,52 +93,16 @@ typedef struct {
|
|||
#define MGA_IN_GETBUF 3
|
||||
|
||||
typedef struct drm_mga_private {
|
||||
u32 dispatch_status;
|
||||
unsigned int next_prim_age;
|
||||
volatile unsigned int last_prim_age;
|
||||
int reserved_map_idx;
|
||||
int buffer_map_idx;
|
||||
drm_mga_sarea_t *sarea_priv;
|
||||
int primary_size;
|
||||
int warp_ucode_size;
|
||||
int chipset;
|
||||
unsigned int frontOffset;
|
||||
unsigned int backOffset;
|
||||
unsigned int depthOffset;
|
||||
unsigned int textureOffset;
|
||||
unsigned int textureSize;
|
||||
int cpp;
|
||||
unsigned int stride;
|
||||
int sgram;
|
||||
int use_agp;
|
||||
drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
|
||||
unsigned int WarpPipe;
|
||||
unsigned int vertexsize;
|
||||
atomic_t pending_bufs;
|
||||
void *status_page;
|
||||
unsigned long real_status_page;
|
||||
u8 *ioremap;
|
||||
drm_mga_prim_buf_t **prim_bufs;
|
||||
drm_mga_prim_buf_t *next_prim;
|
||||
drm_mga_prim_buf_t *last_prim;
|
||||
drm_mga_prim_buf_t *current_prim;
|
||||
int current_prim_idx;
|
||||
wait_queue_head_t flush_queue; /* Processes waiting until flush */
|
||||
wait_queue_head_t wait_queue; /* Processes waiting until interrupt */
|
||||
wait_queue_head_t buf_queue; /* Processes waiting for a free buf */
|
||||
/* Some validated register values:
|
||||
*/
|
||||
u32 mAccess;
|
||||
|
||||
|
||||
drm_mga_primary_buffer_t prim;
|
||||
|
||||
unsigned int warp_pipe;
|
||||
unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
|
||||
drm_mga_sarea_t *sarea_priv;
|
||||
|
||||
drm_mga_freelist_t *head;
|
||||
drm_mga_freelist_t *tail;
|
||||
|
||||
unsigned int warp_pipe;
|
||||
unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
|
||||
|
||||
int chipset;
|
||||
int usec_timeout;
|
||||
|
||||
u32 clear_cmd;
|
||||
|
|
@ -161,6 +124,7 @@ typedef struct drm_mga_private {
|
|||
drm_map_t *sarea;
|
||||
drm_map_t *fb;
|
||||
drm_map_t *mmio;
|
||||
drm_map_t *status;
|
||||
drm_map_t *warp;
|
||||
drm_map_t *primary;
|
||||
drm_map_t *buffers;
|
||||
|
|
@ -209,6 +173,9 @@ extern int mga_dma_swap( struct inode *inode, struct file *filp,
|
|||
unsigned int cmd, unsigned long arg );
|
||||
extern int mga_dma_vertex( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg );
|
||||
extern int mga_dma_iload( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg );
|
||||
|
||||
#if 0
|
||||
extern int mga_clear_bufs( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg );
|
||||
|
|
@ -416,18 +383,15 @@ do { \
|
|||
#define ADVANCE_DMA() \
|
||||
do { \
|
||||
dev_priv->prim.space -= (write - dev_priv->prim.tail); \
|
||||
spin_lock_irqsave( &dev_priv->prim.lock, flags ); \
|
||||
spin_lock_irqsave( &dev_priv->prim.tail_lock, flags ); \
|
||||
dev_priv->prim.tail = write; \
|
||||
spin_unlock_irqrestore( &dev_priv->prim.lock, flags ); \
|
||||
spin_unlock_irqrestore( &dev_priv->prim.tail_lock, flags ); \
|
||||
if ( MGA_VERBOSE ) { \
|
||||
DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
|
||||
write, dev_priv->prim.space ); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define FLUSH_DMA() mga_do_dma_flush( dev_priv );
|
||||
|
||||
|
||||
/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
|
||||
*/
|
||||
#define DMA_WRITE( offset, val ) \
|
||||
|
|
@ -453,6 +417,28 @@ do { \
|
|||
} while (0)
|
||||
|
||||
|
||||
/* Buffer ageing via primary DMA stream head pointer.
|
||||
*/
|
||||
|
||||
#define SET_AGE( age, h, w ) \
|
||||
do { \
|
||||
(age)->head = h; \
|
||||
(age)->wrap = w; \
|
||||
} while (0)
|
||||
|
||||
#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \
|
||||
( (age)->wrap == w && \
|
||||
(age)->head <= h ) )
|
||||
|
||||
#define AGE_BUFFER( buf_priv ) \
|
||||
do { \
|
||||
drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
|
||||
entry->age.head = (dev_priv->prim.tail + \
|
||||
dev_priv->primary->offset); \
|
||||
entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define MGA_ENGINE_IDLE_MASK (MGA_SOFTRAPEN | \
|
||||
MGA_DWGENGSTS | \
|
||||
MGA_ENDPRDMASTS)
|
||||
|
|
@ -461,9 +447,6 @@ do { \
|
|||
|
||||
#define MGA_DMA_SOFTRAP_SIZE 32 * DMA_BLOCK_SIZE
|
||||
|
||||
#define MGA_DMA_IS_IDLE( dev_priv ) test_bit( MGA_DMA_IDLE, \
|
||||
&dev_priv->prim.state )
|
||||
|
||||
|
||||
|
||||
/* A reduced set of the mga registers.
|
||||
|
|
@ -570,6 +553,12 @@ do { \
|
|||
#define MGA_SETUPEND 0x2cd4
|
||||
#define MGA_SOFTRAP 0x2c48
|
||||
#define MGA_SRCORG 0x2cb4
|
||||
# define MGA_SRMMAP_MASK (1 << 0)
|
||||
# define MGA_SRCMAP_FB (0 << 0)
|
||||
# define MGA_SRCMAP_SYSMEM (1 << 0)
|
||||
# define MGA_SRCACC_MASK (1 << 1)
|
||||
# define MGA_SRCACC_PCI (0 << 1)
|
||||
# define MGA_SRCACC_AGP (1 << 1)
|
||||
#define MGA_STATUS 0x1e14
|
||||
# define MGA_SOFTRAPEN (1 << 0)
|
||||
# define MGA_DWGENGSTS (1 << 16)
|
||||
|
|
|
|||
|
|
@ -25,11 +25,11 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
* Jeff Hartmann <jhartmann@valinux.com>
|
||||
* Keith Whitwell <keithw@valinux.com>
|
||||
*
|
||||
* Rewritten by:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -318,7 +318,8 @@ static inline void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
|
|||
MGA_DWGCTL, MGA_DWGCTL_FLUSH );
|
||||
|
||||
DMA_BLOCK( MGA_LEN + MGA_EXEC, 0x00000001,
|
||||
MGA_DWGSYNC, 0x00007000,
|
||||
/*MGA_DWGSYNC, 0x00007000,*/
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
|
||||
MGA_LEN + MGA_EXEC, 0x00000000 );
|
||||
|
||||
|
|
@ -488,9 +489,8 @@ static int mga_verify_state( drm_mga_private_t *dev_priv )
|
|||
return ( ret == 0 );
|
||||
}
|
||||
|
||||
static int mga_verify_tex_blit( drm_mga_private_t *dev_priv,
|
||||
unsigned long bus_address,
|
||||
unsigned int dstorg, int length )
|
||||
static int mga_verify_iload( drm_mga_private_t *dev_priv,
|
||||
unsigned int dstorg, unsigned int length )
|
||||
{
|
||||
if ( dstorg < dev_priv->texture_offset ||
|
||||
dstorg + length > (dev_priv->texture_offset +
|
||||
|
|
@ -522,53 +522,72 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
|
|||
DMA_LOCALS;
|
||||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
||||
for ( i = 0 ; i < nbox ; i++ ) {
|
||||
unsigned int height = pbox[i].y2 - pbox[i].y1;
|
||||
if ( clear->flags & MGA_FRONT ) {
|
||||
BEGIN_DMA( 1 + nbox );
|
||||
|
||||
BEGIN_DMA( 6 );
|
||||
DMA_BLOCK( MGA_FCOL, clear->clear_color,
|
||||
MGA_PLNWT, clear->color_mask,
|
||||
MGA_DSTORG, dev_priv->front_offset,
|
||||
MGA_DWGCTL, dev_priv->clear_cmd );
|
||||
|
||||
if ( clear->flags & MGA_FRONT ) {
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_PLNWT, clear->color_mask,
|
||||
MGA_YDSTLEN, (pbox[i].y1 << 16) | height,
|
||||
MGA_FXBNDRY, (pbox[i].x2 << 16) | pbox[i].x1 );
|
||||
for ( i = 0 ; i < nbox ; i++ ) {
|
||||
drm_clip_rect_t *box = &pbox[i];
|
||||
u32 height = box->y2 - box->y1;
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_FCOL, clear->clear_color,
|
||||
MGA_DSTORG, dev_priv->front_offset,
|
||||
MGA_DWGCTL + MGA_EXEC,
|
||||
dev_priv->clear_cmd );
|
||||
}
|
||||
|
||||
if ( clear->flags & MGA_BACK ) {
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_PLNWT, clear->color_mask,
|
||||
MGA_YDSTLEN, (pbox[i].y1 << 16) | height,
|
||||
MGA_FXBNDRY, (pbox[i].x2 << 16) | pbox[i].x1 );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_FCOL, clear->clear_color,
|
||||
MGA_DSTORG, dev_priv->back_offset,
|
||||
MGA_DWGCTL + MGA_EXEC,
|
||||
dev_priv->clear_cmd );
|
||||
}
|
||||
|
||||
if ( clear->flags & MGA_DEPTH ) {
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_PLNWT, clear->depth_mask,
|
||||
MGA_YDSTLEN, (pbox[i].y1 << 16) | height,
|
||||
MGA_FXBNDRY, (pbox[i].x2 << 16) | pbox[i].x1 );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_FCOL, clear->clear_depth,
|
||||
MGA_DSTORG, dev_priv->depth_offset,
|
||||
MGA_DWGCTL + MGA_EXEC,
|
||||
dev_priv->clear_cmd );
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_YDSTLEN, (box->y1 << 16) | height,
|
||||
MGA_FXBNDRY + MGA_EXEC,
|
||||
(box->x2 << 16) | box->x1 );
|
||||
}
|
||||
|
||||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
if ( clear->flags & MGA_BACK ) {
|
||||
BEGIN_DMA( 1 + nbox );
|
||||
|
||||
DMA_BLOCK( MGA_FCOL, clear->clear_color,
|
||||
MGA_PLNWT, clear->color_mask,
|
||||
MGA_DSTORG, dev_priv->back_offset,
|
||||
MGA_DWGCTL, dev_priv->clear_cmd );
|
||||
|
||||
for ( i = 0 ; i < nbox ; i++ ) {
|
||||
drm_clip_rect_t *box = &pbox[i];
|
||||
u32 height = box->y2 - box->y1;
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_YDSTLEN, (box->y1 << 16) | height,
|
||||
MGA_FXBNDRY + MGA_EXEC,
|
||||
(box->x2 << 16) | box->x1 );
|
||||
}
|
||||
|
||||
ADVANCE_DMA();
|
||||
}
|
||||
|
||||
if ( clear->flags & MGA_DEPTH ) {
|
||||
BEGIN_DMA( 1 + nbox );
|
||||
|
||||
DMA_BLOCK( MGA_FCOL, clear->clear_depth,
|
||||
MGA_PLNWT, clear->depth_mask,
|
||||
MGA_DSTORG, dev_priv->depth_offset,
|
||||
MGA_DWGCTL, dev_priv->clear_cmd );
|
||||
|
||||
for ( i = 0 ; i < nbox ; i++ ) {
|
||||
drm_clip_rect_t *box = &pbox[i];
|
||||
u32 height = box->y2 - box->y1;
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_YDSTLEN, (box->y1 << 16) | height,
|
||||
MGA_FXBNDRY + MGA_EXEC,
|
||||
(box->x2 << 16) | box->x1 );
|
||||
}
|
||||
|
||||
ADVANCE_DMA();
|
||||
}
|
||||
#if 0
|
||||
BEGIN_DMA( 1 );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
|
|
@ -577,6 +596,7 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
|
|||
MGA_DWGCTL, ctx->dwgctl );
|
||||
|
||||
ADVANCE_DMA();
|
||||
#endif
|
||||
|
||||
mga_do_dma_flush( dev_priv );
|
||||
}
|
||||
|
|
@ -593,16 +613,11 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
|
|||
DMA_LOCALS;
|
||||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
||||
BEGIN_DMA( 4 + nbox );
|
||||
BEGIN_DMA( 2 + nbox );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_DWGSYNC, 0x00007100,
|
||||
MGA_DWGSYNC, 0x00007000 );
|
||||
|
||||
DMA_BLOCK( MGA_DSTORG, dev_priv->front_offset,
|
||||
MGA_MACCESS, dev_priv->maccess,
|
||||
DMA_BLOCK( MGA_MACCESS, dev_priv->maccess,
|
||||
MGA_SRCORG, dev_priv->back_offset,
|
||||
MGA_DSTORG, dev_priv->front_offset,
|
||||
MGA_AR5, pitch );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
|
|
@ -611,27 +626,28 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
|
|||
MGA_DWGCTL, MGA_DWGCTL_COPY );
|
||||
|
||||
for ( i = 0 ; i < nbox ; i++ ) {
|
||||
u32 h = pbox[i].y2 - pbox[i].y1;
|
||||
u32 start = pbox[i].y1 * pitch;
|
||||
drm_clip_rect_t *box = &pbox[i];
|
||||
u32 height = box->y2 - box->y1;
|
||||
u32 start = box->y1 * pitch;
|
||||
|
||||
DMA_BLOCK( MGA_AR0, start + pbox[i].x2 - 1,
|
||||
MGA_AR3, start + pbox[i].x1,
|
||||
MGA_FXBNDRY, ((pbox[i].x2 - 1) << 16) | pbox[i].x1,
|
||||
DMA_BLOCK( MGA_AR0, start + box->x2 - 1,
|
||||
MGA_AR3, start + box->x1,
|
||||
MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,
|
||||
MGA_YDSTLEN + MGA_EXEC,
|
||||
(pbox[i].y1 << 16) | h );
|
||||
(box->y1 << 16) | height );
|
||||
}
|
||||
|
||||
#if 0
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_PLNWT, ctx->plnwt,
|
||||
MGA_SRCORG, dev_priv->front_offset,
|
||||
MGA_DWGCTL, ctx->dwgctl );
|
||||
#endif
|
||||
|
||||
ADVANCE_DMA();
|
||||
|
||||
mga_do_dma_flush( dev_priv );
|
||||
}
|
||||
|
||||
|
||||
static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
|
|
@ -670,23 +686,8 @@ static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
|
|||
}
|
||||
|
||||
if ( buf_priv->discard ) {
|
||||
#if 0
|
||||
if ( buf_priv->dispatched == 1 ) {
|
||||
buf_priv->list_entry->age = sarea_priv->last_dispatch;
|
||||
|
||||
BEGIN_DMA( 1 );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_DWGSYNC, sarea_priv->last_dispatch );
|
||||
|
||||
ADVANCE_DMA();
|
||||
|
||||
sarea_priv->last_dispatch += 4;
|
||||
}
|
||||
#endif
|
||||
|
||||
if ( buf_priv->dispatched == 1 )
|
||||
AGE_BUFFER( buf_priv );
|
||||
buf->pending = 0;
|
||||
buf->used = 0;
|
||||
buf_priv->dispatched = 0;
|
||||
|
|
@ -702,45 +703,6 @@ static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
|
|||
#if 0
|
||||
|
||||
|
||||
/* This copies a 64 byte aligned agp region to the frambuffer
|
||||
* with a standard blit, the ioctl needs to do checking */
|
||||
|
||||
static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
||||
unsigned long bus_address,
|
||||
int length, unsigned int destOrg)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
int use_agp = PDEA_pagpxfer_enable | 0x00000001;
|
||||
u16 y2;
|
||||
PRIMLOCALS;
|
||||
|
||||
y2 = length / 64;
|
||||
|
||||
PRIM_OVERFLOW(dev, dev_priv, 30);
|
||||
|
||||
PRIMOUTREG(MGAREG_DSTORG, destOrg);
|
||||
PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
|
||||
PRIMOUTREG(MGAREG_SRCORG, (u32) bus_address | use_agp);
|
||||
PRIMOUTREG(MGAREG_AR5, 64);
|
||||
|
||||
PRIMOUTREG(MGAREG_PITCH, 64);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
|
||||
|
||||
PRIMOUTREG(MGAREG_AR0, 63);
|
||||
PRIMOUTREG(MGAREG_AR3, 0);
|
||||
PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
|
||||
PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_SRCORG, 0);
|
||||
PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
|
||||
static void mga_dma_dispatch_indices(drm_device_t * dev,
|
||||
drm_buf_t * buf,
|
||||
unsigned int start, unsigned int end)
|
||||
|
|
@ -793,6 +755,51 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
|
|||
#endif
|
||||
|
||||
|
||||
/* This copies a 64 byte aligned agp region to the frambuffer with a
|
||||
* standard blit, the ioctl needs to do checking.
|
||||
*/
|
||||
static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
|
||||
unsigned int dstorg, unsigned int length )
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
|
||||
u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
|
||||
u32 y2;
|
||||
DMA_LOCALS;
|
||||
|
||||
y2 = length / 64;
|
||||
|
||||
BEGIN_DMA( 4 );
|
||||
|
||||
DMA_BLOCK( MGA_DSTORG, dstorg,
|
||||
MGA_MACCESS, 0x00000000,
|
||||
MGA_SRCORG, srcorg,
|
||||
MGA_AR5, 64 );
|
||||
|
||||
DMA_BLOCK( MGA_PITCH, 64,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_DMAPAD, 0x00000000,
|
||||
MGA_DWGCTL, MGA_DWGCTL_COPY );
|
||||
|
||||
DMA_BLOCK( MGA_AR0, 63,
|
||||
MGA_AR3, 0,
|
||||
MGA_FXBNDRY, (63 << 16) | 0,
|
||||
MGA_YDSTLEN + MGA_EXEC, y2 );
|
||||
|
||||
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
|
||||
MGA_SRCORG, dev_priv->front_offset,
|
||||
MGA_PITCH, dev_priv->front_pitch / dev_priv->fb_cpp,
|
||||
MGA_DWGSYNC, 0x00007000 );
|
||||
|
||||
ADVANCE_DMA();
|
||||
|
||||
#if 0
|
||||
AGE_BUFFER( buf_priv );
|
||||
#endif
|
||||
buf_priv->discard = 1;
|
||||
mga_freelist_put( dev, buf );
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ================================================================
|
||||
|
|
@ -864,11 +871,12 @@ int mga_dma_vertex( struct inode *inode, struct file *filp,
|
|||
(drm_mga_vertex_t *)arg,
|
||||
sizeof(vertex) ) )
|
||||
return -EFAULT;
|
||||
|
||||
/* HACK: Force this for now...
|
||||
#if 0
|
||||
/* HACK: oh well...
|
||||
*/
|
||||
if ( mga_do_wait_for_idle( dev_priv ) < 0 )
|
||||
return -EBUSY;
|
||||
#endif
|
||||
|
||||
buf = dma->buflist[vertex.idx];
|
||||
buf_priv = buf->dev_private;
|
||||
|
|
@ -898,51 +906,6 @@ int mga_dma_vertex( struct inode *inode, struct file *filp,
|
|||
#if 0
|
||||
|
||||
|
||||
int mga_iload(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *) dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_buf_t *buf;
|
||||
drm_mga_buf_priv_t *buf_priv;
|
||||
drm_mga_iload_t iload;
|
||||
unsigned long bus_address;
|
||||
|
||||
if (copy_from_user(&iload, (drm_mga_iload_t *) arg, sizeof(iload)))
|
||||
return -EFAULT;
|
||||
|
||||
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
||||
DRM_ERROR("mga_iload called without lock held\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
buf = dma->buflist[iload.idx];
|
||||
buf_priv = buf->dev_private;
|
||||
bus_address = buf->bus_address;
|
||||
|
||||
if (mgaVerifyIload(dev_priv,
|
||||
bus_address, iload.destOrg, iload.length)) {
|
||||
mga_freelist_put(dev, buf);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
sarea_priv->dirty |= MGA_UPLOAD_CTX;
|
||||
|
||||
mga_dma_dispatch_tex_blit(dev, bus_address, iload.length,
|
||||
iload.destOrg);
|
||||
AGEBUF(dev_priv, buf_priv);
|
||||
buf_priv->discard = 1;
|
||||
mga_freelist_put(dev, buf);
|
||||
mga_flush_write_combine();
|
||||
mga_dma_schedule(dev, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int mga_indices(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
|
|
@ -989,3 +952,48 @@ int mga_indices(struct inode *inode, struct file *filp,
|
|||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
int mga_dma_iload( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg )
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_buf_t *buf;
|
||||
drm_mga_buf_priv_t *buf_priv;
|
||||
drm_mga_iload_t iload;
|
||||
DRM_INFO( __FUNCTION__ ":\n" );
|
||||
|
||||
LOCK_TEST_WITH_RETURN( dev );
|
||||
|
||||
if ( copy_from_user( &iload, (drm_mga_iload_t *)arg, sizeof(iload) ) )
|
||||
return -EFAULT;
|
||||
#if 1
|
||||
/* HACK: oh well...
|
||||
*/
|
||||
if ( mga_do_wait_for_idle( dev_priv ) < 0 )
|
||||
return -EBUSY;
|
||||
#endif
|
||||
|
||||
buf = dma->buflist[iload.idx];
|
||||
buf_priv = buf->dev_private;
|
||||
|
||||
#if 0
|
||||
DRM_INFO( " verifying iload...\n" );
|
||||
if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
|
||||
mga_freelist_put( dev, buf );
|
||||
return -EINVAL;
|
||||
}
|
||||
DRM_INFO( " verifying iload... done.\n" );
|
||||
#endif
|
||||
|
||||
mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
|
||||
|
||||
/* Make sure we restore the 3D state next time.
|
||||
*/
|
||||
dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Kernel-based WARP engine management:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*/
|
||||
|
||||
#define __NO_VERSION__
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
|
||||
#define WARP_UCODE_INSTALL( which, where ) \
|
||||
do { \
|
||||
DRM_INFO( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase ); \
|
||||
DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\
|
||||
dev_priv->warp_pipe_phys[where] = pcbase; \
|
||||
memcpy( vcbase, which, sizeof(which) ); \
|
||||
pcbase += WARP_UCODE_SIZE( which ); \
|
||||
|
|
@ -72,7 +72,7 @@ static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv )
|
|||
|
||||
size = PAGE_ALIGN( size );
|
||||
|
||||
DRM_INFO( "G400 ucode size = %d bytes\n", size );
|
||||
DRM_DEBUG( "G400 ucode size = %d bytes\n", size );
|
||||
return size;
|
||||
}
|
||||
|
||||
|
|
@ -91,7 +91,7 @@ static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv )
|
|||
|
||||
size = PAGE_ALIGN( size );
|
||||
|
||||
DRM_INFO( "G200 ucode size = %d bytes\n", size );
|
||||
DRM_DEBUG( "G200 ucode size = %d bytes\n", size );
|
||||
return size;
|
||||
}
|
||||
|
||||
|
|
@ -163,7 +163,7 @@ static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv )
|
|||
int mga_warp_install_microcode( drm_device_t *dev )
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
DRM_INFO( "%s\n", __FUNCTION__ );
|
||||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
||||
switch ( dev_priv->chipset ) {
|
||||
case MGA_CARD_TYPE_G400:
|
||||
|
|
@ -181,7 +181,7 @@ int mga_warp_init( drm_device_t *dev )
|
|||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
u32 wmisc;
|
||||
DRM_INFO( "%s\n", __FUNCTION__ );
|
||||
DRM_DEBUG( "%s\n", __FUNCTION__ );
|
||||
|
||||
/* FIXME: Get rid of these damned magic numbers...
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -19,10 +19,10 @@
|
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
|
|
@ -367,10 +367,9 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
|
||||
#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
|
||||
#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
|
||||
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x45, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x46, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x47, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
|
||||
|
||||
/* i810 specific ioctls */
|
||||
|
|
|
|||
13
shared/drm.h
13
shared/drm.h
|
|
@ -19,10 +19,10 @@
|
|||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
||||
|
|
@ -367,10 +367,9 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
|
||||
#define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
|
||||
#define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
|
||||
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x45, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x46, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x47, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
|
||||
|
||||
/* i810 specific ioctls */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue